280 results about "Shared memory" patented technology

A method to share remote DMA (RDMA) pointers to a key-value store among a plurality of clients. The method allocates a shared memory and accesses the key-value store with a key from a client and receives an information from the key-value store. The method further generates a RDMA pointer from the information, maps the key to a location in the shared memory, and generates a RDMA pointer record at the location. The method further stores the RDMA pointer and the key in the RDMA pointer record and shares the RDMA pointer record among the plurality of clients.

The application discloses a kind of power industrial control terminal network isolation method and system based on process security label binding;Belong to the technical field of power system network security, its operating steps include: decoupling physical network resources into independent partitions and mapping to independent user-mode network protocol stack instances;Through the bottom flow direction rule, the in-bound traffic is accurately delivered to the corresponding partition;Identify process security label at the application layer, establish the forced mapping of process and specific protocol stack instance and link;Through the controlled shared memory channel, realize the safe data interaction between partitions.The application realizes strong logical isolation on unified hardware, through the forced binding of process identity and network link, reduces the privilege promotion and horizontal penetration risk caused by traditional protocol stack sharing, while limiting the scope of failure impact, without relying on external physical isolation equipment, significantly improves the endogenous security protection capability of industrial control system network boundary.

The present invention provides a device, a computer-readable storage medium, and a method for exchanging data between containers, all equipped with shared memory. [Solution] Embodiments of this specification describe a Platform Abstraction Layer (PAL) for edge devices that enables services developed in different programming languages ​​to run as a pipeline on edge devices (e.g., cameras). For example, services may be deployed in separate containers developed using different programming languages. In one embodiment, stages in the pipeline can use buffers in shared memory to share data. The data may include a unique ID (e.g., frame ID) to identify the buffer containing the processed data by searching an index array for the shared memory. In this way, the shared memory supports random access.

A processing system including processing cores, a shared memory, a shift table that stores a maximum number of reservations to locations in the memory, and an exclusive monitor that uses the shift table and an eviction policy to enforce core synchronization. The eviction policy is based on priority, age of valid reservations, shift table fullness state, and reservation memory conflict. The shift table may include a memory address and a size value indicative of a flexible amount of reserved memory at the memory address. The exclusive monitor evicts an oldest reservation in the shift table having a same or lower priority level as the new reservation. The exclusive monitor rejects the new reservation when the shift table is full of higher priority reservations. Reservations are shifted to maintain age status. Stale reservations may be invalidated or have their priority lowered. Conflicting reservations may be made with the same priority level.

The present application discloses a method, system, and computer system for using a shared memory quota for communicating with a plurality of services in a data plane. The method includes processing a set of data for network security analysis, determining whether to offload the set of data to a cloud security entity for security processing, in response to determining to offload the set of data to the cloud security entity, send the set of data from a shared memory of the inline security entity to the cloud security entity. The cloud security entity provides a plurality of services. The plurality of services share a multiple-service shared-memory in which messages pertaining to the set of data offloaded to the cloud security entity is stored. Each service in the plurality of services is allocated a quota of the multiple-service shared-memory.

The present disclosure provides a train control system, method and train. It can be applied to the technical field of train control. The method comprises a plurality of on-board sensors, an on-board edge cloud computing platform and a first on-board actuator of a plurality of on-board actuators. The on-board sensors are used to collect real-time running data of the train during running, the on-board edge cloud computing platform comprises a first storage module and a first execution module. The first storage module is used to receive a plurality of control type data from the plurality of on-board sensors, and write the plurality of control type data into a first shared memory. The first execution module is used to determine a first to-be-executed task according to a predetermined priority, read the first control type data from the first shared memory, execute the first to-be-executed task based on the first control type data, and obtain a first control instruction. The first on-board actuator is used to receive the first control instruction from the on-board edge cloud computing platform, and control the first on-board actuator to run according to the first control instruction.

Embodiments of the present disclosure relate to the field of processor hardware architecture, and provide an artificial intelligence chip and a computing system. The artificial intelligence chip comprises a first computing core, a shared memory device corresponding to the first computing core, and a data synchronization device. The first computing core is configured to issue a first data request instruction. The data synchronization device is configured to perform a read operation on first data, a flag detection operation, and a synchronization operation according to the first data request instruction. The first data is stored in a global memory device coupled to the artificial intelligence chip. The synchronization operation comprises sending the first data to the shared memory device. The shared memory device is configured to store the first data sent by the data synchronization device for reading by the first computing core. Embodiments of the present disclosure hardwareize data synchronization and retry, significantly reduce communication delay, and release core computing resources of the artificial intelligence chip.

Disclosed is a system (104) and a method (500) for stream-based packet processing in a communication network. The method comprises receiving values corresponding to a plurality of configuration parameters including a parsing unit count. The method further comprises receiving, from a network interface, a plurality of packets corresponding to one or more data streams based upon the values of the plurality of configuration parameters and forming one or more batches of the plurality of packets based on the values corresponding to the plurality of configuration parameters. The method further comprises retrieving the one or more batches stored in a shared memory based on the value of the parsing unit count. The method further comprises parsing the plurality of packets in the retrieved batches to extract protocol header fields and classifying, based on the parsing, the plurality of packets into parsed packets and unparsed packets to enable the stream-based packet processing.

This application discloses a software instance communication method and electronic device, relating to the field of computer technology. The method, in response to detecting a first message receiving queue created by a second instance in shared memory, creates a corresponding second message receiving queue in shared memory, sends a handshake request message to the second instance through the first message receiving queue, and receives a handshake confirmation message from the second instance through the second message receiving queue, thereby completing the handshake connection between the first and second instances and establishing a communication link between them. Since multiple instances of a software service communicate through message receiving queues created in shared memory, traditional communication protocols are not required, and the system does not enter kernel mode. Therefore, the communication efficiency between multiple instances of a software service can be effectively improved without affecting system performance.

This invention discloses a deterministic protocol conversion method for multi-protocol industrial equipment, relating to the field of Internet of Things (IoT) technology. The method includes the following steps: Step S1: Initialize hardware; Step S2: The multi-protocol industrial equipment is sequentially connected to a protocol access module via different physical connectors; Step S3: Send a conversion operation to the protocol conversion configuration module; Step S4: Based on the conversion parameters and rules in the conversion operation, and combined with the constraints in the deterministic protocol conversion algorithm, a deterministic scheduling scheme is obtained by solving the optimization objective using a Satisfiability Model Theory solver; Step S5: According to the deterministic scheduling scheme, the protocol conversion scheduler moves data from shared memory blocks according to the conversion operation and sends it to the corresponding protocol access module for protocol conversion. This invention improves the interoperability of the equipment, enhances the flexibility and scalability of the conversion system, reduces the cost and time of system implementation and maintenance, and effectively improves the stability and predictability of the system.

Disclosed are a method, product, and medium for use in an AI accelerator chip, the method comprising: statically dividing a plurality of physical buffers in a shared memory of the AI accelerator chip according to a preset number of pipeline stages, and locking a base address of each of the plurality of physical buffers; parsing computation and memory allocation logic of an operator block of an AI model, and inserting a synchronization token on one or more intermediate representation nodes of the AI model based on a result of the parsing, the synchronization token inserted on any one of the intermediate representation nodes containing information about a synchronization dependency relationship in a physical pipeline in which a hardware engine of the AI accelerator chip performs a hardware operation represented by the intermediate representation node; and generating a hardware instruction stream based on the intermediate representation of the AI model, and interleaving and rearranging instruction blocks in the hardware instruction stream based on the synchronization token inserted on the one or more intermediate representation nodes.

The present application belongs to the technical field of speech processing, and particularly relates to a double-talking detection and acoustic echo cancellation cooperative processing method based on double CUDA streams. The method comprises the following steps: creating a first CUDA stream and a second CUDA stream on the same graphics processing unit; establishing a shared memory control package for cross-stream control between the first CUDA stream and the second CUDA stream; organizing a microphone near-end signal and a far-end reference signal into continuous frames with a preset frame length and frame shift; in the second CUDA stream, recording a synchronization event after writing sub-band control parameters and frame-level mode markers into the shared memory control package; in the first CUDA stream, performing partition blocking frequency domain sub-band adaptive filtering to update filter coefficients and generate echo suppression output. The present application realizes a highly cooperative, low-delay, high-robust real-time processing system for double-talking detection and echo cancellation, and has operation efficiency, control accuracy and engineering realizability, and is suitable for voice communication, remote conference and intelligent voice interaction systems.

This invention discloses an inter-process message distribution method, apparatus, and electronic device, relating to the field of communications. When a test environment process is detected to need message interaction with an ECU via a real adapter CAN channel, the test environment process is controlled to interact with the ECU via a first virtual adapter CAN channel. When a CAN tool process is detected to need to use the same real adapter CAN channel for message acquisition, the CAN tool process is controlled to read messages from a memory-mapped file via a second virtual adapter CAN channel. The first and second virtual adapter CAN channels share a memory-mapped file, and each virtual adapter CAN channel consists of a memory-mapped file and a message queue. When the test environment process and the CAN tool process acquire the same messages, they can share messages through the shared memory-mapped file, thereby improving the resource utilization of the adapter.

The application discloses a batch processing matrix multiplication optimization implementation method and system for a heterogeneous processor, and the method comprises the following steps: in step S1, a CPU allocates space for a matrix on a shared DDR memory through an hthread_malloc function; in step S2, the CPU calculates decision parameters through a decision algorithm, wherein the decision parameters comprise a matrix block size parameter and an m_batch size parameter; and in step S3, a DSP function is started based on the decision parameters. The application has the following beneficial effects: a high-efficiency batch processing matrix multiplication (BGEMM) algorithm is implemented on a DSP, and the BGEMM algorithm can effectively accelerate multi-field applications including deep learning; the memory access delay of a DSP calculation unit is reduced, the calculation speed is improved, and the calculation efficiency of GEMM is improved.

The application provides a large model training acceleration method and system based on CUDA shared memory and a PCIe expansion card, hardware configuration information is acquired to identify the PCIe expansion card and build an expansion storage space, and a unified management heterogeneous memory space is formed in combination with GPU shared memory; in the training process, according to a preset initialization strategy, model data blocks are loaded to different levels of the heterogeneous memory, data access frequency is monitored in real time, data migration instructions are dynamically generated based on multiple frequency thresholds, and intelligent scheduling of the data blocks among the levels of storage is realized; a transparent address remapping mechanism is used to enable CUDA kernel functions to seamlessly access the heterogeneous memory space; periodic data snapshots and persistent storage are simultaneously supported, and quick recovery after interruption of training is ensured; the application breaks through the GPU display memory capacity limit, improves the large model training efficiency, reduces the dependence on multi-card hardware and cost, and guarantees data security and training reliability.

A signal processing device and a display apparatus including the same are disclosed. The signal processing device includes a processor to perform signal processing, wherein the processor is configured to execute a server virtual machine and a plurality of guest virtual machines on a hypervisor, first and second guest virtual machine operate for first and second display, respectively, the server virtual machine is configured to encode and store processed video data in a shared memory, the first guest virtual machine is configured to receive and decode the encoded video data and store decoded video data in the shared memory, and the second guest virtual machine is configured to receive the decoded video data and display at least a portion of the decoded video data on the second display. Accordingly, it is possible to reduce a delay in displaying images between a plurality of displays.

The application discloses a kind of machine vision processor and method for industrial robot dynamic sorting system, including data acquisition module, parallel processing unit, logic control unit and shared memory unit, wherein, data acquisition module is used to real-time acquisition video image sequence;Parallel processing unit is used to extract trajectory based on input video image sequence, detect the appearance feature and motion feature of target, and predict the position distribution of next frame image based on the extracted feature, and calculate the adaptive matching cost matrix between trajectory and detection;Logic control unit is used to match and associate between target trajectory and new detection target based on the adaptive matching cost matrix, and output tracking information;Shared memory unit is used for data sharing and interaction between parallel processing unit and logic control unit.The application effectively solves the general processor computing power bottleneck problem, and is suitable for high-precision dynamic sorting of industrial robot in complex scene.

This application discloses a log processing method, apparatus, device, readable storage medium, and vehicle. The log processing method is applied to a log processing system and includes: based on the memory identifier of shared memory corresponding to each application process, searching for the shared memory and a first storage identifier corresponding to each memory identifier, wherein the first storage identifier corresponds to a first target storage space among M storage spaces, the first target storage space is used to store a first target log and a timestamp of the first target log, and the first target log is the log with the smallest timestamp among at least one unprocessed log generated by the application process corresponding to the memory identifier; obtaining the timestamps of the first target log from the N first target storage spaces corresponding to the N first storage identifiers, obtaining N timestamps; and outputting the log corresponding to the smallest timestamp among the N timestamps. According to the embodiments of this application, the processing speed of the log processing system can be improved, and logs generated by different processes can be quickly input in chronological order.

This application provides a servo driver with a multi-core control unit. The multi-core control unit includes a planning control module for executing process programming language programs and a real-time control module for implementing closed-loop control of the servo motor. The two modules communicate via shared memory to achieve real-time inter-core communication. Compared to traditional solutions, this architecture does not rely on multiple devices or bus communication. Shared memory can replace the bus for communication. Through multi-core division of labor and the use of shared memory for direct data transmission, flexible process programming of the servo driver is achieved, reducing latency in process programming and drive control.

A warning management system and method are described. Essentially, every diagnostic problem code, regardless of severity, generates a warning. The operator is given the option to decline or suppress further warnings for a class of diagnostic problem codes, such as low-severity codes. Future notifications of such codes can be disabled in response to a selection of the provided option. For errors occurring during a boot process, device information can be retrieved from a shared memory to enhance diagnostic messages.

The application discloses a low-altitude defense platform deployment system and method. The system comprises: a data acquisition module for acquiring defense area related data and available platform information; a capability quantification module for uniformly quantifying the capability parameters of each platform to obtain a standardized capability description; an AI agent search module comprising a plurality of parallel working AI agents and a shared memory area; each AI agent iteratively executes the generation of a candidate deployment scheme, constraint violation degree calculation and comprehensive performance score evaluation, and updates a local optimal deployment scheme based on the evaluation results, and exchanges scheme information through the shared memory area to guide subsequent search; and a scheme determination module for determining a global optimal deployment scheme when a termination condition is met. Through capability quantification and multi-agent parallel collaborative search, the application improves the comprehensive protection performance and planning efficiency of the heterogeneous defense platform deployment scheme, and realizes automatic global optimization deployment under complex constraint conditions.

The application relates to the technical field of vehicles, in particular to a vehicle-mounted video sharing method based on a PCIe bus, an automobile central platform, an electronic device and a computer readable storage medium. The method comprises the following steps: a plurality of system-level chips are connected in communication through a PCIe switch; in each system-level chip, an independent shared memory space is respectively allocated for each camera; when any system-level chip acquires video data, the video data is stored in the local shared memory space, and the video data is transmitted to a PCIe domain space through direct memory access after address mapping; other system-level chips acquire the video data from the PCIe domain space and store the video data in the local shared memory space; and in response to a reading request of the video data of an application program running on any system-level chip, the video data is read from the local shared memory space by the application program.

This invention discloses a log collection method, apparatus, device, and medium for a multi-core system. The method is executed by the master core and multiple slave cores in a multi-core system, including: writing log strings into a buffer in the shared memory of the slave cores and generating log descriptors; writing the log descriptors into a lock-free circular queue; monitoring the state count value of the lock-free circular queue in real time by the master core, and obtaining a target log descriptor when the lock-free circular queue is determined to be non-empty; determining a target buffer in the shared memory of the slave cores and transferring the log strings in the target buffer to the master core memory; and determining that the log upload conditions are met based on a timer or master core memory usage, determining at least one target master core memory block in the master core memory and uploading the log strings in the target master core memory block. This technical solution can improve log writing efficiency and log upload real-time performance in high-concurrency scenarios of multi-core systems.

Disclosed are an SM access method and device, a computer equipment, and a non-transitory computer-readable storage medium. The method includes: receiving an SM reduction instruction; performing an equal-reduction judgment on valid lanes according to address information in the SM reduction instruction, and splitting the valid lanes according to a result of the equal-reduction judgment; reading data from the SM according to split results of the valid lanes, the split result being associated with the number of times the data need to be read from the SM; performing a reduction operation according to the data read from the SM, the source data and the operation code in the SM reduction instruction, and writing a result of the reduction operation into the SM.

The invention discloses a computing power resource dynamic slicing and isolation method for an artificial intelligence target range, and the method comprises the following modules: S1, business feature perception and dynamic resource slicing: carrying out the analysis and modeling of an artificial intelligence attack and defense task through a mechanism, and mapping a task demand into a corresponding computing power slicing specification; s2, a driving-level video memory firewall, which monitors the video memory usage behavior of the virtual instance in real time on a driving layer of an execution node, and prevents attack behaviors such as abnormal occupation of the video memory; and S3, carrying out atomized rollback based on the model state of the shared memory. According to the mechanism, rapid recovery of the environment is realized through page table resetting. The method is oriented to an artificial intelligence target range, and the problems of static low efficiency, insufficient safety and isolation, lack of a quick recovery mechanism and the like of resource scheduling are solved through the mechanisms.

This invention provides a distributed task scheduling method and apparatus based on task state switching, relating to the field of data processing. The method includes: distributively scheduling multiple tasks according to system service instructions and displaying the task states of the multiple tasks in a graphical user interface; responding to a state switching operation for a target task among the multiple tasks, mapping the target TCB and target key state fields corresponding to the target task to a writable memory region within the process in shared memory according to the state switching operation; modifying the state parameters in the writable memory region within the process online using atomic operations corresponding to memory barriers based on the target TCB and target key state fields; responding to the memory modification event corresponding to the completion of the state parameter modification, continuously polling the executor corresponding to the target task and sensing the state change through notification of the memory modification event, and adjusting the executor's own behavior according to the sensed state change.

This application provides a smart park hyperconverged integrated machine system based on edge computing. This integrated machine integrates a multi-mode heterogeneous communication interface unit, a protocol adaptive conversion module, an edge computing unit, and an instruction control unit. The protocol adaptive conversion module uses an FPGA and a protocol feature library to identify data frames of different communication protocols in real time at the data link layer, convert them into a unified data format, and then deliver them to shared memory via DMA zero-copy. The edge computing unit adopts a heterogeneous architecture of ARM and NPU, performing spatiotemporal alignment and multi-source data fusion analysis based on graph neural networks on the unified data, outputting a state vector. The instruction control unit is independent of the edge computing unit, generating control instructions based on the state vector and independently generating key control instructions in response to hard-wired signals from the IO input interface. This invention eliminates the problems of distributed device deployment and protocol incompatibility, reduces bandwidth consumption and construction costs, and improves system response speed and reliability.

The application discloses an MCTP processing system and a processing method thereof. The MCTP processing system comprises an MCTP processor configured to process MCTP messages; N protocol processors, each of which is configured to process protocol messages comprising one or more MCTP messages; a physical binding module configured to generate MCTP data packets based on data received from a host through M physical interfaces; a central data packet manager comprising M physical binding groups corresponding to the M physical interfaces respectively, each of which comprises K MCTP entry queues configured to store MCTP entries; and a shared memory comprising one or more storage slots configured to store MCTP messages corresponding to the MCTP entries, which are generated based on the MCTP data packets generated by the physical binding module.

The application relates to a kind of social platform robot detection methods based on multi-agent, comprising: creating social platform API connection instance to collect target user comment history data to obtain original data set;Build the orchestrator-multi-agent collaborative detection model driven by large language model;Data processing agent constructs comment level relationship to input data, and carries out cleaning, standardization and quality detection, forms the structured data set after preprocessing and writes into shared memory;Feature engineering agent reads structured data from shared memory, calculates user-level multi-dimensional behavior feature vector and writes into shared memory;Rule discrimination agent reads feature data, executes rule discrimination, judges whether feature hits piece by piece, thereby outputs rule risk score and writes into shared memory;Modeling agent reads feature data, trains anomaly detection and supervised classification model, executes multi-model fusion to obtain robot risk determination result and writes into shared memory;Explanation generation agent reads model detection result and rule data, and fusion outputs the final interpretable social robot detection result.The application reduces the dependence on single rule or single model by adopting multi-agent cooperation to complete data processing, feature construction, rule discrimination and multi-model fusion detection, greatly improves the accuracy and robustness of social platform robot detection.