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48results about "Binary to binary" patented technology
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Translation program, translation device, and translation method
The translation program causes, as a receiving unit (13), a PLC program development environment (10) that translates a first source code (21), which is described in a first language, of a program to be executed in order to control a device to be controlled by a PLC (30) into a second source code (22), which is described in a second language, and causes a translation unit (12) to function, said receiving unit (13) receiving a specification of a monitoring variable. The translation unit (12) translates the first source code (21) into the second source code (22). A translation unit (12) converts a code relating to a variable of a value stored in a shared memory between a PLC (30) and a device to be controlled in a first source code (21) to a code that refers to the shared memory when the variable is a monitoring variable, and converts the code to a code that refers to a non-shared memory when the variable is different from the monitoring variable.
Owner:MITSUBISHI ELECTRIC CORP
Cross-ISA extension program translation method based on binary rewriting
The invention discloses a cross-ISA (Industrial Standard Architecture) extension program translation method based on binary rewriting, which comprises the following steps of: 1) naming an instruction set ISA of a program to be translated as an original ISA, and naming an instruction set ISA on target hardware for running original ISA extension as a target ISA; 2) performing comparative analysis on a binary file corresponding to the original ISA extension compilation and a binary file corresponding to the target ISA extension compilation to obtain an instruction needing to be translated relative to the target ISA extension in the original ISA extension, and segmenting the instruction into a plurality of program basic blocks needing to be translated; 3) allocating a jump instruction and an address space for translating and storing translated codes to each program basic block; (4) distributing the program basic blocks into the corresponding address spaces through a jump instruction to carry out static binary translation, and generating a static file; and (5) distributing a loading address for the static file by utilizing a loader according to the address distribution information in the static file, and loading the static file to a corresponding position.
Owner:INST OF SOFTWARE - CHINESE ACAD OF SCI
Multi-code transformation method and apparatus for binary obfuscation
The objective of the present invention is to prevent reverse engineering of a program and enhance resistance to an analysis tool. Provided is a multi-code transformation method for binary obfuscation, comprising: a first obfuscation step of reconstructing a source code into a plurality of executable basic blocks; a second obfuscation step of inserting at least one fake basic block among the executable basic blocks; and a third obfuscation step of inserting a junk code into each of the executable basic block and the fake basic blocks, wherein the executable basic block includes at least one switch-case statement representing at least some statements of the source code.
Owner:FOUND OF SOONGSIL UNIV IND COOP
Function name resolution in library transformation on same architecture
PendingEP4732131A1Binary to binaryLink editing
A computer-implemented method for transforming a library from a source operating system to a target operating system is disclosed. Thereby, the source operating system comprises an ABI, the target operating system comprising a target ABI, the target ABI being different from the source ABI, the library being implemented by a source object file that is compliant with the source application binary interface and comprising a source memory image, source symbol and source relocation information. The method comprises also creating a target memory image, that is compliant with the target application binary interface, wherein the target memory is derived from the source memory image, enriching the target memory image with an address information pointing to a variable length information, and writing the target memory image to the target object file to implement the transformed library by the target object file.
Owner:INTERNATIONAL BUSINESS MACHINE CORPORATION
A network interface device as a computing platform
The examples described in this document relate to a network interface device. In some examples, the network interface device includes: a network interface, a direct memory access (DMA) circuitry, a host interface, memory, one or more processors, and a circuitry designed to: based on an operating configuration specifying standalone operation, cause the network interface device to operate in standalone mode to run one or more applications; and based on an operating configuration specifying companion operation, cause the network interface device to operate in companion mode to provide at least one host system with access to one or more hardware resources that the network interface device can access.
Owner:INTEL CORP
Program upgrading method and device, operating system, equipment, terminal, medium and program
The embodiment of the invention discloses a program upgrading method and device, an operating system, equipment, a terminal, a medium and a program, and the method comprises the steps: checking whether a called function has an upgrading link or not when an execution function calls a related byte code; under the condition of determining that the called function has the upgrading link, searching a byte code address of an upgrading function in an upgrading module corresponding to the called function through the upgrading link of the called function; and on the premise of keeping the operation domain of the original module, executing the byte code of the upgrading function based on the byte code address of the upgrading function in the upgrading module corresponding to the called function. The technical scheme of the embodiment of the invention can improve the execution speed of the upgrade program and reduce the memory overhead of the system RAM.
Owner:BEIJING TONGFANG MICROELECTRONICS
Binary translation optimization method, binary translator and electronic equipment
The embodiment of the invention provides a binary translation optimization method, a binary translator and electronic equipment, and the method comprises the steps: updating a state mark of a first register in a preset state table according to the write bit width of a narrow write operation to the first register when a narrow write operation instruction is translated; the state mark is used for indicating whether the high bit of the corresponding register needs to be reset or not and recording the effective bit width of the corresponding register; when a read operation instruction is translated, obtaining a state mark of a second register corresponding to read operation from the preset state table; if it is judged that the reading bit width of the reading operation is larger than the effective bit width indicated by the state mark of the second register, a first zero clearing instruction is inserted before the translation result of the reading operation instruction; the first zero clearing instruction is used for performing zero clearing on a specified high bit of the second register. According to the method, the target machine code sequence generated by translation can be simplified, redundant operations are greatly reduced, and the execution efficiency of a translation system is improved.
Owner:LOONGSON TECH CORP
Method and device for converting and generating binary loadable file and resource-constrained equipment
Owner:BEIJING TONGFANG MICROELECTRONICS
Method and apparatus with scalar-to-vector binary instruction translation
A binary instruction translation method includes: receiving and decoding an instruction stream including instructions and pieces of instruction-information respectively corresponding to the instructions; determining whether the instructions in the instruction stream are translatable into a vector instruction stream based on the pieces of instruction-information; and based on a result of the determining, translate the instructions of the instruction stream to a vector instruction stream, the translating including translating at least some of the instructions of the instruction stream to vector instructions in a vector-specific instruction set by replacing scalar instructions of a first instruction set architecture (ISA) with functionally equivalent vector instructions of a vector-specific ISA.
Owner:SAMSUNG ELECTRONICS CO LTD
Stateless content management system
One embodiment comprises a stateless container of binaries and a broker. The stateless container of binaries includes a code memory having stored thereon code for a first version of a first functional component of a content management system, the first functional component executable to provide a first version of a service. The broker may be executable to: receive a request for the service from a client application, the request associated with a user of the content management system; determine that the first version of the service is accessible with regard to the user; determine an available first server that hosts the first version of the service; provide an indication of the first version of the service to the client application; and provide an IP address and a port number associated with the available first server to the client application.
Owner:OPEN TEXT CORP
Systems and methods for performing binary translation
Systems and methods for performing binary translation include a system that is capable of translating binaries written for use in a source execution environment to binaries compatible with a target execution environment. Consistent with some embodiments, a binary translation system includes a system service and a runtime code module that exists in an application memory address space. The binary translation system translates object-level binaries corresponding to executables, linkers, libraries, and the like and stores the translation in a translation cache that is cryptographically secured to ensure that only a system having a specific key is able to access the translations. If the application or application binary has been modified since the translation was performed, the system service will ensure that the translation is removed from the cache, a new translation is performed, and all threads accessing that translation are updated to the new translation.
Owner:APPLE INC
Parallel code fragments with foreign code
PendingUS20260037407A1Binary to binarySoftware testing/debuggingParallel computingComputer engineering
In various examples, an executable object including parallel code fragments with foreign code is executed by one or more processors. For example, when a selection mask is enabled, instructions encoded in the executable object are translated for execution by the one or more processors. Continuing this example, the executable object includes the parallel code fragment with the foreign code, once enabled and translated, the foreign code is provided to the target processor for execution.
Owner:UNISYS CORP
Cyphergenics-based ecosystem security platforms
The present disclosure relates to Cyphergenics(CG)-enabled security platforms and corresponding digital genomic constructions that exhibit controlled entropy yet are subject to digital modification and reconstruction by computationally complex functions and processes without loss of genomic integrity. These constructions enable formation of comprehensively secure hyper-scalable digital ecosystems, enclaves, and / or digital cohorts having mutual identity of interests, and application specific security architectures based on genomic network topologies that are interoperable with contemporary application and networks stacks. In some implementations of the disclosure, the security platforms may be configured to facilitate secure data exchange between ecosystem members. In some aspects of the disclosure, the security platforms are configured to facilitate virtual trusted execution domains, whereby a processing environment is configured to perform CG-based encoding and decoding of instructions and program data. In some aspects of the disclosure, the security platforms are configured to facilitate material data chains (MDCs).
Owner:QUANTUM DIGITAL SOLUTIONS CORP
Patch method and related devices
Owner:HUAWEI TECH CO LTD
Method and apparatus for executing a plurality of computer programs on a data processing system
PendingDE102024137609A1Binary to binaryProgram synchronisationData processing systemSoftware engineering
The invention relates to a method for executing a plurality of computer programs on a data processing system which has at least two separate computing units that share a common resource of the data processing system, wherein each computer program is executed by means of bytecode as program code means on one of the computing units of the data processing system, by converting the program code means of the respective computer program, which is present as bytecode, into the machine instructions relevant for the computing units by means of a code converter of the data processing system, characterized in that the code converter determines at least one interference value for each computer program as a function of a number of converted machine instructions per time step.
Owner:DEUTSCHES ZENTRUM FÜR LUFT UND RAUMFAHRT E V
Data security through temporary value translation
An example operation includes one or more of receiving a request to compile a software application, identifying one or more dummy values which were previously stored in source code of the software application, translating the one or more dummy values into source code using one or more secret values stored in a data store, and compiling, via a device, the source code of the software application into binary code using the secret values.
Owner:TOYOTA MOTOR NORTH AMERICA INC
Standardized implementation method of dynamic automated translation device
The application relates to the field of data processing and communication technology, and discloses a standardized implementation method of a dynamic automatic translation device, which comprises the following steps: constructing and analyzing a standard configuration model, generating an attribute dependency matrix, performing loop detection and topological sorting, generating a linear ordered execution sequence, presetting a class code skeleton and a runtime context, extracting a logic code set according to the sequence, applying a code synthesis equation to generate a composite logic source code, calling an instant compiler and an isolated class loader to convert the source code into a dynamic translation instance and perform atomic reference replacement, and feeding device original data into the instance to make the device original data flow in a logical path in a one-way manner in the runtime context to complete translation. Through the conversion of the interpretive execution into the compiled sequential execution, the application eliminates runtime dependency lookup, cooperates with the isolated loading and atomic replacement mechanism, realizes the independent running and smooth hot updating of the device logic, and improves the efficiency and stability of the heterogeneous protocol adaptation.
Owner:BEIJING YINGZHI TECH CO LTD
Static binary rewriting and dynamic binary rewriting hybrid method, system and application
PendingCN121658014ABinary to binaryProgram documentationParallel computingTheoretical computer science
The invention discloses a static binary rewriting and dynamic binary rewriting hybrid method, which comprises the following steps of: analyzing a source binary executable file to obtain a file structure and instruction information, and analyzing and determining an incompatible instruction on a target platform; planning an optimal range interval for a part which does not support static rewriting in the incompatible instruction, and performing static rewriting on a part which supports static rewriting to generate a new binary executable file; executing the generated binary executable file, calling a dynamic binary rewriter to take over the control execution flow of the program and dynamically rewrite and execute the incompatible instructions in the marked range when the execution is within the incompatible instruction range, and after the marked range is ended, returning the control right to the original program to continue execution; and repeating the previous step according to the number of the marking instruction ranges in the binary executable file until the complete program is executed. The invention further discloses a system and application for implementing the method, and the system and the application have wide application value.
Owner:EAST CHINA NORMAL UNIV
Binary code optimization method and system, electronic equipment, medium and program product
The embodiment of the invention discloses a binary code optimization method and system, an electronic device, a medium and a program product, based on a function call graph and basic block control flow graphs, topological sorting is carried out on each basic block control flow graph, the code execution sequence is optimized, branch prediction errors are reduced, instruction rewriting is carried out based on the topological sorting result, and the efficiency is improved. By means of the method, accurate rewriting of key instructions can be achieved according to the characteristics of a specific system architecture (such as an ARM64 architecture), the accuracy of address calculation is guaranteed, function inline expansion (namely target function calling) is selectively conducted in the inline expansion process through strict context management, the function calling overhead is reduced, and the function calling efficiency is improved. And finally, recoding the code of which the inline expansion is completed to generate a final optimized target binary code, so that multiple means such as inline, code layout and instruction-level optimization are comprehensively utilized to realize a deep optimization effect on the binary code on the premise of keeping semantics strictly unchanged.
Owner:BEIJING BOXIAOTONG TECH CO LTD
Data processing method, device, equipment, readable storage medium and program product
Embodiments of the present application provide a data processing method, device and equipment, readable storage medium and program product, the method comprises: obtaining the starting address of the data block to be translated; determining the starting address of the target data block based on the starting address of the data block to be translated, the target data block is the data block obtained by translating the data block to be translated; if it is determined that the target data block is not stored in the preset special memory based on the starting address of the target data block, the data block to be translated is translated into the target data block; the target data block is stored in the preset special memory, and the target data block is executed in the preset special memory; in this way, dynamic binary translation is performed based on the preset special memory, and the cache hit rate of the target data block in dynamic binary translation is improved.
Owner:BEIJING ESWIN COMPUTING TECH CO LTD
Stateless content management system
One embodiment comprises a stateless container of binaries and a broker. The stateless container of binaries includes a code memory having stored thereon code for a first version of a first functional component of a content management system, the first functional component executable to provide a first version of a service. The broker may be executable to: receive a request for the service from a client application, the request associated with a user of the content management system; determine that the first version of the service is accessible with regard to the user; determine an available first server that hosts the first version of the service; provide an indication of the first version of the service to the client application; and provide an IP address and a port number associated with the available first server to the client application.
Owner:OPEN TEXT CORP
Embedded virtual machine application debugging method and device, operating system, virtual machine, equipment, terminal, medium and program
The embodiment of the invention discloses an embedded virtual machine application debugging method and device, an operating system, a virtual machine, equipment, a terminal, a medium and a program.The method comprises the steps that when an application converter converts a binary intermediate file into a binary loadable file, debugging information generated when the binary intermediate file is compiled is obtained; in the process of compressing and converting the compiled binary intermediate file into a binary executable file by the application converter, converting and generating a target debugging file according to the debugging information; and debugging the embedded virtual machine application according to the target debugging file. According to the technical scheme, the analysis process of the debugging information can be optimized, the debugging efficiency and the debugging performance of the embedded virtual machine application are improved, and then the debugging experience is optimized.
Owner:BEIJING TONGFANG MICROELECTRONICS
Online binary optimization method and system
The invention provides an online binary optimization method and system, and relates to the technical field of online binary optimization. The running environment of the processor is determined according to the hardware architecture type of the current processor, and when the running environment is qualified, all the processes related to the target service are obtained, and the process PID list is constructed. And then generating a function replacement list according to the original binary file and the process PID list. Verifying whether the function replacement list meets a replacement requirement or not by using a sentry process; and when the function replacement list meets the replacement requirement, the function replacement list is applied to each process according to a patch repair strategy to replace the byte order of the corresponding function symbol in each process, and a final optimized process is obtained. On the basis, the method can be compatible with a hardware architecture of multiple processors, the problem that bottom detail processing is complex and prone to errors is avoided on the basis of reducing development complexity, and the risk that a server is interrupted in the online optimization processing process is overcome.
Owner:广东鸿钧微电子科技有限公司
Composable Kernel
A compiler for generating composable kernels. The compiler receives a kernel generator having kernel parameter definitions and code for a set of operators written in a general-purpose programming language. For each operator in the set of operators, the compiler subclassifies the code for each operator into an intermediate representation of each operator in an intermediate language, determines a configuration for each operator based on the kernel parameter definition and the intermediate representation of each operator, and generates a binary object for each operator in a set of binary objects for the set of operators based on the configuration. The compiler composes a kernel corresponding to the kernel generator based on the set of binary objects for the set of operations and the kernel parameter definition.
Owner:MODULAR INC
Method for generating an update file and corresponding server device, updating method and corresponding client device, updating method and corresponding system
A server builds an update file to update software. The server compiles source code of an updated version of the software, generating a binary file of the updated version of the software. Memory locations are mapped to sections of the binary file based on mappings of sections of a binary file of a prior version of the software. Bits of sections of a plurality of sections of the binary file of the prior version are logically combined, bit-by-bit, with bits of corresponding sections of the binary file of the updated version. The logically combining includes: applying an exclusive or operation; or applying an exclusive nor operation. The update file is built based on the mapping of the memory locations and on results of the logical combining.
Owner:STMICROELECTRONICS (ROUSSET) SAS
ICD-based remote data conversion unit configuration generation tool set method
PendingCN121940277AReduce maintenance costsavoid manual modificationBinary to binaryError preventionData transformationConfigfs
The method for configuring and generating the tool set by the remote data conversion unit based on the ICD comprises the following steps of: extracting all XML (Extensible Markup Language) documents from the ICD, and storing the XML documents into a hash table; analog discrete magnitude configuration information, digital signal configuration information and data conversion configuration information are extracted from the hash table, and an analog discrete magnitude configuration file, a digital signal configuration file and a data conversion configuration file in an XML format are generated; and defining the format of a remote data conversion unit capable of loading a binary configuration file, and filling the data in the analog discrete magnitude configuration file, the digital signal configuration file and the data conversion configuration file in the XML format into the loadable binary configuration file. According to the method, the loadable binary file is generated to be read by the airborne software, and the source code of the airborne software does not need to be modified, so that the maintenance cost of the software is reduced, meanwhile, the link of manually modifying the source code is avoided, and the modification efficiency and accuracy are improved.
Owner:XIAN AVIATION COMPUTING TECH RES INST OF AVIATION IND CORP OF CHINA
Instruction translation method and related device thereof
ActiveUS12625706B2Binary to binaryRuntime instruction translationProgramming languageSoftware engineering
Embodiments of this application disclose an instruction translation method. The method includes: obtaining a return instruction of a function call instruction; obtaining a first address mapping result based on a second address indicated in the return instruction; storing the first address mapping result in a running stack space; and obtaining a first translation result of the return instruction, where the first translation result is a binary translation result of the return instruction, and the second translation result indicates to obtain, from a target location, an instruction indicated by the first address mapping result and execute the instruction. In this application, a running stack space of a source program is reused, thereby saving a storage space. In addition, an address of a return instruction does not need to be checked each time the return instruction is translated, thereby reducing overheads during translation and increasing program running efficiency.
Owner:HUAWEI TECH CO LTD
Model adaptation method and device for kylin operating system, terminal and medium
The embodiment of the invention discloses a model adaptation method and device for a kylin operating system, a terminal and a medium, and the method comprises the steps: converting a model under an X86 architecture into a format model which can be recognized by an ARM64 architecture, and obtaining an operator set which cannot be converted according to abnormal information in the conversion process; performing semantic extraction on the operators which cannot be converted to generate a computational graph structure; generating a unified intermediate representation according to the computational graph structure; reading the logic of the operator which cannot be converted; using the unified intermediate representation and the operator conversion template to use a script to generate an operator according to logic to realize a basic code; and compiling and packaging the generated operator implementation basic code. According to the method, the conversion of different architecture model operators can be realized, the correctness and maintainability of operator conversion are ensured by utilizing templated and scripted code generation, manual participation in conversion is not needed, and the time period of slave model conversion can be greatly shortened.
Owner:KYLIN CORP
Controlling embedded boards to execute binaries
A system (27) for controlling embedded boards to execute binaries is configured to obtain custom logic for each respective board of a plurality of bare-metal embedded boards (31-32). The custom logic depends on a board type of the respective board. The system is further configured to obtain a binary for each respective board of the plurality of bare-metal embedded boards and control each respective board of the plurality of bare-metal embedded boards to execute the binary obtained for the respective board according to the custom logic obtained for the respective board.
Owner:EMPROOF BV
Dynamic binary translation method using rule-based translation for stack-based floating-point architecture
This invention provides a dynamic binary translation method for stack-based floating-point architectures using rule-based translation, expanding the applicability of translation rules and improving the support of existing dynamic binary translation systems for stack-based floating-point instruction sets. The specific operation of this invention is as follows: During the translation rule matching process, the correctness of the translation rules is ensured by virtualizing stack registers, thereby generating the correct target architecture instruction sequence in the instantiation of translation rules; when generating target code, the characteristics of the floating-point register stack are considered, and register allocation constraints are used to allocate registers on the floating-point stack. By identifying the target register and performing pop operations, the source architecture registers and target architecture registers are synchronized, ultimately generating an efficient target architecture floating-point instruction sequence. Compared to software-simulated floating-point instruction translation methods, the method of this invention achieves efficient dynamic binary translation while ensuring correct translation.
Owner:FUDAN UNIVERSITY