1400 results about "Object code" patented technology

A high level transformation method and apparatus for converting data formats in the context of network applications, among other places. A flexible transformation mechanism is provided that facilitates generation of translation machine code. A translator is dynamically generated by a translator compiler engine. When fed an input stream, the translator generates an output stream by executing the native object code generated on the fly by the translator compiler engine. In addition, the translator may be configured to perform a bi-directional translation between the two streams as well as translation between two distinct protocol sequences. Further a translator may working in streaming mode, to facilitate streaming processing of documents.

Apps are secured or security-wrapped either before they are downloaded onto a device, such as a smartphone or tablet device, or after they are downloaded but before they are allowed to access the device operating system and cause any potential damage to the device. An app provider, such as an employer or a cellphone provider, can secure its apps before consumers download an app from their app store or marketplace. The app is secured before it is allowed to access the operating system of the device, thereby preventing the app from malicious behavior. Core object code of the app is obtained and the digital signature is removed. App object code is substituted with security program object code, thereby creating a security-wrapped app. The security-wrapped app is prepared for execution on the device and is re-signed with a new key.

Systems and methods for building a platform specific compiler having an embedded instruction selector in a multi-platform environment are provided. A set of user defined platform dependent compiler architecture descriptors that describe corresponding architectural features and a set of instruction predicates defining those instructions to be selected are converted to platform dependent compiler object code and instruction selector object code, respectively. The platform specific compiler having the embedded instruction selector is formed from the platform dependent compiler object code, the instruction selector object code, and the platform independent compiler object code.

An object code expansion profiler equips a program for execution profiling by preprocessing the object code files of the program so as to add profiling monitoring code to the beginning of all or substantially all functions. The preprocessing includes, for each function, the steps of grouping the function's instructions into basic blocks, counting the number of cycles required to execute the instructions of the basic block, and inserting special monitoring code with the basic block. The special monitoring code is executed each time the basic block is executed, and updates the profiling information to reflect the number of cycles required to execute the basic block. Special handling is provided for profiling calls to the Operating System (OS). The resultant profiling information is converted into a call graph image most useful for human users. For each arc in the graph connecting a calling-function/parent-node to a called-function/child node, the displayed arc image has a width logarithmically proportional to the self+descendants time for the called function.

Apps are secured or security-wrapped either before they are downloaded onto a device, such as a smart phone or tablet device, or after they are downloaded but before they are allowed to access the device operating system and cause any potential damage to the device. The app is secured before it is allowed to access the operating system of the device, thereby preventing the app from malicious behavior. App object code is substituted with security program object code, thereby creating a security-wrapped app. The app is provisioned with a geo-fencing policy which prevents execution of an app outside a pre-defined geographical area. If the device is within the defined area, the app is allowed to execute. The geographical area, such as a building or company campus, is defined using longitude and latitude coordinates and a location accuracy value. Device location is obtained using location/GPS services on the device.

A method and apparatus to protect memory consistency in a multiprocessor computing system are described, in particular relating to program code conversion such as dynamic binary translation. The exemplary system provides a memory, processors and a controller/translator unit (CTU) arranged to convert subject code into at least first and second target code portions executable on the processors. The CTU comprises an address space allocation unit to provide virtual address space regions and direct the target code portions to access the memory therethough; a shared memory detection unit to detect a request to access a shared memory area, accessible by both target code portions, and to identify at least one group of instructions in the first target code portion which access the shared memory area; and a memory protection unit to selectively apply memory consistency protection in relation to accesses to the shared memory area by the identified group of instructions.

An electronic vaping device includes a housing extending in a longitudinal direction, the housing including a mouth-end and a connection-end, a reservoir containing a pre-vapor formulation, the reservoir in the housing, a heating element in the housing, the heating element in fluid communication with the reservoir, the heating element configured to generate a vapor, and a rechargeable battery configured to power at least the heating element and any other potential power consuming element(s) such as electronic circuits. The electronic vaping device also includes a first memory having stored thereon computer readable instructions relating to an electronic vaping operating system (OS), and at least one processor configured to execute the OS computer readable instructions to execute the operating system, the operating system including a real-time kernel configured to operate the electronic vaping device, and execute object code related to electronic vaping device functionality.

A computer system executing a method for performing reusable software application development comprises integrating a data processing system, providing a set of keywords and attributes, and declaring a set of executable specifications using the keywords and attributes, further comprising generating a program code, instantiating an object code, generating a testable functionality result, generating at least one unit test, generating an implementation documentation output, generating a performance statistics output, and generating a project metrics in the data processing system. The step of providing a set of keywords and attributes comprises generating a set of user interface forms, fields, and validation rules, generating a library of structured query language statements, generating a library of rules for generating dynamic structured query language statements, generating one of a web browser report, a file-based report, and a portable document format report, generating a library of security rules and permission statements, and generating database schemata.

The performance of an executing computer program on a computer system is monitored using latency sampling. The program has object code instructions and is executing on the computer system. At intervals, the execution of the computer program is interrupted including delivering a first interrupt. In response to at least a subset of the first interrupts, a latency associated with a particular object code instruction is identified, and the latency is stored in a first database. The particular object code instruction is executed by the computer such that the program remains unmodified.

The invention discloses a transmission and distribution network integration comprehensive line loss management analysis system and a processing flow thereof. The processing flow comprises the following steps of: obtaining the required network topology, line parameters, real-time data and history data from an EMS (energy management system), a power distribution GIS (geographic information system), a TMR (tele-meter reading) system and an electricity consumption information acquiring system through a processing interface, finishing integrating of the network topology, the line parameters, the real-time data and the history data based on unified object code and management service through model splitting software; and storing the analysis result into a database through digital monitoring and alarm software, power supply path analysis software, transmission and distribution network integration line loss counting and analysis software, and transmitting the result to the Web server to produce report forms. The system and processing flow disclosed by the invention provide suggestions for performing omnibearing and multi-angle monitoring and analysis on the full network loss, and also provide suggestions for a power grid to carry out the work of operation way optimization, technical reconstruction and the like with reduced grid loss rate.

One embodiment relates to a computer-implemented method of generating an executable program which includes inserting predicated calls to trace routines during compilation of the source code. Each predicated call comprises a function call that is conditional upon a value stored in a predicate register. The object code generated from compiling said source code is subsequently linked with object code which includes the trace routines. Another embodiment relates to a computer-implemented method of executing a deployed computer program with low-level tracing using compiler-inserted predicated tracing calls. A tracing mode is enabled by setting one or more predicate register bits in a microprocessor. Predicated calls to trace routines insert trace data into at least one trace buffer. Upon a system crash, a core file including said trace data is written out. Other embodiments, aspects and features are also disclosed.

Methods, apparatus, and articles of manufacture to iteratively compile software to meet user-defined criteria are disclosed. A disclosed example method receives target performance characteristics from a user and compiles source code to generate object code. The object code is then analyzed to determine measured performance characteristics. The measured performance characteristics are then compared to the target performance characteristics. If the measured performance characteristics are unacceptable based on the target performance characteristics, the one of a plurality of compiler options configurations is selected based on empirical data correlating the compiler options configurations to structural characteristics of at least one of the source code or the object code. Without obtaining further user input, the operations are repeated one or more times until the measured performance characteristics are substantially equal to the target performance characteristics or until a predetermined number of recompilations have occurred.

The present invention reduces overhead in a VLIW type microprocessor including a dynamic compiler or controls a memory capacity for storing an object code after scheduling. The present invention relates to a VLIW microprocessor including a dynamic compiler and improves operation performance of a microprocessor by executing instructions more efficiently. Specifically, one feature of the present invention is to reduce overhead accompanying execution of a dynamic compiler and to control a memory capacity for storing an object code after scheduling internal instructions by using genetic algorithm (GA) in an execution of instructions in a VLIW microprocessor including a dynamic compiler.

A system and method for creating run time executables in a configurable processing element array is disclosed. This system and method includes the step of partitioning a processing element array into a number of defined sets of hardware accelerators, which in one embodiment are processing elements called “bins”. The system and method then involves decomposing a program description in object code form into a plurality of “kernel sections”, where the kernel sections are defined as those sections of object code which are candidates for hardware acceleration. Next, mapping the identified kernel sections into a number of hardware dependent designs is performed. Finally, a matrix of the bins and the designs is formed for use by the run time system.

Digital signatures of various aspects or characterizing indicia of object code classes are used to determine whether a compiled class has built-in assumptions about external classes that are incorrect due to modification and recompilation of the external class. The indicia generally involve an encoding of the layout of various run time structures in the external class such as field tables or method tables.

An object code hot update system generates hot updates for patching running programs by analyzing upstream post-patch code, augmenting the upstream post-patch code to provide augmented post-patch code with additional initialization functionality. The system further provides techniques to identify a candidate extra-change site in upstream post-patch code and modify the upstream post-patch code to generate a hot update.