11 results about "Virtual address space" patented technology

The application provides a memory performance test method and device, a microprocessor architecture and a storage medium, and is applied to the technical field of computers. After obtaining a memory mapping request of a user state program, the method obtains target page table attributes associated with a target file descriptor carried by the memory mapping request and allocates target physical memory. Then, the method configures page table entries of a memory page table according to the target page table attributes, establishes address mapping between the target physical memory and a virtual address space in the memory page table, and finally feeds back address information of the virtual address space to the user state program, so that the user state program performs memory testing based on the obtained address information. The file descriptor is associated with target page table attributes preconfigured by the user state program. By initiating a memory mapping request carrying different file descriptors, virtual address spaces mapped according to different page table attributes can be obtained, the test process is greatly simplified, the flexibility of the test process is improved, and the test efficiency is improved.

Types of deltas other than those associated with absolute distance within a virtual address space are used in a memory management system to flexibly represent distances in different spaces and provide access predictions that inform prefetching from swap memory to near memory. Some deltas may represent spatial distance in the space of swapped-out pages and other deltas may represent temporal distance such as differences in swap-out times. In some of these spaces, even small deltas can represent large distances in the virtual address space. Deltas of different granularities may be used. The access predictions may also be used to filter and suppress potential swap-outs as well.

This application discloses a method, apparatus, electronic device, and computer-readable medium for determining memory regions, applied to an electronic device. The method includes: obtaining the virtual address space of the electronic device when the electronic device executes a process, the virtual address space including at least one virtual address segment; dividing the virtual address space into a specified number of virtual address segments to obtain at least one first-level page table; if at least two target virtual address segments exist in the first-level page table, using the first-level page table as the target page table, the data stored in the physical address segment of the target virtual address segment cannot be successfully retrieved; if the target virtual address segment does not have a corresponding physical address segment, then re-matching a physical address segment for the target virtual address; and using the physical address segment corresponding to each virtual address segment in the target page table as a hot segment. This allows for quick and efficient identification of hot segments within physical address segments.

Embodiments of the present application provide a memory management method, device and related product, wherein the memory management method comprises: determining an amount of data required for a character visualization in a graphics application; determining a target size of a first buffer according to the amount of data required for the character visualization, wherein the first buffer is continuous in a virtual address space; and adjusting a size of the first buffer for storing the data required for the character visualization according to the target size.

A memory management method and apparatus are provided, relating to the field of storage technology. The method is executed by a first device in a storage system, the first device supporting a page table with a first bit width, and a second device supporting a page table with a second bit width. The first device requests memory based on a first segment registration request, obtaining a first virtual address space. If the first virtual address space exceeds the first bit width, the first segment is split into a second segment and a third segment. The second and third segments are contiguous when memory addressing is performed based on the second bit width page table. Page table registration is performed on the second and third segments respectively. This adds processing logic for the first device on the first bit width virtual address, mapping the first bit width virtual address to the second bit width virtual address, enabling the second device to process the first bit width virtual address, thus solving the problem of page table incompatibility between devices with different architectures.

The application discloses a time series data processing method and device, equipment and storage medium, relates to the technical field of data processing, and comprises the following steps: mapping an original time series data file to a virtual address space to obtain mapped time series data; performing parallel pre-scanning on the mapped time series data through a plurality of analysis threads, and counting the amount of data to be processed corresponding to each calculation thread; allocating a dedicated memory area to each calculation thread according to the amount of data to be processed, completely analyzing the mapped time series data through each analysis thread, distributing the analyzed mapped time series data to the dedicated memory area of each calculation thread, and independently performing parallel calculation to obtain the statistical characteristics of the mapped time series data; and aggregating the statistical characteristics to a global result pointer array in the original data order, and asynchronously writing the completed statistical characteristics in the global result pointer array into a storage device in the process of parallel calculation of the calculation thread. The application can realize efficient and low-delay processing of massive time series data.

A method of securing a virtual address space against unauthorized access from an unauthorized agent includes generating a superimposed address space corresponding to the virtual address space, dilating the superimposed address space by inserting dummy memory at a plurality of locations in the superimposed address space, and displacing the superimposed address space by shifting a segment of the superimposed address space by a d-bit key. A computer processor includes a memory and a dedicated functional unit in a stage of a pipeline of the computer processor, the computer processor including an instruction that when executed by the dedicated functional unit causes the computer processor to translate one or more pointers between displaced and dilated address spaces of the memory and virtual address spaces of the memory.

This invention provides a cross-process video memory over-allocation management method and system for Ascend devices. The method includes taking over the ACL runtime interface through a shared library, reserving the device's virtual address space and returning stable logical addresses during the application memory allocation phase; when an operator execution request arrives, the system dynamically constructs a set of participating addresses and performs on-demand mapping and partial swapping in and out of video memory; when the local process's video memory is insufficient, the system uses a shared memory ledger to communicate with other processes to achieve cross-process video memory quota coordination. This invention achieves unified video memory coordination among multiple independent processes on the same device through a shared memory ledger and inter-process reclamation requests, breaking down process-level video memory resource silos and improving video memory utilization, capacity elasticity, and deployment flexibility in multi-process inference scenarios.

The application discloses a zero-copy data transmission method, device, medium and product, and belongs to the technical field of data transmission, which comprises the following steps: an application program requests a memory buffer to a kernel module; the kernel module allocates a physical memory buffer according to the request and returns a specially designed descriptor (including a handle corresponding to an address pointer); the application program submits the descriptor to the kernel module and requests the address pointer of the memory buffer; after verifying the descriptor, the kernel module maps the physical memory buffer to the virtual address space of the application program and returns the corresponding address pointer; the application program writes data to be sent according to the address pointer, and after the writing is completed, the application program submits the descriptor to the kernel module and requests to send the written data; after verifying the descriptor, the kernel module configures and starts a DMA controller, directly reads the written data from the physical memory buffer and pushes the data to a network card for sending. The application can guarantee transmission performance, improve safety and certainty.

This application provides a data packet detection method, apparatus, device, storage medium, and program. The method includes: acquiring multiple network data packets in network hardware and storing them in a virtual address space; the graphics processor includes multiple computing units; acquiring the load status of each computing unit; based on the load status of each computing unit, performing parallel processing on the multiple network data packets through the multiple computing units to obtain the target processing result corresponding to each network data packet; for any given network data packet, if the target processing result corresponding to the network data packet is abnormal, generating detection alarm information for the target processing result of the network data packet, the detection alarm information being used to indicate a security event notification. The method of this application can improve the processing efficiency of data packet detection.

The method for realizing the sub-page function of a virtual machine monitor comprises the following steps: registering each sub-page space as an analog MMIO device, and applying a virtual address space for each MMIO device; establishing a permanent page table under the virtual address space EL2 for each sub-page space; when the virtual machine monitor establishes IPAs for each guest machine, removing the address range of the sub-page space, so that the guest machine generates a page fault when accessing the sub-page device, thereby entering the virtual machine monitor; intercepting the IO of the guest machine and extracting and calculating the corresponding MMIO device number of the accessed physical address, and directly performing sub-page access by using the virtual address space EL2 corresponding to the MMIO device. The present application guarantees the safe isolation and sandbox function of the guest machine through permission checking. The high-efficiency access of the sub-page is realized by the method of establishing a permanent page table. The safety of the sub-page function is guaranteed, and the virtualization loss rate is greatly reduced.