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6results about How to "Efficient mapping" patented technology

Rapid magnetic resonance imaging reconstruction and segmentation method, system, medium and product

ActiveCN121962424AReduce hardware computing power requirementsMeet demanding speed requirementsImage enhancementImage analysisImaging processingImage manipulation
The invention discloses a rapid magnetic resonance imaging reconstruction and segmentation method and system, a medium and a product, and relates to the technical field of image processing. The method comprises the following steps: decomposing original three-dimensional magnetic resonance data into a plurality of independent two-dimensional magnetic resonance data slices along a slice sequence; image reconstruction is carried out on the two-dimensional magnetic resonance data slices through a pre-trained forward generator in the frequency domain Schrodinger bridge diffusion model so as to generate a two-dimensional magnetic resonance image, and the forward generator integrates a Fourier convolution module and is used for carrying out frequency domain transformation and feature enhancement processing on feature mapping in the image reconstruction process; inputting each two-dimensional magnetic resonance image into a pre-trained segmentation model in sequence, performing segmentation of a target region and a preset dangerous organ, and generating a corresponding two-dimensional segmentation mask; all the two-dimensional segmentation masks are rearranged and stacked according to the slicing sequence, and a three-dimensional segmentation result is generated through three-dimensional fusion operation. By implementing the technical scheme, magnetic resonance imaging reconstruction and segmentation can be quickly and accurately carried out.
Owner:MEDMIND TECH CO LTD

A unified systolic array computing unit for ann and snn

The application provides a unified systolic array computing unit for ANN and SNN, comprising a shift-add computing processing unit and a systolic array formed by arrayed deployment of the shift-add computing processing unit; an execution of artificial neural network operation or pulse neural network operation is switched through a configuration mode selection signal terminal; in the artificial neural network mode, multiplication operation is unfolded in the time dimension, and a shift register and an adder constitute a time division multiplexing operation sequence to complete multiplication and accumulation operation; in the pulse neural network mode, a weighting accumulation is directly completed through multiplexing of an addition link, and a neuron time step dependent chain is decoupled through a soft reset mechanism to realize cross-time step weight multiplexing; control signals and data are propagated in the same direction in the systolic array, which is used for realizing control logic array level multiplexing, and fixed data flow is adopted for the output, so that partial sums are preferentially resident in the array interior; the working frequency can be improved, the bandwidth and power consumption can be reduced, and the area efficiency and timing convergence can be improved.
Owner:GUANGZHOU RES INST OF XIAN UNIV OF ELECTRONIC SCI & TECH

A coordinate-based five-dimensional seismic data interpolation method and system

The application discloses a five-dimensional seismic data interpolation method and system based on coordinates, constructs a point-by-point seismic data interpolation model based on a NeRF theory, modifies an MLP framework by combining an additional convolution layer on the basis of the point-by-point interpolation model, constructs a profile-by-profile seismic data interpolation model, introduces kernel norm regularization to construct an objective function, reads original five-dimensional seismic data D obs and inputs the five-dimensional seismic data with missing traces into the network to realize reconstruction of the five-dimensional seismic data. The application eliminates the need for additional labeled data, utilizes unique characteristics of seismic data, enables a convolution network decoder to output data profile by profile, can significantly improve data processing efficiency by 40 times, and increases kernel norm regularization in the objective function, so that the noise resistance and robustness of the model can be effectively improved.
Owner:XI AN JIAOTONG UNIV

A method and system for registration of spatial metabolic composition images with HE stained images

This invention relates to the fields of biomedical imaging and spatial metabolomics, specifically to a method and system for registering spatial metabolomics images with HE-stained images. The method includes the following steps: acquiring two adjacent frozen sections of the same tissue sample; performing image preprocessing using the frozen sections; obtaining the extraction and matching results of key point features in the images; performing rigid image registration and obtaining a rigid registration result; performing non-rigid image registration and obtaining a non-rigid registration result; and obtaining the spatial location information of the spatial metabolic imaging using the non-rigid registration result. This invention, by combining advanced image processing technology and machine learning algorithms, automatically registers metabolic imaging images with HE-stained images, significantly improving registration accuracy and efficiency. It effectively solves the problems of large errors, low efficiency, and strong operational dependence in existing manual registration methods, meeting the needs of high-throughput, high-precision spatial metabolomics analysis and supporting large-scale data processing.
Owner:FOSHAN CHANCHENG CENT HOSPITAL CO LTD +1

LDPC (Low Density Parity Check) decoding method, device, equipment, storage medium and program product

Provided are an LDPC decoding method, apparatus, device, storage medium and program product, the LDPC decoding method comprising: determining a first scaling factor according to a first SINR of a communication link transmission symbol, the first scaling factor being used for processing a first log-likelihood ratio LLR, the first LLR being a floating point LLR; performing fixed-point quantization processing on the first LLR according to the first scaling factor to obtain a second LLR; inputting the second LLR into a decoder, and decoding the second LLR by using an LDPC decoding algorithm according to a first sequence to obtain a decoded bit message output by the decoder; the decoder comprises multiple layers of decoding structures arranged in sequence; the first sequence is an inverse sequence of the arrangement sequence of the multiple layers of decoding structures. According to the invention, through a layered LDPC decoding algorithm combining fixed-point quantization and inverted processing, the decoding performance is improved, and the complexity of the LDPC decoding algorithm is reduced.
Owner:CHINA MOBILE ZIJIN INNOVATION INST CO LTD +2

Process flow discrete simulation method, electronic device, storage medium and product

PendingCN122363092AImplement mappingachieve decouplingManufacturing technologyState space decomposition
This application discloses a discrete simulation method for process flow, electronic equipment, storage medium, and products, relating to the field of industrial manufacturing technology. This application constructs workpiece entities and process information components through a physical component system, achieving efficient mapping between data and simulation tokens. Through Petri net state space decomposition, key process states are mapped to locations, and actions are abstracted into transitions, forming a logical topology and decoupling process states from control flow. Combining equipment constraints, general resources, and dynamic and fixed-time components, transition execution is divided into four standard types, and asynchronous event simulation is driven by standardized lifecycle templates, achieving accurate workpiece state updates and rational resource scheduling under high concurrency. This application can provide real-time response, process flow analysis, and bottleneck identification in large-scale simulations, providing efficient and flexible technical support for process optimization and digital twin systems.
Owner:SHIPBUILDING TECHNOLOGY RESEARCH INSITITUTE (NO 11 INSTITUTE OF CSSC)