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3567 results about "Stream" patented technology

In computer science, a stream is a sequence of data elements made available over time. A stream can be thought of as items on a conveyor belt being processed one at a time rather than in large batches.

Media delivery using quality of service differentiation within a media stream

A WLAN system adapted to apply QoS differentiation to a media stream to be transmitted from a transmitting station (STA) to a receiving STA of that system. The transmitting STA processes the media stream to generate a base sub-stream and one or more enhancement sub-streams for subsequent transmission over a wireless communication channel and assigns different priorities to different sub-streams. Depending on the channel conditions, the transmitting STA may select to discard, without transmission, portions of data from enhancement sub-streams. The selection process is based on the assigned priority and operates to preserve as much of relatively high-priority data as possible. The receiving STA then processes the received data to generate a reconstructed media stream, which provides signal quality equal to or better than the signal quality supported by the base sub-stream. Advantageously, a WLAN system of the invention is adapted to change signal quality dynamically and incrementally in a manner commensurate with current channel conditions without the need for communication between the higher and lower network layers. In addition, it provides gradual and graceful degradation of signal quality when channel conditions deteriorate as opposed to abrupt degradation inherent in analogous prior art systems.
Owner:AVAGO TECH INT SALES PTE LTD

Intelligent data storage and processing using fpga devices

A data storage and retrieval device and method is disclosed. The device includes at least one magnetic storage medium configured to store target data and at least one re-configurable logic device comprising an FPGA coupled to the at least one magnetic storage medium and configured to read a continuous stream of target data therefrom, having been configured with a template or as otherwise desired to fit the type of search and data being searched. The re-configurable logic device is configured to receive at least one search inquiry in the form of a data key and to determine a match between the data key and the target data as it is being read from the at least one magnetic storage medium. This device and method can perform a variety of searches on the target data including without limitation exact and approximate match searches, sequence match searches, image match searches and data reduction searches. This device and method may be provided as part of a stand-alone computer system, embodied in a network attached storage device, or can otherwise be provided as part of a computer LAN or WAN. In addition to performing search and data reduction operations, this device may also be used to perform a variety of other processing operations including encryption, decryption, compression, decompression, and combinations thereof.
Owner:IP RESERVOIR

Intelligent data storage and processing using FPGA devices

A data storage and retrieval device and method is disclosed. The device includes at least one magnetic storage medium configured to store target data and at least one re-configurable logic device comprising an FPGA coupled to the at least one magnetic storage medium and configured to read a continuous stream of target data therefrom, having been configured with a template or as otherwise desired to fit the type of search and data being searched. The re-configurable logic device is configured to receive at least one search inquiry in the form of a data key and to determine a match between the data key and the target data as it is being read from the at least one magnetic storage medium. This device and method can perform a variety of searches on the target data including without limitation exact and approximate match searches, sequence match searches, image match searches and data reduction searches. This device and method may be provided as part of a stand-alone computer system, embodied in a network attached storage device, or can otherwise be provided as part of a computer LAN or WAN. In addition to performing search and data reduction operations, this device may also be used to perform a variety of other processing operations including encryption, decryption, compression, decompression, and combinations thereof.
Owner:IP RESERVOIR

Representation and verification of data for safe computing environments and systems

Techniques for representation and verification of data are disclosed. The techniques are especially useful for representation and verification of the integrity of data (integrity verification) in safe computing environments and / or systems (e.g., Trusted Computing (TC) systems and / or environments). Multiple independent representative values can be determined independently and possibly in parallel for respective portions of the data. The independent representative values can, for example, be hash values determined at the same time for respective distinct portions of the data. The integrity of the data can be determined based on the multiple hash values by, for example, processing them to determine a single hash value that can serve as an integrity value. By effectively dividing the data into multiple portions in multiple processing streams and processing them in parallel to determine multiple hash values simultaneously, the time required for hashing the data can be reduced in comparison to conventional techniques that operate to determine a hash value for the data as a whole and in a single processing stream. As a result, the time required for integrity verification can be reduced, thereby allowing safe features to be extended to devices that may operate with relatively limited resources (e.g., mobile and / or embedded devices) as well as improving the general efficiency of device that are or will be using safety features (e.g., Trusted Computing (TC) device).
Owner:SAMSUNG ELECTRONICS CO LTD

Method and apparatus for programmable generation of traffic streams

Methods and apparatus provide single or multi-port, flexible, cost-effective, built-in self-test capabilities for network communications equipment, such as for example switches, and programmably generate, and subsequently analyze, one or more sequences of test packets, wherein the test packets simulate at least two flows of traffic. Such test packets can have programmable headers, payloads, and duty cycle. A line card embodying the present invention may generate its own traffic pattern, which may be similar or identical, to traffic patterns observed on Internet backbones. These traffic patterns may contain a bimodal distribution of control packets interspersed with data packets wherein the control packets and data packets are relatively short and long respectively. A plurality of test packet generators / receivers can be deployed in a network communications device having a plurality of ports. In such a configuration, test generator / receiver is associated with each of the plurality of ports. Under software control, test packets can be sent from at least any one of the plurality of ports to at least any other one of the plurality of ports. In this way, an in-circuit testing procedure may be implemented without having to disconnect line cards from the switch and connect the switch to expensive external test equipment.
Owner:XYLON LLC

Novel Karaoke and Multi-Channel Data Recording / Transmission Techniques via Wavefront Multiplexing and Demultiplexing

An advanced channel storage and retrieving system is achieved that is capable of simultaneously transporting multiple-stream data concurrently, with encryptions and error detection and limited correction capability using wavefront (WF) multiplexing (muxing) at the pre-processing and WF demultiplexing (de-muxing) in the post-processing. The WF muxing and demuxing processing can be applied for multiple signal streams with similar contents and format such as cable TV delivery systems or multiple signal streams with very distinct contents and format such as Karaoke multimedia systems. The stored or transported data are preprocessed by a WF muxing processor and are in the formats of multiple sub-channels. Signals in each sub-channel are results of unique linear combination of all the input signals streams. Conversely, an input signal stream is replicated and appears on all the sub-channels. Furthermore the replicated streams in various sub-channels are “linked” together by a unique phase weighting vector, which is called “wavefront” or WF. Various input signal streams will feature different WFs among their replicated signal streams in the sub-channels. The WF muxing processing is capable to generating a set of orthogonal WFs, and the WF demuxing processing is capable of reconstituting the input signal streams based on the retrieved sub-channel data only if the orthogonal characteristics of a set of WFs are preserved. Without the orthogonality among the WF, the signals in sub-channels are mixed and become effectively pseudo random noise. Therefore, an electronic locking mechanism in the preprocessing is implemented to make the WFs un-orthogonal among one another. Similarly, an electronic un-locking mechanism in the post-processing is implemented to restore the orthogonal characteristics among various WFs embedded in the sub-channel signals. Some of the phenomena due to the selected locking mechanisms are reproducible in nature, such as wave propagating effects, and other are distinctively man-made; such as switching sub-channel sequences. There are other conventional encryption techniques using public and private keys which can be applied in conjunction with the WF muxing and de-muxing processor, converting plain data streams into ciphered data streams which can be decoded back into the original plain data streams. An encryption algorithm along with a key is used in the encryption and decryption of data. As to the optional parallel to serial and serial to parallel conversions in the pre and post processing, respectively, we assume that transmissions with single carrier are more efficient than those with multiple carriers. We also assume single channel recording is more cost effective than multiple channel recording. However, there are occasions that continuous spectrum is hard to come-by. We may use fragmented spectrum for transmissions. There are techniques to convert wideband waveforms using continuous spectra into multiple fragmented sub-channels distributed on non-continuous frequency slots. Under these conditions we may replace the parallel to serial conversion processing by a frequency mapping processor.
Owner:SPATIAL DIGITAL SYST

Network distributed remultiplexer for video program bearing transport streams

A method and system are provided for remultiplexing program bearing data. The remultiplexing method and system are applicable to MPEG-2 compliant transport streams carrying video programs. A descriptor based system is used for scheduling the timely output of transport packets wherein each descriptor records a dispatch time as well as a receipt time for each transport packet. The receipt time is used for estimating program clock reference adjustments, but final program clock reference adjustment is performed in hardware in relation to the precise output timing of each transport packets. A descriptor and transport packet caching technique is used for decoupling the synchronous receipt and transmission of transport packets from any asynchronous processing performed thereon. The descriptors can also be used for managing scrambling and descrambling control words (encryption and decryption keys). Remultiplexing functions may be distributed across a network. The remultiplexer can furthermore optimize the bandwidth of transport streams by replacing null transport packets with transport packet data to be inserted into the output transport stream. Program data transmitted via asynchronous communication links is re-timed and assistance is provided for outputting program data on such asynchronous communication links to reduce a variation in end-to-end delay incurred by the program data. Remultiplexing and program specific information can be searnlessly dynamically varied without stopping, or introducing a discontinuity in, the flow of outputted transport packets. A technique is also provided for locking multiple internal reference clock generators.
Owner:VENTURE LENDING & LEASING IV

Scratch protection in tape data storage system

A method of redundancy coding of user data received from a host apparatus and storage of said coded data on a magnetic tape data storage medium comprises inputting a byte stream of user data into a buffer and assembling a plurality of data sets in the buffer; for each data set assembling a data set into a two-dimensional data array and (1103) applying a second redundancy coding algorithm (C2 parity) to the two-dimensional data set in a second dimension; applying (1105) a first redundancy coding (C1 parity) algorithm to the second redundancy coded data array in a first dimension to form a two-dimensional data frame having second and first redundancy coding in respective second and first dimensions, the two-dimensional data frame comprising a plurality of rows, each row comprising a first codeword and a plurality of columns, each column comprising a second codeword; partitioning the two-dimensional data frame into a plurality of logical track blocks (1106) each comprising a plurality of first codewords; and recording (1110) each logical track block to a corresponding respective physical track on the magnetic tape data storage medium. Redundancy coding of a data frame is distributed across a plurality of other data frames along the tape, and redundancy bytes of each data frame are distributed across a plurality of data tracks. Redundancy coding may be distributed diagonally across a width of the tape. Data obliterated due to damage to individual physical recorded tracks or sections of tracks on the tape may be recovered from redundant coding data distributed across other adjacent parallel physical tracks on the tape.
Owner:HEWLETT-PACKARD ENTERPRISE DEV LP

Method and apparatus for video transmission over a heterogeneous network using progressive video coding

A video signal is encoded in a progressive video coder so as to generate a progressive coded video bit stream for transmission over a heterogeneous network. The progressive coded video bit stream is configured so as to be decodable at any one of a series of increasing bit rates up to a maximum bit rate, depending on which of a number of corresponding portions of the progressive coded video bit stream are received by a decoder. Each of the portions is associated with a different bit rate, and one or more of the portions may each also be associated with different values of other parameters such as frame rate, spatial resolution, and peak signal-to-noise ratio. Each of the series of increasing bit rates produces progressively better reconstructed video quality at an output of the decoder. The progressive coded bit stream is transmitted over a first part of the heterogeneous network at a first one of the bit rates. One or more selected portions of the progressive coded video bit stream are then transmitted from the first part of the heterogeneous network to a second part of the heterogeneous network. The selected portions are associated with a second one of the bit rates lower than the first bit rate, and may be selected based on an error detected in the transmission over the first part of the heterogeneous network, and/or a characteristic of the second part of the heterogeneous network. The invention provides efficient bit rate scalability and adaptability and is particularly well-suited for use in conjunction with transmission over heterogeneous wired-to-wireless networks.
Owner:AVAGO TECH INT SALES PTE LTD

Efficient de-quantization in a digital video decoding process using a dynamic quantization matrix for parallel computations

An efficient digital video (DV) decoder process that utilizes a specially constructed quantization matrix allowing an inverse quantization subprocess to perform parallel computations, e.g., using SIMD processing, to efficiently produce a matrix of DCT coefficients. The present invention utilizes a first look-up table (for 8x8 DCT) which produces a 15-valued quantization scale based on class number information and a QNO number for an 8x8 data block ("data matrix") from an input encoded digital bit stream to be decoded. The 8x8 data block is produced from a deframing and variable length decoding subprocess. An individual 8-valued segment of the 15-value output array is multiplied by an individual 8-valued segment, e.g., "a row," of the 8x8 data matrix to produce an individual row of the 8x8 matrix of DCT coefficients ("DCT matrix"). The above eight multiplications can be performed in parallel using a SIMD architecture to simultaneously generate a row of eight DCT coefficients. In this way, eight passes through the 8x8 block are used to produce the entire 8x8 DCT matrix, in one embodiment consuming only 33 instructions per 8x8 block. After each pass, the 15-valued output array is shifted by one value position for proper alignment with its associated row of the data matrix. The DCT matrix is then processed by an inverse discrete cosine transform subprocess that generates decoded display data. A second lookup table can be used for 2x4x8 DCT processing.
Owner:SONY ELECTRONICS INC +1
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