65 results about "Page fault" patented technology

The invention discloses a thread scheduling method and device, electronic equipment and a storage medium, and belongs to the technical field of operating systems. The method comprises the steps that a DSM PF event of a virtual machine is monitored, and the DSM PF event is triggered when a plurality of threads access the same shared memory page in a cross-node mode; according to the DSM PF events, an inter-thread incidence matrix is constructed, and the inter-thread incidence matrix is used for quantifying the number of times of triggering the DSM PF events between any two threads; the thread graph structure is divided to generate a thread grouping scheme with the aim of minimizing the number of DSM PF events between different grouping threads, the vertex of the thread graph structure represents the threads, and the adjacency matrix of the thread graph structure is the incidence matrix between the threads.

The present application discloses a memory management method and an electronic device. The method is executed by an electronic device. In the method, a hardware accelerator detects a first event, the first event indicating that the probability of a page fault occurring in a first DMA memory used by a first application is greater than a first threshold; in response to the first event, the hardware accelerator performs one or more of the following operations: checking and killing a first process of the first application; and writing first data of the first application in a disk into the first DMA memory, and updating a first memory page table, the first memory page table comprising a mapping of a virtual address on the hardware accelerator side to a physical address on the first DMA memory side. During implementation of the present application, the hardware accelerator can handle a page fault that may occur in the DMA memory, thereby improving efficiency of memory management.

A memory management method and module, a chip, an electronic device, and a storage medium. The memory management method comprises: scanning memory pages to which virtual addresses of a discontinuous memory mapping space are mapped to acquire a compressible memory page as a first memory page; compressing memory data in the first memory page to acquire corresponding memory compressed data; storing the memory compressed data in a data storage module, the data storage module being located in memory space outside the discontinuous memory mapping space; after storing the memory compressed data in the data storage module, releasing the first memory page; and setting the corresponding virtual address as a page fault address. The memory utilization is improved.

Embodiments of the present disclosure provide a data transmission method, a device, a storage medium, and a program product. The embodiments of the present disclosure provide a software-implemented RDMA memory page fault solution: when acquiring data from a remote memory, a remote end maps a page-faulted virtual memory into a specific physical memory region, allows for the occurrence of a memory page fault in an RDMA process, and adds a memory page fault processing flow between a local end and the remote end to implement memory page fault processing; and when writing data into the remote memory, the remote end provides a shared virtual memory and a private virtual memory and exposes the shared virtual memory to the local end, the local end writes data into the shared virtual memory, and then a remote control object migrates the data to the private virtual memory, wherein memory page faults are allowed to occur and be processed during the migration. Since memory page faults are allowed to occur and page fault processing is supported, dynamic allocation of physical memory resources is supported during the RDMA process, thereby improving the utilization of memory resources while leveraging the advantages of RDMA.

According to a memory page processing method, after a memory page is allocated to a virtual address that causes a page fault, the allocated memory page is pre-padded with first data, and then the memory page padded with the first data is accessed. Subsequently, if data in the memory page is migrated to a cache, the first data padded in the memory page is also migrated to the cache. If the data in the memory page is evicted from the cache to a memory, the evicted cache data may also include the first data.

A method for processing a page fault in memory access includes: sending a first access request, where the first access request is used to access memory, and the first access request includes a first virtual address; receiving the first access request, and sending a first response, where the first response carries page fault information, and the page fault information indicates a fault type of a page fault corresponding to the first virtual address; and receiving the first response, to process a related access request based on the fault type indicated by the page fault information carried in the first response.

Embodiments of the present specification provide a page table sharing method and a page fault exception processing method, wherein the page table sharing method comprises: in response to an access request of a first process accessing memory, allocating a plurality of virtual memory areas for the first process; for a target virtual memory area in the plurality of virtual memory areas, allocating a shadow virtual memory area, wherein the shadow virtual memory area is used to share a virtual memory area of a second process having the same attribute as the target virtual memory area; and determining a target shared page table corresponding to the shadow virtual memory area. By introducing the design of page table sharing for common shared memory, the process can use the page table sharing function without reserving memory in advance, thereby improving the universality of page table sharing. By allocating a plurality of virtual memory areas for the first process, the coverage of page table sharing is improved, and the introduction of the shadow virtual memory area simplifies the positioning of the shared page table and reduces the page table overhead of the shared memory.

The present application relates to devices and components, including apparatus, systems, and methods for scheduling delivery and execution of page fault or permission fault exceptions. A memory management unit may receive a virtual address associated with an execution mode and initiate a virtual-to-physical translation operation. The MMU may detect a first condition associated with a search of the virtual address in a translation lookaside buffer (TLB). In response to the detection of the first condition, MMU may start a timer. MMU may detect a fault exception associated with the translation operation of the virtual address and determine that a second condition is satisfied. In response to detecting the second condition, the MMU or the reorder buffer exception monitor may deliver the fault exception based on the timer.

The invention discloses a front-end resource disaster recovery method, electronic equipment, a storage medium and a program product, and relates to the technical field of Internet, comprising the steps of uniformly gathering disaster recovery decision logic from a client to a server, solving the inherent problems of'black box ', difficulty in operation and maintenance and poor consistency of a client scheme, and improving the disaster recovery efficiency. A foundation is laid for constructing an observable and manageable disaster recovery infrastructure; the'health state information 'is combined with the'network address scheduling strategy', so that the failover occurs before the user request is processed; the resource link in the hypertext markup language document is available, so that the performance loss and the experience lagging caused by waiting for overtime loading of the front-end script are eliminated; the uniform resource locators of all the static resources are uniformly replaced in one-time server rendering, so that all the static resources in the page are ensured to be from the same content distribution network address, and page errors caused by mismatching of resource versions are avoided.

The application belongs to the technical field of computer memory management, and discloses an active page replacement method and system based on regional reuse mode identification, which comprises the following steps: working set identification based on memory access sample clustering, obtaining memory access samples by sampling the memory access instructions of a process, and clustering the samples to obtain the working set in the current monitoring window in real time; adaptive memory region division based on working set integration, dividing the address space into regions according to virtual address continuity and adaptively splitting / merging; reuse mode identification based on state transition, determining the reuse mode of each region according to the switching between hot and cold states of each region and the state duration; active page replacement and prefetching method based on the reuse mode, prefeteching the regions that will reach the reuse time, and triggering the replacement of the regions that are in the cooling state for a long time. Compared with the existing passive page fault triggering method, the application can reduce the page fault and jitter, reduce the replacement traffic, and improve the application execution efficiency and system throughput.

The application discloses a memory data management method, an electronic device, a storage medium and a program product, relates to the technical field of storage, and comprises the following steps: realizing memory data management based on a native memory management mechanism and a page fault exception mechanism, processing the physical address of to-be-encrypted data by using a first key through step-by-step encryption, performing exclusive or operation on the obtained first ciphertext and the to-be-encrypted data, and storing the obtained second ciphertext into a red-black tree in a memory space, so that the encryption range is expanded, the data security is improved, the memory space and the red-black tree are fully utilized, and the addition, deletion and modification performance is improved. The target second ciphertext to be migrated is further encrypted and written into a swap area file. The method is realized by using pure software and does not depend on specific hardware devices. The technical problems of poor compatibility, high cost, being not conducive to large-scale application and great influence on system performance are solved, the technical effects of good compatibility, reduced cost, convenience for large-scale application and reduced influence on system performance are achieved.

The application provides a NUMA system page cache copy management method and system. The application first generates a read-only copy page in the local memory of an access node through the linkage of target file page cache identification, access subject NUMA node information acquisition and policy copy judgment, thereby avoiding cross-node remote memory access. Then, in combination with local copy priority mapping and page fault triggered by unmapping when process node scheduling is changed, the dynamic adaptation of process scheduling behavior and page mapping relationship is realized. Finally, in the read page fault interrupt process, the page mapping update is completed based on the copy strategy, and the association relationship between the node and the access task is recorded. Without damaging the file page cache semantics, the remote access overhead of the multi-NUMA node system file page cache can be greatly reduced, the problem of continuous remote access caused by process node drift can be solved, and the overall file access performance and running stability in the concurrent scenario can be significantly improved.

The invention relates to a large page allocation method and device, equipment, a storage medium and a program product. According to one embodiment of the invention, the method comprises the following steps: in response to detection of missing page interruption triggered by a memory in a running process of an application program, obtaining a virtual address required to be accessed by a current process of the application program; matching the size of a virtual memory area corresponding to the virtual address with preset different large page sizes to obtain a target large page size; and distributing a large page for the current process of the application program according to the target large page size. According to the method and the device, the large page with the proper size can be flexibly allocated according to the size of the virtual memory area, so that excessive memory resources are prevented from being occupied, the utilization rate of the memory resources can be improved, the problems of page missing interruption rate and TLB miss increase can be effectively solved, and the performance of an application program can be improved.

The invention relates to a page mapping self-adaptive generation method and system in a bare computer environment, and belongs to the field of memory management, the method comprises the following steps: establishing minimum necessary page table mapping in a system initialization process, setting a virtual address area where a core program is located as an effective mapping area, and setting other virtual address areas as invalid mapping areas; when the virtual address accessed by the processor executing the program instruction is an invalid mapping area, the MMU generates a data access synchronization exception, and obtains an exceptional virtual address and an access width of the data access synchronization exception; when the access synchronization exception is a missing page exception; performing granularity decision according to the abnormal virtual address and the access width, and generating a decision result; and creating or updating corresponding page table entries according to a decision result, and refreshing the TLB. According to the method, the problems of high starting overhead, low memory utilization rate and insufficient access security of a traditional scheme are solved, and the method is suitable for embedded bare computer systems such as ARMv8-A and the like.

Embodiments of the present application provide a memory access method, device and storage medium. In a device pass-through scenario, a shadow page is constructed for a target physical memory page where index information in an available ring is located. By maintaining the shadow page, the index information accessed by the pass-through device can be made to lag behind the index information maintained by the virtual machine, and work such as page fault recovery can be completed during the lag, thereby ensuring that the memory data is prepared before the pass-through device obtains a virtual machine memory address to be accessed, and ensuring that the pass-through device can normally implement DMA access without being aware of the page fault. In this way, memory page faults can also be supported in the device pass-through scenario, and on this basis, physical memory pages can be reused on demand without affecting memory access by the pass-through device, thereby effectively improving the utilization of physical memory.

The present invention provides a method and apparatus for high-performance page fault processing. [Solution] The device comprises one or more accelerator engines for processing work descriptors submitted to a plurality of work queues by a client, and fault handling hardware logic associated with one or more accelerator engines, which implements a specified page fault handling mode for each of the plurality of work queues, the page fault handling mode including a first page fault handling mode and a second page fault handling mode.

Apparatus and method for high-performance page fault handling. For example, one embodiment of an apparatus comprises: one or more accelerator engines to process work descriptors submitted by clients to a plurality of work queues; fault processing hardware logic associated with the one or more accelerator engines, the fault processing hardware logic to implement a specified page fault handling mode for each work queue of the plurality of work queues, the page fault handling modes including a first page fault handling mode and a second page fault handling mode.

The embodiment of the invention provides a large-page memory processing method and device, a storage medium and a program product. In the large-page memory processing method, a mechanism for actively mapping a large page of a code segment is introduced into a missing page processing flow executed by a kernel. Based on the mechanism, after a kernel determines a target virtual page with page missing abnormity, if a target interval which corresponds to the target virtual page and meets a large page alignment condition is located in a virtual address space of a code segment and has a continuous available physical memory matched with the size of the large page, the target virtual page is subjected to page missing abnormity; if yes, the kernel allocates a large-page physical memory matched with the large-page size in the direct physical memory. The kernel can reconstruct the large-page mapping relation of the target area according to the large-page physical memory before returning to the user mode. On the basis, a large page mapping mechanism is moved forward from background asynchronous scanning to a link of actually accessing a code segment, so that the code segment can obtain large page mapping as soon as possible in a key access path, and the hit rate and instruction access efficiency of the iTLB are greatly improved.

The invention discloses a server-free remote memory access performance optimization method based on cross-process memory tracking, and belongs to the technical field of computer memory management. The method comprises the following steps: designing a memory state table as a unified perception layer for remote memory access of homologous server-free containers, and realizing cross-process tracking of memory page states among different containers; a memory state table query process is embedded into hardware page table traversal, page state query is completed by hardware acceleration, and extra overhead on a memory access key path is eliminated; the remote memory access is merged and optimized based on the memory state table, cached local memory pages are reused in the container creation stage, the same remote memory access requests are merged in the operation stage, and the page missing exception frequency and the network bandwidth contention are reduced. According to the method, extra overhead caused by remote memory access in a server-free environment is effectively reduced, page missing abnormity and network bandwidth contention in a concurrent scene are greatly reduced, and the running performance and the system expandability of memory-intensive server-free applications are remarkably improved.

A memory management method and module, a chip, an electronic device, and a storage medium. The memory management method comprises: scanning memory pages to which virtual addresses of a discontinuous memory mapping space are mapped to acquire a compressible memory page as a first memory page; compressing memory data in the first memory page to acquire corresponding memory compressed data; storing the memory compressed data in a data storage module, the data storage module being located in memory space outside the discontinuous memory mapping space; after storing the memory compressed data in the data storage module, releasing the first memory page; and setting the corresponding virtual address as a page fault address. The memory utilization is improved.

The application discloses a controlled channel vulnerability automatic detection method based on control flow page access analysis, which comprises the following steps: building a conditional control flow memory page access real-time attack environment; using a memory management unit to allocate a limited number of physical memory page frames to a target application program; when the target application program starts to execute, recording the physical memory page numbers corresponding to triggered system interrupts or page fault exceptions, and generating a page fault exception sequence; analyzing the page fault exception sequence, searching for repeatedly occurring longest subsequences, and recording each longest subsequence and its repetition number; calculating the distance vector, average value and variance between two adjacent longest subsequences; and using machine learning to analyze the correlation between the page fault exception feature information and the target application program, so as to detect the controlled channel vulnerability of a sensitive target application program. The application has good detection target universality, and can automatically collect and analyze sensitive information leakage, output detection results, and is easy to deploy.

Embodiments of this application relate to the field of communication technologies, and provide a method and an apparatus for processing a page fault in memory access, to reduce network congestion caused by the page fault. The method for processing the page fault in memory access includes: sending a first access request, where the first access request is used to access memory, and the first access request includes a first virtual address; receiving the first access request, and sending a first response, where the first response carries page fault information, and the page fault information indicates a fault type of a page fault corresponding to the first virtual address; and receiving the first response, to process a related access request based on the fault type indicated by the page fault information carried in the first response. This reduces waiting time for completing page missing processing, and reduces network congestion caused by the page fault.

The application discloses a data collection method, device and computer readable storage medium, wherein the method comprises: when a data collection condition is met, a processor calls a first core of the processor to send a data collection instruction to a second core of the processor, the data collection instruction sent by the first core comprises breakpoint information obtained by the first core, the breakpoint information can be understood as breakpoint information corresponding to a page fault interrupt, the second core is further called to respond to the data collection instruction, to obtain the breakpoint information and a counting value of a processor event counter, and the second core is called to take the breakpoint information and the counting value obtained by the second core as performance index data of a target application program. Through the method, the accuracy and the universality of data collection in a big data scene can be improved.

A multi-backend disaggregated memory system and an optimization control method therefor, the memory system comprising: an intelligent far memory multi-backend management and control module and a multi-backend far memory swapper. The intelligent far memory multi-backend management and control module analyzes and processes a call that incurs a page error and triggers page swap, so as to obtain switching instruction information and parameter regulation instruction information; and the multi-backend far memory swapper receives and executes the switching instruction information and the parameter regulation instruction information, runs an application on a disaggregated memory architecture and a multi-backend far memory software system, and releases resources after the running is finished. By means of a memory swap policy and a system architecture which support a plurality of heterogeneous far disaggregated memory backends, the present invention analyzes application characteristics and realizes intelligent backend switching and data swap parameter adjustment while realizing parallel multipath far memory access to improve data throughput, thereby allowing for parallel access to a plurality of memory swap backend devices, fine-grained parameter configuration of far memory data access paths, real-time switching of a plurality of memory swap backends, as well as an intelligent control and management method for far memory access paths.

The application relates to the technical field of distributed computing and memory management, and discloses a memory dynamic resource allocation and scheduling method for big data system integration, which comprises the following steps: analyzing a distributed computing job to establish a mapping of a data block logical address to a local page table entry; generating an event notification when a downstream operator completes reading of the data block; writing data in a local physical page frame into a registered memory area of a remote computing node through RDMA, and constructing a remote memory index table in a kernel state; writing a remote redirection mark and an integer index, and releasing the corresponding local physical page frame; when a target page table entry triggers a page fault exception and contains the redirection mark, the system acquires a remote data address according to the integer index by querying the index table, pulls the remote data to update the page table entry, and restores process execution. The application effectively releases local memory resources, realizes on-demand recovery of remote data through a page fault exception mechanism of an operating system, and reduces system recalculation overhead.

Systems and methods for supporting page faults for virtual machine network accelerators. In one implementation, a processing device may receive, at a network accelerator device of a computer system, from a network, a first incoming packet and a second incoming packet. Responsive to receiving a first notification that an attempt to store the first incoming packet at a first buffer of a plurality of buffers associated with the network accelerator device caused a page fault, the processing device may store the first incoming packet at a second buffer and append a first identifier of the first buffer to a faulty buffer data structure. Responsive to receiving a second notification indicating a resolution of the page fault, the processing device may remove the first identifier from the faulty buffer data structure. The processing device may store the second incoming packet at the first buffer. The processing device may forward, to a driver of the network accelerator device, a second identifier of the second buffer and the first identifier of the first buffer.

The invention provides a zswap memory compression software and hardware collaborative acceleration system and method based on IAA, and belongs to the technical field of computers. The system receives an asynchronous compression / decompression request through an IAA memory compression rear-end module, and submits the asynchronous compression / decompression request to IAA hardware or returns to a software path after load balancing; through a batch swap-out engine module, asynchronously submitting page compression tasks and waiting for recycling in batches; through an asynchronous swap-in engine module, asynchronously submitting a page decompression task and executing the page decompression task and metadata maintenance operation in parallel; and processing the current missing page in a polling mode through a dual-mode prefetching module, and asynchronously prefetching the page in an interrupt mode. According to the method, on the basis of asynchronization, batch and load balancing, the IAA memory hardware accelerator is introduced, the swap-out and swap-in synchronization path in the zswap is modified into the asynchronous path, the efficient zswap memory layering technology is achieved, and the utilization rate of memory resources in the cloud scene is further increased.