1554 results about "Memory management" patented technology

A platform for coordinating networks of specialized AI agents that enables secure collaboration through token-based communication and real-time result streaming. The system features a central orchestration engine managing interactions between domain-specific expert agents, with memory management and optional encryption for secure data handling. The platform uses efficient communication protocols for knowledge compression and faster reasoning, while a standardized agent interface system handles security, privacy, and policy requirements. It scales across distributed computing environments to enable complex collaborative tasks like personalized content creation, materials discovery, and drug development while optimizing resource usage and maintaining data privacy.

The invention provides an AI agent memory management method and system based on cold and hot stratification, and relates to the technical field of artificial intelligence, and the method comprises the steps: obtaining and preprocessing the historical information of an AI agent, and carrying out the vectorization storage of the historical information; calculating a score based on the access frequency and the semantic association; constructing a dual-threshold triggering mechanism to realize data cold and hot layered migration; establishing index mapping and dynamically monitoring data popularity for returning; and a storage water level dynamic adjustment migration strategy is monitored in real time. According to the invention, the problem of low memory management efficiency of the AI agent is solved, efficient access of memory content is realized, and the storage cost is reduced.

The invention belongs to the technical field of front-end development, and particularly relates to a React framework-based tree component optimization method fusing virtualization rendering and increment rendering. Comprising the steps of S1, data preprocessing; S2, dynamic virtualization rendering: dynamically calculating a node index range in a visible area according to a real-time scrolling position of a user viewport, only rendering nodes in the range, and realizing seamless lazy loading of data through scrolling event monitoring; s3, intelligent incremental updating: identifying changed nodes through a state change comparison algorithm, and executing local re-rendering only for the changed nodes based on a component life cycle control mechanism of a React framework; and S4, lazy loading cooperative control. The method aims at solving the problems in the aspects of performance, memory management, user experience and the like when a tree component in a React ecological system processes large-scale data, and is widely applied to various Web application program development scenes needing to display and operate a large-scale tree data structure.

The invention relates to the technical field of audio signal processing, and discloses a high-sampling-rate audio analysis optimization method and system, a storage medium and equipment, and the method comprises the steps: upgrading an FFTW (Fast Fourier Transform) library, and building an optimized memory management mechanism; carrying out adaptive framing processing on the input audio data, and optimizing the data access efficiency by adopting a multi-stage cache system; the calculation precision of the FFT fast Fourier transform is dynamically adjusted, and the calculation of the FFT fast Fourier transform is optimized by pre-calculating and caching an FFTW plan; performing clock synchronization optimization and jitter elimination on the COAX digital audio signal; establishing a multi-dimensional result cache matrix and an intelligent multiplexing decision tree, and reducing repeated operation through intelligent cache prediction and similarity calculation; system performance indexes are monitored in real time, adaptive parameter adjustment is realized based on an optimization objective function, audio quality and system stability are monitored in combination with subjective and objective evaluation mechanisms, repeated operation is remarkably reduced, and calculation resource allocation is optimized on the premise of ensuring sound quality.

The invention relates to an implementation method and device for an EtherCAT master station system based on a non-operating system, and the method comprises the steps: achieving the adaptation of an SOEM protocol stack to a hardware abstraction layer of an EtherCAT master station through the byte order processing based on a bit mask and a staged shift strategy and the EtherCAT frame receiving and transmitting control based on annular buffer area index management; on the basis of non-real-time task priority scheduling processing of a hardware timer, main circulation driven by a single-thread event and overtime monitoring of a blocking communication synchronization mechanism in combination with the timer, adaptation of an SOEM protocol stack to an EtherCAT master station operating system abstraction layer is achieved; through network scanning and communication parameter configuration, a memory management mechanism based on CoE standard mapping and a periodic position mode of a slave station, adaptation of an EtherCAT master station application layer is realized. According to the invention, through optimization and adaptation of the SOEM protocol stack, operation-system-free and microsecond-level communication jitter of the EtherCAT master station system is realized.

The invention discloses a data enhancement method and system based on multi-agent self-evolution and hybrid evaluation, and relates to the technical field of artificial intelligence, and the method comprises the steps: employing a teacher model as a multi-agent cooperation system, and carrying out the interaction of a reasoning agent, an evaluation agent, a reflection agent and a memory management agent through a reasoning agent, an evaluation agent, a reflection agent and a memory management agent; iteratively generating a high-quality reasoning data set with a traceable reasoning path and a self-verification label, and performing multi-task supervision fine tuning on a learning model; a diversity sampling strategy based on reinforcement learning is adopted to generate multiple groups of outputs, and a weak point data set is screened by using a consistency score; and for the weak point data set, the multi-view instruction rewriting agent performs diversity rewriting on the instruction and then returns to perform deep reasoning distillation to generate new enhanced data and combine the new enhanced data to high-quality reasoning data. According to the method, multiple agents are arranged, so that the model is iteratively synthesized, evaluated, reflected and modified, the obtained enhanced data can be directly used, a manual auditing step is omitted, and the synthesis efficiency is improved.

A method includes receiving a machine learning (ML) network model in high-level code; generating an internal representation (IR), the IR is mapped to components in a multi-processing tile device; determining whether a first processing tile with a first on-chip memory (OCM) has a same dimension for an input / output tensor data as a second processing tile with a second OCM performing a same primitive function based on the IR; allocating a same memory address range within the first and the second OCM for the same primitive function if the first processing tile has the same dimension for the input / output tensor data as the second processing tile for the same primitive function; linking the memory address range of the first OCM to the memory address range of the second OCM to form a grouped memory space within the first and the second OCM respectively; and compiling low-level instructions based on the linking.

According to the system memory management method and system, the electronic equipment and the storage medium provided by the invention, the virtual address information in the access information is extracted, and the virtual address information comprises the target virtual address; under the condition that the target virtual address is determined to be in a first preset virtual address range according to the virtual address information, determining an initial physical address corresponding to an initial virtual address in the first preset virtual address range according to a preset address mapping table; performing physical address calculation processing according to the target virtual address, the initial virtual address and the initial physical address to obtain a target physical address corresponding to the target virtual address; and accessing a system memory based on the target physical address and performing memory management on the system memory. By quickly returning the conversion relation from the virtual address to the physical address in the specified range, the conversion efficiency from the virtual address to the physical address can be improved, a conversion page table does not need to be configured according to MMU granularity, waste of storage space can be reduced, and the address conversion efficiency can be improved.

The invention discloses a user-noninductive cold and hot sensing remote memory exchange system, which belongs to the field of computer storage, and is characterized in that cluster nodes are divided into extensible remote memory service nodes and computing client nodes according to roles; the remote memory node comprises a remote memory exchange server and a memory resource registration module; the computing client node comprises a FrontSwap-based remote memory exchange client, and a remote memory exchange server side is registered as a memory resource which is non-inductive to a user; furthermore, popularity statistics based on a popularity histogram is realized in a kernel mode; the memory exchange behavior is guided through the dynamic decision-making module based on online reinforcement learning, the memory management efficiency and the system performance are remarkably improved, and efficient and non-inductive memory expansion service is provided for user application.

Systems and methods for efficient memory management during ray tracing are described. A ray tracing system assigns a memory stack to a ray. The ray, when intersection tested against objects of a node, accesses data that is stored in the memory stack. When data is to be consumed from the memory stack by the ray, the ray tracing system uses a memory pointer associated with the ray to locate the requested data. When data is to be stored to the memory stack, the memory allocation circuitry stores data in a free memory block and uses a linked list to link the memory block with other memory blocks storing additional data for the ray.

The invention provides an agent memory management method and device based on asynchronous processing and a storage medium. The method comprises the following steps: after an interaction event is written into a first storage area, issuing a processing event associated with an event identifier to an event queue, and reading the corresponding interaction event from the first storage area according to the event identifier; when the interaction event passes the importance judgment, converting the interaction event into structured memory data; determining second storage areas based on the type identification field of the structured memory data, and respectively writing the structured memory data into at least one second storage area; and analyzing the query request to obtain a query condition, determining at least one target second storage area based on the query condition, reading structured memory data related to the query request from the target second storage area, performing aggregation processing, and outputting the aggregated memory data to the agent to generate a response result. According to the method, the interaction response delay can be reduced, the model calling cost is reduced, and the memory processing auditing performance is improved.

The invention discloses a memory management method, electronic equipment, a storage medium and a computer program product, and relates to the technical field of computers. The cold and hot marks are set for the memory pages according to the cold and hot scores, memory data of different cold and hot grades can be distinguished, whether data transfer is conducted on the memory data of the memory pages or not is judged by comparing with the types of the storage media where the memory pages are located, and energy consumption can be reduced by transferring the data to the storage media matched with the cold and hot marks; whether the current operation mode of the target storage medium supports data transfer or not is judged before data transfer, the target storage medium is adjusted to be in the operation mode supporting data transfer, all the storage media do not need to be kept in the operation mode supporting data transfer all the time, the lowest energy consumption of the operation mode of the storage medium can be kept, and the operation efficiency is improved. The energy consumption can be reduced by combining the dynamic adjustment of the data position according to the load and the static power consumption management.

The invention discloses a server memory management system and a cluster system, and relates to the technical field of server memory management, the system identifies memory fault information of a server based on a fault reminding signal under the condition that a fault signal is received, and the current load state is determined based on operation data of the server. And matching the corresponding target repair strategy to perform fault repair on the server memory based on the target repair strategy. Therefore, the system can dynamically match different fault recovery strategies according to different fault scenes, so that the technical problem of poor flexibility of a memory fault recovery method in related technologies is solved, and the technical effects of improving the flexibility of memory fault recovery and the service operation stability of a server are achieved.

The invention discloses an intelligent dialogue system for time sequence memory management and task distribution, which is based on CrewAI multi-agent collaboration, combines time sequence memory updating and multi-agent collaboration work, introduces an independent memory unit in order to solve the problem of low memory efficiency management, and uses an undirected graph structure to store learned information. Storing each piece of information as a node in the graph; meanwhile, memory is increased, modified and forgotten according to a time sequence, so that the problem that important information is forgotten is relieved to a certain extent; in order to solve the problem of insufficient task interaction, a multi-agent cooperation mechanism is introduced, user demand understanding, task execution and task verification are respectively submitted to three different agents for independent work, and through independent work and complete information exchange among the three agents, information synchronization and state sharing among modules are realized, information islands are reduced, and the task interaction efficiency is improved. And decision accuracy is improved.

The invention belongs to the field of machine learning, and discloses an FPGA (Field Programmable Gate Array) superposition processor acceleration system and method based on state space duality, which comprises a sparse predefined data acquirer, a reconfigurable systolic array, a partial sum cache, an element-by-element operation cache, a function calculation module, an on-chip memory management module and the like. Zero elements are eliminated through the sparse predefined data acquirer, redundant data are reduced, and redundant calculation is remarkably reduced; the reconfigurable systolic array flexibly supports multiple calculation modes, and the utilization rate of hardware resources is increased; the part and the cache realize cross-cycle accumulation and element-by-element operation cache integration results, the function calculation module completes nonlinear operation, and the on-chip memory management module optimizes result cache, so that on-chip operation of SSD calculation is ensured, off-chip memory access is remarkably reduced, and reasoning efficiency and energy efficiency are improved; by adopting the system, the memory occupation is effectively reduced, the element-by-element calculation efficiency is improved, and the sparse calculation redundancy is reduced, so that the reasoning process of the Mamba2 model is remarkably accelerated.

The invention discloses a hot page threshold adjusting method and device, a medium, a product and a memory system, and relates to the technical field of memory management.The current load index is calculated by introducing multiple load parameters of the memory system, the running state of the system is dynamically reflected, preset hyper-parameters are matched according to the load index, and the hot page threshold is adjusted according to the hyper-parameters. Comprising a first factor influencing the bandwidth and a second factor inhibiting the ping-pong phenomenon, and according to the hyper-parameters, a hot page threshold value is calculated in a self-adaptive mode, so that dynamic classification of the hot page and the cold page is achieved. Compared with a mode of determining the hot page and the cold page by adopting a static threshold, the method has the advantages that the change of the load of the memory system can be responded in real time, the phenomena of resource waste and repeated page migration caused by a pseudo hot page are inhibited, the technical problems of hot page misjudgment and frequent page migration caused by improper hot page threshold setting are solved, and the page migration efficiency is improved. The technical effects of improving the access efficiency and improving the flexibility of memory management and the overall performance of the system are achieved.

The embodiment of the invention discloses an intelligent dialogue method and electronic equipment, and the method comprises the steps: receiving dialogue content inputted by a user in a current dialogue round in a dialogue process of performing dialogue with the user through a large-scale language model (LLM); requesting to obtain the memory content of the current session from a memory management module; wherein the memory management module comprises a first memory module and a second memory module, and the first memory module is used for storing memory abstract content generated according to historical dialogue content; the second memory module is used for storing a newly generated dialogue content original text in the current dialogue; according to the memory abstract content currently stored in the first memory module and the dialogue content original text stored in the second memory module, prompt information used for guiding an LLM model to execute a content generation task is generated. Through the embodiment of the invention, the user request can be quickly responded, and the memory integrity is realized, so that the accuracy of the reply content is guaranteed.

The present disclosure relates to data block retransmission in wireless communications, and particularly in wireless communications having a relatively large propagation delay. Some embodiments relate to memory management and may involve a maximum time period during which a data block that is to be communicated in a wireless communication network may remain in memory space at a user equipment (UE) to support a data block retransmission procedure. UE reporting of current occupancy status of the memory space is also or instead supported in some embodiments. Selective transmission or retransmission may be provided, and may involve reception occasions at which a UE may receive a data block retransmission or a transmission of a different data block.

The invention discloses a memory management method, a program product, equipment and a medium, and relates to the technical field of computers.The memory management method comprises the steps that memory configuration information in the system kernel starting process is obtained, and a reserved memory range is determined based on the memory configuration information; segmenting the reserved memory based on the hot plug framework of the memory and the reserved memory range; allocating corresponding target metadata to each reserved memory segment to obtain a configured physical memory; the target metadata is metadata representing a data structure of the physical memory page; establishing a target mapping array based on the memory configuration information; the target mapping array is used for recording a mapping relation between a physical address and a logic page number in the configured physical memory; responding to the target memory access request by utilizing the target mapping array, and completing corresponding memory access operation; the target memory access request is an access request initiated for the reserved memory, so that the universality of the reserved memory is improved, the overall manageability of the system is enhanced, and the complexity and maintenance burden of the system are reduced.

The invention relates to the technical field of SOC chips, and discloses an efficient memory management method and system based on an SOC chip, which are used for constructing a complete topological graph and calculating access delay distribution by comprehensively analyzing an internal physical structure of the chip. According to the method, the memory access behavior of each processing core is monitored in real time, dynamic memory partitioning is executed according to the access characteristics and the physical topological structure, and the optimal access area is distributed for the processing core. And when an access hot spot is detected, triggering a data migration mechanism to copy hot spot data to a relatively close memory area. According to the method, a memory address space is recombined by adopting a topology-aware address mapping algorithm, a multi-level cache collaboration mechanism is established, and the working mode of a memory controller is dynamically adjusted according to an application type. Through load balancing monitoring and periodic memory recombination, the memory access delay is effectively reduced, the bandwidth utilization rate is improved, and the overall memory access performance of the SOC chip is optimized.

A system and method for implementing a Persistent Cognitive Machine (PCMs) that extends beyond the traditional prompt-response paradigm of artificial intelligence are disclosed. A PCM maintains persistent cognitive processes regardless of external interaction, stores and organizes thoughts in a thought cache, retrieves relevant thoughts based on current stimuli, generates new thoughts through reasoning processes, and curates stored thoughts during periods of reduced external interaction. The PCM includes language and reasoning model components, a thought cache, an executive component, and an embedding system. The PCM remains continuously active, remembers previous experiences, learns from these experiences, creates new thought experiences independently, and initiates interactions without waiting for external prompts. The PCM enters sleep-like states during which it curates its thought cache, generalizes experiences, and performs other memory management functions. Applications may include but are not limited to synthetic cognitive colleagues, strategic war gaming platforms, and personal cognitive assistants.

The embodiment of the invention provides a memory management method and device, equipment and a readable storage medium, and the method comprises the steps: obtaining a to-be-applied first memory capacity, and determining a first offset sequence corresponding to the first memory capacity; a positive correlation exists between the first memory capacity and the number of offsets in the first offset sequence; starting from a first offset in the first offset sequence, according to the first offset, offsetting a bit of a preset register, and based on the register value before offset and the register value after offset, obtaining a register update value; each bit is used for representing that the corresponding memory area is in an idle state or an occupied state; on the basis of the register update value, continuing the next offset until the first offset sequence is traversed, and determining a final first register value; and encoding the first register value to obtain a first memory address corresponding to the first register value. The memory management efficiency can be improved.

Embodiments of the present application relate to the technical field of computer storage, and provide a resource allocation method and apparatus, an electronic device, and a storage medium. The method comprises: in response to a memory acquisition request sent by a target host, a memory management unit in a resource allocation system acquiring demanded memory capacity and a memory starting address carried by the memory acquisition request; on the basis of a memory allocation unit in the resource allocation system, selecting from among at least two memory modules a target memory module matching the demanded memory capacity; and on the basis of a memory address router in the memory allocation unit and the memory starting address, performing address translation on the target memory module, and allocating to the target host the target memory module having undergone address translation, thereby achieving dynamic resource allocation of the target host. In this way, the interaction between a memory management unit and a memory allocation unit ensures rapid allocation of idle memory modules in a system, thereby improving the utilization rate of memory resources, and reducing costs of usage of the memory resources.

The invention discloses an FPGA (Field Programmable Gate Array)-based high-performance large language model accelerator and a reasoning method, which adopt a structure of combining a plurality of computing units (CU) and a matrix processing unit (MPE), and can efficiently allocate computing tasks and realize parallel processing by virtue of the parallel computing capability of the FPGA, thereby greatly improving the computing efficiency. Through parallel processing of a plurality of tasks, the reasoning speed is obviously improved, and the calculation bottleneck in a traditional scheme is avoided. And secondly, in the aspect of memory management, through a hybrid storage strategy of a high-bandwidth memory (HBM) and an off-chip memory (such as DDR), utilization of memory bandwidth is optimized, efficient flowing of data among a plurality of computing units is realized, delay in data transmission is reduced, and efficient data access in the computing process is ensured.

A system may include one or more memory devices configured at least in part as system memory; a memory interface; and at least one circuit configured to perform one or more operations including receiving a request to configure memory for the one or more memory devices; using the memory interface to connect a memory device to the one or more memory devices; and configuring the memory device to operate as system memory. In some aspects, using the memory interface includes enabling the memory interface, where enabling the memory interface allows the memory device to be added to the one or more memory devices. In some aspects, using the memory interface and configuring the memory device are performed while the system remains in a powered-on state.

The invention provides a memory management method and a memory controller, which are applied to a storage device configured with a memory module. The method comprises the following steps: acquiring a continuity state table, identifying a target mapping table according to a data access instruction and the continuity state table, acquiring a continuity state of the target mapping table, judging whether a continuous section mapping table is used or not according to the continuity state, and if so, loading the continuous section mapping table to a buffer memory, and if not, loading the target mapping table to the buffer memory, and obtaining the physical address according to the loaded mapping table to access the memory module. According to the method, the continuity of the entity address in the mapping table is evaluated, and the optimal mapping table processing mode is dynamically selected, so that the data access performance is effectively improved, and the use efficiency of the buffer memory is optimized.

The embodiment of the invention provides a memory management method and electronic equipment, which are applied to wearable equipment. When a first application in the wearable device is started, a plurality of memory areas are allocated to the first application in advance according to the first configuration information. Each memory area corresponds to a preset capacity, a plurality of memory blocks are arranged in the memory area, and the memory capacity of the memory blocks is equal to the preset capacity. In the running process of the first application, when the memory is applied, appropriate memory blocks can be matched from a plurality of memory areas, and address information of the memory blocks is returned. The capacity of the memory block is greater than or equal to the capacity required for applying for the memory, and the memory block is in an idle state. Therefore, by planning and managing the memory in advance, the memory address information can be returned at an extremely high speed when the first application applies for the memory. Particularly, under the scenes that equipment hardware resources are limited and the first application frequently applies for the memory in a short time, the time consumed by memory application can be remarkably shortened, and the application running efficiency is improved.

The invention relates to a video memory management method and device, electronic equipment and a storage medium, the method is applied to a GPU drive in a virtual machine, and the method comprises the steps that when it is detected that the remaining amount of a GPU video memory is lower than a set remaining amount threshold value, cold pages in a GPU page table are recognized; wherein the cold page is a page table item which is not accessed in a recent preset time interval; and under the condition that the cold page is a video memory, replacing a physical address corresponding to the virtual address in the cold page to a physical address in a system memory so as to replace video memory data corresponding to the cold page to the system memory. The embodiment of the invention can improve the overall utilization rate of the video memory.

The invention discloses a hardware acceleration device for processing a dynamic graph convolutional neural network, and the device comprises an FPGA parallel acceleration system which comprises a plurality of acceleration modules used for processing different types of calculation tasks; the dynamic data flow control system is used for calling acceleration modules to carry out data calculation according to a data processing task of the dynamic graph convolutional neural network, and managing data transmission and states between the called acceleration modules; and the memory management and data scheduling system is used for distributing a memory space for the acceleration module and storing input data required when the data processing task is executed, an intermediate calculation result obtained when the data processing task is executed and output data obtained after the data processing task is executed. The invention provides a hardware acceleration scheme with low delay, high throughput and high energy efficiency ratio for the dynamic graph convolutional neural network.

The embodiment of the invention provides a memory management method and device, electronic equipment and a readable storage medium. The method comprises the following steps: based on a client virtual address to be accessed, accessing a page table corresponding to the client virtual address; under the condition that the currently accessed current page table item belongs to the large page table item, determining a client physical memory large page corresponding to the client virtual address as a target physical memory page based on the current page table item; under the condition that the current page table item does not belong to the large page table item, determining a next-level page table item pointed by the current page table item as a new current page table item, and executing the operation of determining the client physical memory large page corresponding to the client virtual address as a target physical memory page based on the current page table item again; obtaining a memory access state of the target physical memory page; if the memory access state represents that the target physical memory page meets the preset memory access requirement, the memory access attribute of the target physical memory page is written into a preset cache table. And the address conversion efficiency of the translator is improved.