750 results about "Interface circuits" patented technology

An interface circuit includes a reference voltage generation circuit to generate a reference voltage, a differential voltage signal generation circuit to convert send data input in sending data into a pair of differential voltage signals and output the pair of differential voltage signals based on the reference voltage generated by the reference voltage generation circuit, a receiver to convert a pair of differential voltage signals input in receiving data and output received data, and a receiver test circuit to perform a sensitivity test of the receiver, the receiver test circuit having a resistance circuit to generate a pair of differential voltage signals having a potential difference being necessary for the sensitivity test of the receiver.

The invention relates to the technical field of encoder communication interface circuits, in particular to a multi-protocol encoder communication interface circuit based on hardware configuration, which comprises a core control and protocol processing module, a hardware configuration and mode recognition module, an RS-485 differential driving and receiving module and an interface protection circuit module. In the invention, the problems that the hardware cost is high, the PCB layout is complicated, the overall size of the system is increased, the types of connectors are diversified and the wiring difficulty is increased due to the fact that an independent physical interface circuit needs to be independently designed for each protocol such as BISS and Tamagawa or a special integrated chip with a solidified factory function is adopted in the existing scheme are thoroughly solved; and meanwhile, the problems that chips need to be replaced or hardware needs to be redesigned and the configuration flexibility is poor in the protocol updating of an existing scheme are solved, the time sequence conflict risk existing in software dynamic switching protocols is avoided, and the defects that a traditional circuit is poor in surge resistance, signal crosstalk is caused and debugging and maintenance are complex are overcome.

The invention relates to the technical field of interface circuits, in particular to a multi-mode switching detection circuit for a Type-C interface, which is used for realizing peripheral type identification and automatic switching between a USB host mode and a DP input mode on a single Type-C interface. The circuit comprises an interface detection unit connected with a Type-C female seat interface, a voltage comparison unit, a main control processor chip, a mode discrimination unit and a control output unit. The voltage comparison unit carries out resistance voltage division and threshold comparison on CC pin voltage, two levels are formed at a detection node and sent to the main control processor chip, and USB equipment and DP source equipment are distinguished by the mode judgment unit. The control output unit controls the USB host power supply control circuit and the DP input chip power supply circuit, establishes a USB data channel in a USB host mode, and establishes a DP-to-video channel in a DP input mode. The circuit realizes rapid peripheral identification and mode automatic switching based on hardware, and is simple in structure, low in cost, high in response speed and high in system stability.

The invention discloses a CAN bus activity detection and wake-up circuit and method, and belongs to the technical field of CAN bus communication, the CAN bus activity detection and wake-up circuit comprises a CAN bus interface circuit, a signal detection and processing circuit and a controller, the input end of the CAN bus interface circuit is connected with a CAN bus; the signal detecting and processing circuit comprises a voltage comparator, the non-inverting input end and the inverting input end of the voltage comparator respectively receive a CANH signal and a CANL signal which are electrically isolated by the CAN bus interface circuit, and the output end of the voltage comparator is connected to a wake-up pin of the controller; the controller is used for monitoring the level state of the wake-up pin, and when the level of the wake-up pin is in an effective state, the electronic equipment is controlled to be switched from the sleep mode to the normal working mode. By introducing an electrical isolation and voltage difference detection mechanism, the problem of false wake-up caused by common-mode interference or bus noise in the prior art is solved, and reliable wake-up under low power consumption is realized.

A system with an interface for remote memory. In some embodiments, the system includes: an interface circuit having: a first interface, configured to be connected to a processing circuit; and a second interface, configured to be connected to memory, the first interface including a cache coherent interface, and the second interface being different from the first interface.

An apparatus comprising processing circuitry configured to generate an instruction for configuring a hardware accelerator to perform a task. The instruction comprises a predefined set of fields comprising a control field indicative of a selected set of fields of the predefined set of fields to be provided to the hardware accelerator to configure the hardware accelerator to perform the task. The apparatus comprises accelerator control interface circuitry configured to exchange messages, each with a size less than or equal to a predefined size, with the hardware accelerator. To configure the hardware accelerator to perform the task, the accelerator control interface circuitry is configured to send the selected set of fields to the hardware accelerator, using a set of command messages with a combined size greater than the predefined size. The application further relates to a hardware accelerator.

An apparatus is provided that includes a memory array including non-volatile memory cells configured to store weights of an artificial neural network, a bit line coupled to a plurality of the non-volatile memory cells, and an interface circuit coupled to the bit line, the interface circuit configured to amplify an output impedance of the memory array.

A relay unit comprises first interface circuitry, second interface circuitry, and controller circuitry. The first interface circuitry is configured to be electrically connected to an assist drive unit of a human-powered vehicle. The assist drive unit is configured to assist propulsion of the human-powered vehicle. The second interface circuitry is configured to be electrically connected to a transmission device of the human-powered vehicle. The transmission device is configured to execute a gear shifting of the human-powered vehicle. The controller circuitry is electrically connected to the first interface circuitry and the second interface circuitry. The controller circuitry is configured to receive information relating to the human-powered vehicle from a sensor configured to detect the information. The controller circuitry is configured to change a timing of the gear shifting of the transmission device based on the information.

An optical wireless communication (OWC) interface apparatus comprises: at least one input and / or output configured to transfer data signals from and / or to a bus device; optical interface circuitry configured to transfer optical wireless communication (OWC) signals representative of the data signals between the OWC interface apparatus and a light transmitter and / or receiver apparatus, wherein the light transmitter and / or receiver apparatus is configured to transmit and / or receive the OWC signals as free-space light signals; and interface control circuitry that is configured to establish and / or maintain communication with the bus device in accordance with a bus protocol thereby to enable transfer of the data signals between the OWC interface apparatus and the bus device.

An apparatus for transmitting telemetry through an external interface is disclosed. An integrated circuit includes at least one interface circuit configured to communicate on an external interface of the integrated circuit with a plurality of other integrated circuits. The integrated circuit further includes a first control circuit coupled to the at least one interface circuit, a first table circuit. The first control circuit is configured to store telemetry data transmitted by the plurality of other integrated circuits over the external interface in respective table entries of the first table circuit, based on which of the plurality of other integrated circuits transmitted the telemetry data.

The invention discloses a welding power supply extension module integrating arc voltage tracking and welding machine control functions and a welding control method, and belongs to the technical field of electric arc welding. In order to solve the problems that arc voltage tracking and welding machine control are mutually independent and cannot cooperate in real time in the existing TIG welding process, so that the welding process is tedious in operation and unstable in quality, the system comprises a core processor for executing an arc voltage tracking control algorithm and a welding parameter adjusting algorithm; the signal conditioning circuit is used for collecting and conditioning a current signal and a voltage signal output by the welding power supply; the welding power supply control module is provided with a plurality of interface circuits used for being connected with welding power supplies of different interface types; the core processor receives state information of the welding process through the high-speed communication module and generates a first control instruction used for adjusting output parameters of a welding power source and a second control instruction used for adjusting the height of a welding gun according to the state information and current signals and voltage signals collected by the signal conditioning circuit. The method is used for electric arc welding.

The invention provides a multi-band composite high-integration TR assembly. The multi-band composite high-integration TR assembly comprises a shell, a front multi-layer board, a back multi-layer board, a C / X / Ku band receiving and transmitting circuit, a C / X / Ku band single receiving circuit and a Ka band receiving and transmitting circuit, wherein the front multi-layer board and the back multi-layer board are connected in the shell, the C / X / Ku band receiving and transmitting circuit is connected with the front multi-layer board, and the Ka band receiving and transmitting circuit is connected with the back multi-layer board. The low-cost scheme design of an all-solid-state microwave multilayer board suitable for batch production and testing is adopted, ports and transmission line layout are reasonably designed, multi-band composite mode transmission is achieved in the form of the front face and the back face, a C / X / Ku-band transmitting circuit and an H-polarization receiving circuit are integrated on the front face, and the transmission efficiency is improved. A C / X / Ku frequency band V polarization receiving circuit and a Ka frequency band receiving and transmitting circuit are integrated on the reverse side, different functional circuits are respectively transmitted through a microstrip line and a strip line through an interface circuit structure covering 1-40 GHz and an in-board vertical transition structure, the isolation degree of different circuits is improved, mutual crosstalk between different signals is avoided, and the transmission efficiency is improved. And the functions of high integration, high consistency, ultra wide band, numerical control phase shift, numerical control attenuation and the like of the assembly are realized.

An interface circuit, a data transmission method, a display panel and a display apparatus are provided, belonging to the field of interface technology, and can solve the problem of asynchronous data transmission by port physical layers. The data transmission method includes parsing, by each port physical layer in a data transmission module, a received first input signal to obtain input data, a clock signal and a lock signal corresponding to the port physical layer; generating, by a control module, a control signal according to a second input signal, the second input signal being related to lock signals of port physical layers; and synchronously transmitting, by data synchronization units in a data synchronization module, the corresponding input data based on the control signal in response to each of lock signals corresponding to all port physical layers being at an operating level. The present disclosure realizes data synchronization in the data transmission by the port physical layers.

The utility model relates to the field of circuit boards, in particular to a PCB which comprises an interface circuit board and a USB interface, the interface circuit board is provided with a plurality of first wiring terminals and a plurality of second wiring terminals, and the number of the first wiring terminals is larger than or smaller than that of the second wiring terminals. And the USB interface is connected to the first wiring terminal or the second wiring terminal. The USB wiring board has the effect of improving the universality of the interface circuit board of the USB wiring board.

An image display control device for a vehicle is provided with: an interface circuit (11) that acquires a viewpoint change operation by a user with respect to a viewpoint operation device (3) and a captured image from a camera (1) that captures an image of the surroundings of the vehicle; a memory (12) storing a vehicle model; and a calculation circuit (13) that, on the basis of the changed viewpoint position of the vehicle by the viewpoint change operation, constitutes a bird's-eye view image from the changed viewpoint position from the captured image and a vehicle image based on the vehicle model, and displays the constituted bird's-eye view image on a display (4). In the overhead image, a first transmittance is achieved as the transmittance of the captured image through the vehicle image in a part of a portion where the vehicle image overlaps the captured image, and a second transmittance higher than the first transmittance is achieved as the transmittance of the captured image through the vehicle image in the other portion. The range of the two-dimensional position coordinates occupied by the portion that achieves the first and second transmittance in the bird's-eye view image is varied in accordance with the changed viewpoint position.

The utility model relates to the technical field of die bonder detection circuits, in particular to a sensor detection circuit for a die bonder, which comprises a master control module, a sensor interface module, a display control module, a signal processing module and a power supply module. The power supply module is used for supplying power to the main control module, the sensor interface module and the display control module; the sensor interface module and the display control module are respectively connected with the main control module; the main control module comprises a main processor and an auxiliary processor, the signal processing module comprises an AD7730 chip, the input end of the AD7730 chip is connected with a low-pass filter, and the main processor is connected with the auxiliary processor through an SPI interface. According to the utility model, a plurality of sensor interface circuits are arranged and can be used for high-speed and high-precision data detection of the die bonder, so that high-speed, low-noise and rapid system response of the die bonder is met, the connection complexity of the die bonder sensor is reduced, and the requirements of high precision and high sampling rate of the die bonder sensor are met.

An operator learning model generator is provided for training a smooth operator learning model for predicting airflow dynamics in a room used by a controller connected to a heating, ventilation and air conditioning (HVAC) system. The operator learning model generator includes an interface circuit configured to receive a training dataset via a network connected to a simulation computer, wherein the training dataset includes solution trajectories of airflow in the room for various times series of control actions given to the HVAC system, a memory configured to store the smooth operator learning model comprising an auto-encoder and a neural ordinary differential equation, the training dataset, and training instructions for the smooth operator learning model, and a processor configured to train the smooth operator learning model stored in the memory, wherein the training instructions comprise a jerk regularization that enforces smoothness of the dynamics predicted by the smooth operator learning model.

This invention relates to the field of integrated circuit I / O interface design technology. It discloses a dual-mode (digital-analog) input / output interface circuit based on low-voltage devices adapting to high-voltage power supplies, aiming to solve the problems of low-voltage process chips being unable to directly adapt to high-voltage power supplies and limited I / O functionality. The interface circuit includes a digital output module, a digital input module, an analog I / O module, and a mode summary and ESD circuit. Through external configuration signals, the circuit can switch between digital input, digital output, analog I / O, and power-down modes. The digital output module incorporates a dual-mode high-voltage adaptation mechanism, utilizing a voltage divider resistor series and a common-gate protection transistor to ensure the safety of low-voltage devices under high voltage. The digital input module employs non-overlapping control to eliminate dynamic power consumption. A full-mode high-impedance isolation design ensures the reliability of mode switching. This invention achieves safe adaptation of standard low-voltage CMOS devices to high-voltage power supplies and integrates dual-mode functionality, offering advantages such as high integration, low power consumption, high reliability, and strong process compatibility.

This application relates to an interface circuit and an electronic device. The interface circuit includes an input interface unit, an output interface unit, an input connection terminal, an output connection terminal, a device connection terminal, and a common selection terminal. The input and output connection terminals are used to connect to a controller, the device connection terminal is used to connect to an external device, and the common selection terminal is used to receive a preset voltage signal. The input interface unit is connected to the input connection terminal, the device connection terminal, and the common selection terminal, and is used to receive the signal to be transmitted received at the device connection terminal and the preset voltage received at the common selection terminal, and outputs a signal corresponding to the signal to be transmitted through the input connection terminal. The output interface unit is connected to the output connection terminal, the device connection terminal, and the common selection terminal, and is used to receive the output signal received at the output connection terminal and the preset voltage received at the common selection terminal, and outputs a signal corresponding to the output signal through the device connection terminal. This interface circuit integrates the functions of a DI circuit and a DO circuit, exhibiting high integration.

An operator learning model generator is provided for training a smoothed operator learning model for predicting airflow dynamics in a room used by a controller connected to a heating, ventilation, and air conditioning (HVAC) system. The operator learning model generator includes an interface circuit configured to receive a training dataset via a network connected to a simulation computer, wherein the training dataset includes un-trajectories of airflow in the room for various time series of control actions applied to the HVAC system; a memory configured to store the smoothed operator learning model including an autoencoder and a neural ordinary differential equation, the training dataset, and training instructions for the smoothed operator learning model; and a processor configured to train the smoothed operator learning model stored in the memory, wherein the training instructions include jerk regularization that constrains smoothness of dynamics predicted by the smoothed operator learning model.

A wireless terminal of a telecommunications system comprises wireless terminal processor circuitry and wireless terminal interface circuitry. The wireless terminal processor circuitry is configured to generate a rate adaptation eligibility message to indicate whether a resource of the wireless terminal is eligible for codec rate adaptation. The wireless terminal interface circuitry is configured to transmit the rate adaptation eligibility message across a radio interface to a network node.

An example apparatus is configured to communicate with a device under test (DUT). The apparatus includes a first interface circuit to communicate with a test instrument using a first protocol and a second interface circuit to communicate with the DUT using a second protocol. The second protocol is a predefined protocol for which the DUT is configured to operate. The first protocol is for connections associated with a first frequency attenuation. The second protocol is for connections associated with a second frequency attenuation. The first frequency attenuation is greater than the second frequency attenuation. Circuitry is configured to perform one or both of the following operations: (i) converting first data received from the test instrument in the first protocol to the second protocol for output to the DUT via the second interface circuit, or (ii) converting second data received from the DUT in the second protocol to the first protocol for output to the test instrument via the first interface circuit.

A power arrangement comprises an energy management arrangement, a demand interface circuit, a power distribution arrangement, a vehicle power terminal and a building power terminal. The demand interface circuit acquires at least one demand data of a group comprising: an energy need that is required of an electric vehicle, a discharge energy that is available by the electric vehicle for discharging, a charging time period that is available for charging the electric vehicle and a discharging time period that is available for discharging the electric vehicle. The energy management arrangement controls the power distribution arrangement such that vehicle electrical power is provided at the vehicle power terminal as a function of the demand data and building electrical power is provided at the building power terminal.

The invention discloses a low-power-consumption control system and method based on multi-mode micro-energy collection and intelligent energy management. The low-power-consumption control system comprises a plurality of independent energy input interface circuits, a super-capacitor energy storage module and an energy processing and battery charging management module. Each input interface circuit adaptively boosts or rectifies specific energy sources (such as solar energy, wind energy, vibration energy, heat energy and the like), and charges a super capacitor after being isolated by a diode. After the energy storage voltage of the super capacitor reaches a threshold value, the processing circuit driven by the BUCK-BOOST chip converts the energy storage voltage into stable voltage and outputs the stable voltage to the battery charging chip, so that efficient energy storage is realized. The system is monitored by a low-power-consumption single-chip microcomputer, energy consumption is reduced through a sleep-wake-up mechanism, and meanwhile the system can be expanded to be a control core of a sensor or a wireless module.

A communication network device hosting a lawful interception administration function, LI-ADMF, network element, NE. The device comprises includes interface circuitry, a processor and memory having instructions executable by the processor whereby the communication network device is operative to receive, from a law enforcement agency, LEA, a request to receive information related to at least one unmanned aerial system, UAS, hosted communication device registered with a communication network, send a request to at least one of a mobility management device or a user subscription management device to provide the information, receive at least part of the requested information from at least one of the mobility management device or the user subscription management device and send the received information to a law enforcement management function, LEMF.

Disclosed herein are related to an integrated circuit including a semiconductor layer. In one aspect, the semiconductor layer includes a first region, a second region, and a third region. The first region may include a circuit array, and the second region may include a set of interface circuits to operate the circuit array. A side of the first region may face a first side of the second region along a first direction. The third region may include a set of header circuits to provide power to the set of interface circuits through metal rails extending along a second direction. A side of the third region may face a second side of the second region along the second direction. In one aspect, the first side extending along the second direction is shorter than the second side extending along the first direction, and the metal rails are shorter than the first side.

The invention discloses a NAND Flash reliability demonstration test device with multiple MCUs cooperating. The NAND Flash reliability demonstration test device comprises a communication main control board, a pluggable test small board, a unified bottom board, a dynamic voltage switching module, a high-reliability communication mechanism and a segmented temperature control system. The communication main control board is provided with a first MCU for coordinating test tasks and managing temperature control; each small test board is provided with a second MCU and an interface circuit adaptive to NAND Flash packaging, and a dynamic voltage switching module is integrated to output a working voltage matched with the electrical specification of the chip; the unified bottom plate provides a power supply network and a communication bus; the high-reliability communication mechanism is based on an annular DMA buffer area, a double-byte frame header and a BCC check code, and first-level near-end realignment and second-level far-end frame skip advancing are executed. The segmented temperature control system is controlled in a closed-loop mode through the first MCU according to the strategy of four stages of fast temperature rise, slow approximation, keep steady state and slow-stop temperature reduction. The NAND Flash chip reliability demonstration test system is suitable for reliability demonstration test of the NAND Flash chip under high-temperature and high-load conditions, and the test compatibility, the communication robustness and the temperature control precision are effectively improved.

The invention discloses a motor control system with multi-gear speed regulation. The motor control system comprises a multi-path power supply input unit, a rectification unit, a gear detection unit, a control unit, an inversion unit and a motor, the multi-path power supply input unit is used for receiving external alternating current and carrying out gear switching, the multi-path power supply input unit comprises a path of common input power line and n paths of gear power supply input interface circuits, and n is an integer greater than or equal to 3; the gear power supply input interface circuit comprises a gear signal isolation element; the rectification unit is used for converting external alternating current output by the multi-path power supply input unit into direct current and then supplying power to the control unit and the inversion unit; the gear detection unit is used for detecting a gear signal in each gear power input interface circuit. According to the multi-gear speed regulation motor control system, compared with a traditional alternating current motor scheme, an original wiring mode is not changed, and direct replacement and use are achieved; and the device is efficient, energy-saving, small in size, light in weight, low in noise and low in cost.