592 results about "Electron mobility" patented technology

The invention discloses a junction temperature testing device and method for a high-electron-mobility transistor. A current measuring module in the junction temperature testing device for the high-electron-mobility transistor is used for acquiring current flowing through a tested device; the power supply module is electrically connected with the other end of the switch module, and the power supply module and the switch module are connected in parallel with the bus capacitor; the control module is electrically connected with the control end, the driving end and the regulation and control end of the switch module, and the control module is used for providing switching signals for the control end, the driving end and the regulation and control end of the switch module so as to control the switching states of the switch protection module, the tested device and the switch module; the heating plate is used for heating a tested device; the temperature detection module is used for measuring the temperature of the detected device; and the waveform analysis module is electrically connected with the control module, the temperature detection module and the current measurement module, and is used for obtaining and forming an experimental oscillogram of the tested device at the temperature according to the temperature, the current and the conduction time of the tested device controlled by the control module.

The invention belongs to the field of organic electroluminescent materials, and discloses a host material, an organic electroluminescent material containing double hosts and an organic electroluminescent device. In the organic light-emitting device containing the double hosts, the first host compound has higher electron mobility and is stable in structure. According to the organic electroluminescent device, triplet excitons are dispersed on two main bodies by using a double-main-body material, triplet-triplet annihilation is reduced, the driving voltage of the organic electroluminescent device is reduced, the luminous efficiency of the device can be improved, and the service life of the device can be prolonged.

A semiconductor switch comprising a first main terminal, a second main terminal, and a control terminal, the semiconductor switch further comprising: a III-nitride high-electron-mobility transistor (HEMT), the III-nitride HEMT comprising a first source terminal, a first drain terminal, and a first gate terminal; a first interface circuit operatively connected to the control terminal and to the first gate terminal; and a short-circuit detection circuit operatively connected to the first drain terminal and the first source terminal, the short-circuit detection circuit being configured to: sense a short-circuit across the first drain terminal and the first source terminal; and transmit a short-circuit detection signal to the first interface circuit, the first interface circuit being configured, upon receipt of the short-circuit detection signal, to cause the III-nitride HEMT to turn off, and / or to cause a voltage across the first gate terminal to be reduced.

The embodiment of the utility model relates to an enhancement mode high electron mobility transistor device. An enhanced mode high electron mobility transistor device includes a semiconductor body having a top surface and including a heterostructure configured to generate a two-dimensional electron gas. A high electron mobility transistor device includes a gate structure extending over a top surface of a semiconductor body, biased to electrically control a two-dimensional electron gas, and including a functional layer and a gate contact in direct physical and electrical contact with each other. The gate contact is made of a layer of conductive material, and the functional layer is made of a layer of two-dimensional semiconductor material and includes a first doped portion having P-type conductivity extending over a top surface of the semiconductor body and interposed along a first axis between the semiconductor body and the gate contact. According to the embodiment of the invention, the low power consumption of the transistor in use is ensured, and the integration of the transistor into an electronic circuit in a design step is simplified.

The present disclosure relates to Gallium Nitride (GaN) High Electron Mobility Transistor (HEMT) (100) i.e. a semiconductor device (100) which includes a buffer layer (104) formed on the substrate (120). An unintentionally doped (UID) Gallium Nitride (GaN) channel layer (102) is positioned on the buffer layer (104). A barrier layer (106) is formed on the UID channel layer (102) to enable formation of two-dimensional electron gas (2DEG) at interface between UID GaN channel layer (102) and barrier layer (106). A stress transfer layer (116) having tunable intrinsic compressive mechanical stress is deposited on barrier layer (106) to enhance device performance and reliability. Further, the intrinsic stress in the stress transfer layer (116) is tailored to enhance performance in terms of higher threshold voltage and breakdown voltage, and reliability in terms of reduced dynamic RON under DC and switching stress and stable threshold voltage under ON and OFF state gate stress.

The invention provides a semiconductor laser element with a spin polarization sub-layer. The semiconductor laser element comprises a substrate, a lower limiting layer, a lower waveguide layer, an active layer, an upper waveguide layer and an upper limiting layer which are sequentially arranged from bottom to top. According to the semiconductor laser element, the spin polarization sub-layers of a multi-layer structure are arranged between the upper limiting layer and the upper waveguide layer in the semiconductor laser element, and the electron mobility distribution characteristic and the piezoelectric polarization coefficient distribution characteristic of each spin polarization sub-layer are limited. Specific electron mobility distribution and piezoelectric polarization coefficient distribution of the spin polarization sub-layer form an asymmetric discrete potential barrier, lattice distortion structure polarization is modulated, charge dipole momentum net accumulation is increased, the piezoelectric polarization effect of the active layer is regulated and controlled, the quantum restriction effect is suppressed, energy band inclination of the active layer is reduced, and hole injection band order is reduced. The overlapping probability of the electron hole wave function is improved, and the internal quantum efficiency is improved.

The invention provides an enhanced gallium nitride high-electron-mobility transistor. The enhanced gallium nitride high-electron-mobility transistor comprises a substrate; the first epitaxial structure is formed on the substrate, and the first epitaxial structure comprises a channel layer and a barrier layer formed on the channel layer; the passivation layer is formed on the first epitaxial structure; the grid electrode comprises a groove, and the groove penetrates through the passivation layer and the barrier layer and extends into the channel layer; the second epitaxial structure part covers the bottom and the side wall of the groove and the upper surface of the passivation layer on the left side and the right side of the top of the groove; and a gate electrode formed on the second epitaxial structure portion. The groove gate enhanced MIS-HEMT device has the beneficial effects that the uniformity, the process repeatability, the robustness and the reliability of the threshold voltage of the groove gate enhanced MIS-HEMT device are improved.

The invention discloses a luminescent material composition, ink, a luminescent device and a display device. The luminescent material composition comprises a host material and a polarity adjusting material, and the absolute value of the ratio of the zero field hole mobility to the zero field electron mobility of the host material is not equal to 1. The luminescent material composition provided by the invention can meet the requirements of products with high comprehensive performance.

A high electron mobility transistor (HEMT) device includes a substrate, a channel layer, a source, a drain, a buffer layer, and a plurality of amorphous regions. The channel layer is located above the substrate. The source is located on the channel layer. The drain is located on the channel layer. The buffer layer is located between the substrate and the channel layer. The plurality of amorphous regions are located in the buffer layer below the source and the drain.

The invention belongs to the field of semiconductor devices, provides a gallium nitride high-electron-mobility transistor integrated with a Schottky diode and a preparation method of the gallium nitride high-electron-mobility transistor, and aims to solve the problem that a conventional gallium nitride high-electron-mobility transistor (GaN HEMT) lacks a body diode. According to the invention, monolithic integration of the SBD and the GaN HEMT is realized through structural design, a low-impedance path is provided for reverse current, and the integration mode not only retains the original high performance characteristic of a GaN device, but also additionally endows the GaN device with reverse conduction and reverse recovery capabilities; moreover, through the structural design, the SBD can be synchronously completed on the basis of the existing GaN HEMT process, a special process or new equipment is not needed, and the cost is effectively controlled while the performance improvement is ensured; compared with an external interconnection diode scheme, parasitic inductance caused by lead bonding is eliminated, the voltage overshoot and ringing phenomena in the switching process are remarkably reduced, high-frequency switching application is facilitated, and switching loss can be greatly reduced.

The invention discloses a dynamic power management SSD system based on AI, and relates to the technical field of intelligent storage power management, and the dynamic power management SSD system comprises the steps: carrying out the pulse domain fusion of a pulse environment feature and an electron mobility change feature in an SSD, and generating a fusion pulse feature map in combination with a pulse attention mechanism; constructing a neural pulse dynamic decision model based on a bionic pulse neural network architecture, and obtaining a power supply state decision instruction by inputting a fusion pulse feature map; and dynamically updating the parameters of the neural pulse dynamic decision model through an online learning algorithm based on the power supply switching characteristic parameters. According to the method, pulse domain fusion is carried out on the pulse environment features and the electron mobility change features in the SSD, and the fusion pulse feature map is generated in combination with a pulse attention mechanism, so that effective integration of multi-source information is realized, and the perception capability of complex environment changes is improved.

A High-Electron-Mobility-Transistor that may include a substrate with a buffer layer formed on the substrate. A recess formed in the buffer layer. A barrier layer formed on the buffer layer. A gate recess formed in the barrier layer, the gate recess overlaps the recess in the buffer layer. A drain terminal formed at a first side of the barrier layer. A source terminal formed at a second side of the barrier layer. An isolation structure formed within the gate recess proximate the drain terminal. A doped structure formed adjacent to the isolation structure within the gate recess proximate the source terminal. A gate terminal formed on the doped structure.

The invention provides a positive electrode active material and a preparation method thereof, a positive plate, a battery, a battery pack and electric equipment. The positive electrode active material comprises a positive electrode active material matrix and a coating layer existing on the surface of the positive electrode active material matrix, the coating layer comprises a janus material; the janus material comprises a metal carbide and a metal oxide. According to the positive electrode active material provided by the invention, the surface of the positive electrode active material substrate is coated with the janus material, the janus material comprises the metal carbide and the metal oxide, and Schottky junctions can be formed on the surfaces of positive electrode active material particles, so that an electric field for one-way movement of electrons is formed, and the movement rate of the electrons is accelerated; therefore, the electronic conductivity of the positive electrode active material is improved, and the charging capacity and the cycle performance of the battery are improved.

The epitaxial structure comprises a substrate layer, a polymerization layer, a high-resistance layer, a middle layer, a channel layer and a barrier layer which are sequentially arranged from bottom to top, the polymerization layer comprises a combination of a buffer layer and a transition layer, the channel layer is provided with a two-dimensional electron conducting channel, and the high-resistance layer is arranged between the high-resistance layer and the middle layer. The material composition of the barrier layer is ALInGaN, and the channel layer is formed at the interface of the barrier layer and the intermediate layer. According to the epitaxial structure disclosed in the technical scheme, AlInGaN is adopted as a barrier layer material to replace a traditional AlGaN barrier layer, the lattice constant of the barrier layer can be adjusted by introducing the In element, lattice mismatch between the barrier layer and a GaN channel layer is reduced, and meanwhile high polarization intensity is kept, so that the two-dimensional electron gas concentration is improved, and meanwhile the performance of the epitaxial structure is improved. The interface defects are reduced, and the electron mobility is improved.

This invention pertains to the design of a novel Gallium Nitride (GaN) High Electron Mobility Transistor (HEMT) with multiple metal contacts to a single contiguous p-GaN island. The invention encompasses various embodiments which introduce innovative mechanisms for threshold voltage (Vth) control through hole injection and removal.

Techniques for generating reference voltages and reference currents from a supply voltage are disclosed. A disclosed reference voltage and reference current generator circuit includes a combination of transistor (e.g., MOS) devices and interconnect resistors. The interconnect resistors have temperature coefficients that are selected to negate temperature sensitive effects in the transistor devices due to electron mobility temperature behavior in the transistor devices. The interconnect resistors may be implemented as resistor stacks that include interconnected metal layers separated by electrically insulating layers.

A semiconductor device including: a plurality of unit cells arranged side-by-side across a top surface of the semiconductor device, and where the plurality of unit cells are of a first type or a second type, each unit cell of the first type includes a first electrode, a second electrode, and a third electrode formed at the top surface of the semiconductor device. The second electrode is arranged to enclose the first electrode. Each of the first and second electrodes are arranged to enclose the third electrode. The unit cells of the first type form high electron mobility transistor (HEMT) cells, and the unit cells of the second type form Schottky Barrier Diode (SBD) cells.

The invention provides an epitaxial structure of a gallium nitride HEMT (High Electron Mobility Transistor) device. An in-situ nitride layer; a first high carbon concentration layer, wherein the carbon concentration of the first high carbon concentration layer is greater than 1018 cm <-3 >; a low-carbon-concentration channel layer, wherein the carbon concentration of the low-carbon-concentration channel layer is less than 1018 cm <-3 >; and a barrier layer. According to the embodiment of the invention, the existence of the in-situ nitride layer can prevent the dislocation of the bottom layer of the epitaxial structure from continuously extending upwards, and also can promote the turning annihilation of the dislocation. The channel layer is grown after the smooth surface is formed through combination, so that the smooth surface of the epitaxial structure can be obtained without a very thick channel layer, the interface quality of a key layer is further improved, and the performance and the reliability of a gallium nitride high-electron-mobility transistor device manufactured on the basis of the epitaxial structure are further improved.

The invention discloses a metal-semiconductor direct current friction nanometer generator based on a depletion mode u-GaN / AlGaN / AlN / GaN high electron mobility transistor. The generator comprises a titanium (Ti) metal friction layer and a depletion mode GaN HEMT friction layer, and direct current is generated through the interface friction volt effect. The core of the invention lies in that high-concentration two-dimensional electron gas (2DEG) and surface state characteristics in the u-GaN / AlGaN / AlN / GaN heterojunction are utilized, and the friction volt effect is combined, so that efficient mechanical energy-electric energy conversion is realized. In the dynamic Schottky contact of the D-GaN HEMT and metal, unbalanced carriers in u-GaN Cap are excited by friction, electrons and holes are separated by a built-in electric field, surface state electrons of u-GaN Cap obtain friction energy to be transited to a conduction band, and a Schottky barrier is overcome to form current; in the sliding process, metal and a semiconductor interact to increase the surface state density, a large number of electrons are excited, chemical bonds are formed, two-dimensional electron gas is formed on an AlN / GaN interface and flows back under a reverse electric field, the electron concentration is maintained, current is continuously generated, and finally direct current is formed in an external circuit.

A gate drive circuit for a switching circuit including high-side and low-side transistors which are GaN-HEMTs (High Electron Mobility Transistors), includes: a high-side driver driving the high-side transistor; and a low-side driver driving the low-side transistor, wherein the low-side driver is configured to be capable of applying 0 V, a high-level voltage higher than a gate threshold voltage of the low-side transistor, and a bias voltage lower than the gate threshold voltage between a gate and a source of the low-side transistor, and the low-side driver is configured to apply the bias voltage between the gate and the source of the low-side transistor during a dead time inserted during transition from a high-level output state where the high-side transistor is turned on and the low-side transistor is turned off to a low-level output state where the high-side transistor is turned off and the low-side transistor is turned on.

Electro-optical devices and methods for constructing electro-optical devices such as a switch or phase shifter. An electrode layer is deposited on a substrate layer, a waveguide structure is deposited on the electrode layer, a first cladding layer is deposited on the waveguide structure, and the first cladding layer is planarized and bonded to a wafer. The substrate layer is removed and the electrode layer is etched to split the electrode layer into a first electrode separated from a second electrode. A second cladding layer is deposited on the etched electrode layer. The first and second electrodes may be composed of a material with a large dielectric constant, or they may be composed of a material with a large electron mobility. The device may exhibit a sandwich waveguide architecture where an electro-optic layer is disposed between two strip waveguides.

The invention discloses a gallium nitride high-electron-mobility transistor and a manufacturing method thereof. The gallium nitride high-electron-mobility transistor comprises a transistor structure, a heat dissipation structure and a conductive structure, the transistor structure comprises a composite semiconductor layer and an electrode unit. The composite semiconductor layer has a gallium nitride layer portion. The heat dissipation structure comprises a heat dissipation insulating layer and a heat dissipation metal plate arranged on the side face, away from the composite semiconductor layer, of the heat dissipation insulating layer. The heat dissipation metal plate has a molybdenum substrate portion. The heat dissipation structure and the transistor structure jointly define at least one channel which is formed on one side face, adjacent to the heat dissipation metal plate, of the heat dissipation insulating layer and penetrates through the electrode unit. The conductive structure is arranged in the channel, and two opposite ends of the conductive structure are electrically connected with the heat dissipation metal plate and the electrode unit respectively. By arranging the transistor structure on the molybdenum substrate part of which the heat conduction coefficient is higher than that of a sapphire material, the heat energy generated during the operation of the transistor structure can be quickly radiated to the external environment through the molybdenum substrate part, thereby achieving the effect of improving the heat dissipation performance.

The present application relates to the technical field of electroluminescent device preparation, in particular to an OLED light-emitting composition and an electroluminescent device comprising the composition. The OLED light-emitting composition comprises an electron transport material and a light-emitting material, the electron transport material combines o-phenanthroline and a xanthene group, and has high electron mobility and a low energy level. A boron-nitrogen compound skeleton structure with multiple benzene rings is introduced into the light-emitting material, the skeleton structure is twisted in a planar configuration, the alkyl substituents contained in the large steric group are adjusted, the π-π mutual attraction caused by the introduction of benzene rings is weakened, the intermolecular force is further weakened, and the adverse effects of concentration quenching on efficiency are weakened. The OLED device prepared by using the composition of the present application has low starting voltage, high light-emitting efficiency and better service life, can meet the requirements of current panel manufacturing enterprises for high-performance materials, and has great commercial value.

The invention discloses a synthesis method and application of a non-condensed ring electron acceptor, which are different from a traditional condensed ring structure or a single alkyl chain side chain, and a dichlorobenzene unit is introduced as a conformation regulating group. As chlorine atoms have strong electronegativity and proper atomic radius, remarkable non-covalent interaction such as Cl-S and Cl-pi can be generated among molecules. The interaction is similar to a set of precise molecular guide rails, molecules are guided to perform highly ordered pi-pi accumulation, so that electron cloud overlapping is remarkably enhanced, and an efficient electron transmission channel is constructed. According to the organic solar cell prepared based on the non-condensed ring electron acceptor material designed by the invention, the electron mobility is remarkably improved, and meanwhile, the charge recombination loss of a device is effectively reduced.

The present invention provides a novel SiC MOSFET power device, comprising: a substrate; a drain metal layer disposed under the substrate; a drift region disposed on the substrate; a well region disposed on the drift region; a source region disposed on the well region; a channel region disposed on the well region; a trench disposed parallel to the direction of channel current in the channel region and passing through the channel region and reaching the source region; a gate metal layer disposed on the trench; and a source metal layer disposed on the gate metal layer. The present invention can increase the channel width of the trench sidewalls, and because different surfaces of silicon carbide have different electron mobilities, a side with relatively high electron mobility can be selected, thereby ensuring that the electron mobility of the inversion layer of the trench sidewalls is higher than that of the inversion layer on the device surface, thereby effectively reducing the channel resistance of the device.

This invention discloses a silicon-based high electron mobility transistor and its fabrication method, relating to the field of semiconductor process technology. The silicon-based high electron mobility transistor includes: a substrate; an AlN nucleation layer, a high-resistivity buffer layer, a channel layer, an AlN insertion layer, an AlGaN barrier layer, and a GaN capping layer sequentially disposed on the substrate; wherein the AlN nucleation layer includes a roughened first high-temperature AlN nucleation layer and a second high-temperature AlN nucleation layer, with the first high-temperature AlN nucleation layer disposed on the substrate. The first high-temperature AlN nucleation layer effectively blocks impurities in the substrate. Surface roughening of the first high-temperature AlN nucleation layer releases stress between the substrate and the epitaxial layer. The second high-temperature AlN nucleation layer is disposed on the roughened first high-temperature AlN nucleation layer to further release the stress accumulated in the first high-temperature AlN nucleation layer. This invention solves the technical problem in the prior art where boron atoms diffuse from the silicon substrate to the epitaxial layer, resulting in significant stress between the silicon substrate and the epitaxial layer, leading to a decrease in the crystal quality of the epitaxial layer.

The present disclosure provides a fabricating method of a high electron mobility transistor device, including a substrate, a nucleation layer, a buffer layer, an active layer and a gate electrode. The nucleation layer is disposed on the substrate, and the buffer layer is disposed on the nucleation layer, wherein the buffer layer includes a first superlattice layer having at least two heteromaterials alternately arranged in a horizontal direction, and a second superlattice layer having at least two heteromaterials vertically stacked along a vertical direction. The at least two heteromaterials stack at least once within the second superlattice layer. The active layer is disposed on the buffer layer, and the gate electrode is disposed on the active layer.

The present disclosure provides an array substrate and a display device. The array substrate includes a substrate layer and a gate drive circuit disposed at a peripheral region of the substrate layer. The gate drive circuit includes a plurality of cascaded shift registers. The shift register includes an input circuit, an output circuit, a pull-down node control circuit, and a noise reduction circuit. At least one transistor included in the input circuit, the output circuit, and the noise reduction circuit is a first type of transistor. The pull-down node control circuit includes a plurality of transistors connected between a first voltage terminal and a first reset voltage terminal, and at least one transistor of the plurality of transistors is a second type of transistor. The first type of transistor includes a first active layer, and the second type of transistor includes a second active layer. An electron mobility of the second active layer is less than an electron mobility of the first active layer.

To provide a novel light-emitting device. A light-emitting device with high emission efficiency is provided. A light-emitting device with a long lifetime is provided. A light-emitting device with low driving voltage is provided.SOLUTION: The EL layer includes a first layer, a second layer, a third layer, a light-emitting layer, and a fourth layer in this order from the anode side, the first layer includes a first organic compound and a second organic compound, the fourth layer includes a seventh organic compound, and the first organic compound has an electron-accepting property with respect to the second organic compound; HOMO levels of the second organic compounds are greater than or equal to - 5. 7eV and less than or equal to - 5. 2eV, and electron mobilities of the seventh organic compounds are greater than or equal to 1 * 10 - 7cm2 / Vs and less than or equal to 5 * 10 - 5cm2 / Vs when a square root of an electric field intensity [V / cm] is 600.SELECTED DRAWING: Figure 1

According to the lithium ion battery electrode material and the preparation method thereof, a composite material with molybdenum sulfide nanoparticles loaded on the surfaces of porous microspheres Ce-lambda-MnO2 is prepared through a two-step hydrothermal method, the porous structure provides a large number of active sites, the reversible capacity is improved, electrolyte permeation is promoted, and the performance of the lithium ion battery electrode material is improved. The wettability of the electrolyte on an electrode material is improved, and the lithium ion transmission rate is increased; by doping manganese dioxide with Ce, additional free electrons can be introduced, the band gap of MnO2 can be reduced, the electron mobility can be enhanced, lambda-MnO2 and MoS2 are compounded, and after a heterojunction structure is formed by the lambda-MnO2 and the MoS2, the conductivity and the capacity performance are further improved, the preparation process is simple, the price is low, and the preparation method has an industrialization prospect.