6609 results about "Silicon nitride" patented technology

A method for forming a strained SiN film and a semiconductor device containing the strained SiN film. The method includes exposing the substrate to a gas including a silicon precursor, exposing the substrate to a gas containing a nitrogen precursor activated by a plasma source at a first level of plasma power and configured to react with the silicon precursor with a first reactivity characteristic, and exposing the substrate to a gas containing the nitrogen precursor activated by the plasma source at a second level of plasma power different from the first level and configured to react with the silicon precursor with a second reactivity characteristic such that a property of the silicon nitride film formed on the substrate changes to provide the strained silicon nitride film.

A silicon nitride film is formed on a substrate in a reaction chamber by introducing trisilane and a reactive nitrogen species into the chamber in separate pulses. A carbon precursor gas is also flowed into the chamber during introduction of the trisilane and/or during introduction of the reactive nitrogen species, or in pulses separate from the trisilane and reactive nitrogen species pulses. The carbon is used as a dopant in the silicon nitride film and advantageously allows a high stress silicon nitride film to be formed.

Stress of a silicon nitride layer may be enhanced by deposition at higher temperatures. Employing an apparatus that allows heating of a substrate to substantially greater than 400° C. (for example a heater made from ceramic rather than aluminum), the silicon nitride film as-deposited may exhibit enhanced stress allowing for improved performance of the underlying MOS transistor device. In accordance with alternative embodiments, a deposited silicon nitride film is exposed to curing with ultraviolet (UV) radiation at an elevated temperature, thereby helping remove hydrogen from the film and increasing film stress. In accordance with still other embodiments, a silicon nitride film is formed utilizing an integrated process employing a number of deposition/curing cycles to preserve integrity of the film at the sharp corner of the underlying raised feature. Adhesion between successive layers may be promoted by inclusion of a post-UV cure plasma treatment in each cycle.

Thin films are formed by formed by atomic layer deposition, whereby the composition of the film can be varied from monolayer to monolayer during cycles including alternating pulses of self-limiting chemistries. In the illustrated embodiments, varying amounts of impurity sources are introduced during the cyclical process. A graded gate dielectric is thereby provided, even for extremely thin layers. The gate dielectric as thin as 2 nm can be varied from pure silicon oxide to oxynitride to silicon nitride. Similarly, the gate dielectric can be varied from aluminum oxide to mixtures of aluminum oxide and a higher dielectric material (e.g., ZrO₂) to pure high k material and back to aluminum oxide. In another embodiment, metal nitride (e.g., WN) is first formed as a barrier for lining dual damascene trenches and vias. During the alternating deposition process, copper can be introduced, e.g., in separate pulses, and the copper source pulses can gradually increase in frequency, forming a transition region, until pure copper is formed at the upper surface. Advantageously, graded compositions in these and a variety of other contexts help to avoid such problems as etch rate control, electromigration and non-ohmic electrical contact that can occur at sharp material interfaces. In some embodiments additional seed layers or additional transition layers are provided.

Compressive stress in a film of a semiconductor device may be controlled utilizing one or more techniques, employed alone or in combination. A first set of embodiments increase silicon nitride compressive stress by adding hydrogen to the deposition chemistry, and reduce defects in a device fabricated with a high compressive stress silicon nitride film formed in the presence of hydrogen gas. A silicon nitride film may comprise an initiation layer formed in the absence of a hydrogen gas flow, underlying a high stress nitride layer formed in the presence of a hydrogen gas flow. A silicon nitride film formed in accordance with an embodiment of the present invention may exhibit a compressive stress of 2.8 GPa or higher.

Embodiments of the invention provide an apparatus and a process for generating a chemical precursor used in a vapor deposition processing system. The apparatus includes a canister (e.g., ampoule) having a sidewall, a top, and a bottom encompassing an interior volume therein, inlet and outlet ports in fluid communication with the interior volume, and a thermally conductive coating disposed on or over the outside surface of the canister. The thermally conductive coating is more thermally conductive than the outside surface of the canister. The thermally conductive coating may contain aluminum, aluminum nitride, copper, brass, silver, titanium, silicon nitride, or alloys thereof. In some embodiments, an adhesion layer (e.g., titanium or tantalum) may be disposed between the outside surface of the canister and the thermally conductive coating. In other embodiments, the canister may contain a plurality of baffles or solid heat-transfer particles to help evenly heat a solid precursor therein.

Methods and precursors for depositing silicon nitride films by atomic layer deposition (ALD) are provided. In some embodiments the silicon precursors comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%).

The present invention discloses a process for depositing a carbon containing silicon oxide film, or a carbon containing silicon nitride film having enhanced etch resistance. The process comprises using a silicon containing precursor, a carbon containing precursor and a chemical modifier. The present invention also discloses a process for depositing a silicon oxide film, or silicon nitride film having enhanced etch resistance comprising using an organosilane precursor and a chemical modifier.

Methods and precursors for depositing silicon nitride films by atomic layer deposition (ALD) are provided. In some embodiments the silicon precursors comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%).

A method and apparatus for forming a thin film transistor is provided. A gate dielectric layer is formed, which may be a bilayer, the first layer deposited at a low rate and the second deposited at a high rate. In some embodiments, the first dielectric layer is a silicon rich silicon nitride layer. An active layer is formed, which may also be a bilayer, the first active layer deposited at a low rate and the second at a high rate. The thin film transistors described herein have superior mobility and stability under stress.

A memory cell incorporating a chalcogenide element and a method of making same is disclosed. In the method, a doped silicon substrate is provided with two or more polysilicon plugs to form an array of diode memory cells. A layer of silicon nitride is disposed over the plugs. Using a poly-spacer process, small pores are formed in the silicon nitride to expose a portion of the polysilicon plugs. A chalcogenide material is disposed in the pores by depositing a layer of chalcogenide material on the silicon nitride layer and planarizing the chalcogenide layer to the silicon nitride layer using CMP. A layer of TiN is next deposited over the plugs, followed by a metallization layer. The TiN and metallization layers are then masked and etched to define memory cell areas.

Described herein are apparatus comprising one or more silicon-containing layers and a metal oxide layer. Also described herein are methods for forming one or more silicon-containing layers to be used, for example, as passivation layers in a display device. In one particular aspect, the apparatus comprises a transparent metal oxide layer, a silicon oxide layer and a silicon nitride layer. In this or other aspects, the apparatus is deposited at a temperature of 350° C. or below. The silicon-containing layers described herein comprise one or more of the following properties: a density of about 1.9 g/cm³ or greater; a hydrogen content of about 4×10²² cm⁻³ or less, and a transparency of about 90% or greater at 400-700 nm as measured by a UV-visible light spectrometer.

A CVD method for forming a silicon nitride film includes exhausting a process chamber (8) that accommodates a target substrate (W), and supplying a silane family gas (HCD) and ammonia gas (NH₃) into the process chamber, thereby forming a silicon nitride film on the target substrate by CVD. Said forming a silicon nitride film on the target substrate alternately includes a first period of performing supply of the silane family gas (HCD) into the process chamber (8), and a second period of stopping supply of the silane family gas.

A method of forming silicon nitride nanodots that comprises the steps of forming silicon nanodots and then nitriding the silicon nanodots by exposing them to a nitrogen containing gas. Silicon nanodots were formed by low pressure chemical vapor deposition. Nitriding of the silicon nanodots was performed by exposing them to nitrogen radicals formed in a microwave radical generator, using N₂ as the source gas.

A trench embedding method includes forming an oxidization barrier film on a trench; forming an expandable film on the oxidization barrier film; embedding an embedding material that contracts by being fired on the trench; and firing the embedding material, wherein the forming of the oxidization barrier film includes: forming a first seed layer on the trench by supplying an aminosilane-based gas; and forming a silicon nitride film on the first seed layer, wherein the forming of the expandable film includes: forming a second seed layer on the silicon nitride film by supplying an aminosilane-based gas; and forming a silicon film on the second seed layer.

A method of forming a silicon-containing film comprising providing a substrate in a reaction chamber, injecting into the reaction chamber at least one silicon-containing compound; injecting into the reaction chamber at least one co-reactant in the gaseous form; and reacting the substrate, silicon-containing compound, and co-reactant in the gaseous form at a temperature equal to or less than 550° C. to obtain a silicon-containing film deposited onto the substrate. A method of preparing a silicon nitride film comprising introducing a silicon wafer to a reaction chamber; introducing a silicon-containing compound to the reaction chamber; purging the reaction chamber with an inert gas; and introducing a nitrogen-containing co-reactant in gaseous form to the reaction chamber under conditions suitable for the formation of a monomolecular layer of a silicon nitride film on the silicon wafer.

A vapor reaction method including the steps of providing a pair of first and second electrodes within a reaction chamber where the pair of electrodes are arranged substantially parallel with each other. The method further includes the steps of placing a substrate in the reaction chamber where the substrate is held by said first electrode so that a first surface of the substrate faces toward the second electrode. A first film forming gas is introduced into the reaction chamber through the second electrode. The first film forming gas is excited to form a first insulating film by vapor deposition. The first insulating film may be silicon nitride. The method may also include the step of introducing a second film forming gas into the reaction chamber through the second electrode to ultimately form a second film. After removing the substrate from the reaction chamber, a cleaning gas may then be introduced through the second electrode to remove unnecessary layers from the inside of the reaction chamber.

A process for depositing a silicon carbon nitride film on a substrate can include a plurality of complete deposition cycles, each complete deposition cycle having a SiN sub-cycle and a SiCN sub-cycle. The SiN sub-cycle can include alternately and sequentially contacting the substrate with a silicon precursor and a SiN sub-cycle nitrogen precursor. The SiCN sub-cycle can include alternately and sequentially contacting the substrate with carbon-containing precursor and a SiCN sub-cycle nitrogen precursor. The SiN sub-cycle and the SiCN sub-cycle can include atomic layer deposition (ALD). The process for depositing the silicon carbon nitride film can include a plasma treatment. The plasma treatment can follow a completed plurality of complete deposition cycles.

A method for protecting an organic polymer underlayer during a plasma assisted process of depositing a subsequent film on the organic polymer underlayer is disclosed. The method provides the deposition of a protective continuous layer using organic polymer damage-free technique in order to not damage the organic polymer underlayer and to protect the organic polymer underlayer during the plasma assisted process of depositing a subsequent film. The organic polymer damage-free technique is a non-plasma process, using only thermal energy and chemical reactions to deposit the continuous layer. The organic polymer damage-free technique can also be a plasma assisted process using a reduced plasma power low enough in order to not damage the organic polymer underlayer. This method is applicable to many organic polymer underlayers such as organic polymer is aromatic hydrocarbon, polytetrafluoroehtylene (PTFE), parylene, benzocyclobutene-based polymers (BCB), polyimide, fluorinated polyimide, fluorocarbon-based polymers, poly(arylene ether)-based polymers (PAE), cyclohexanone-based polymers, and to many plasma assisted deposition processes such as plasma enhanced CVD deposition, plasma enhanced ALD deposition and plasma enhanced NLD deposition of silicon dioxide, silicon nitride, nitrided diffusion barrier such as TiN, TaN, WN, TiSiN, TaSiN, WSiN.

Methods of forming silicon nitride thin films on a substrate in a reaction space under high pressure are provided. The methods can include a plurality of plasma enhanced atomic layer deposition (PEALD) cycles, where at least one PEALD deposition cycle comprises contacting the substrate with a nitrogen plasma at a process pressure of 20 Torr to 500 Torr within the reaction space. In some embodiments the silicon precursor is a silyly halide, such as H₂SiI₂. In some embodiments the processes allow for the deposition of silicon nitride films having improved properties on three dimensional structures. For example, such silicon nitride films can have a ratio of wet etch rates on the top surfaces to the sidewall of about 1:1 in dilute HF.

On a silicon substrate is formed a stacked body by alternately stacking a plurality of silicon oxide films and silicon films, a trench is formed in the stacked body, an alumina film, a silicon nitride film and a silicon oxide film are formed in this order on an inner surface of the trench, and a channel silicon crystalline film is formed on the silicon oxide film. Next, a silicon oxide layer is formed at an interface between the silicon oxide film and the channel silicon crystalline film by performing thermal treatment in an oxygen gas atmosphere.

A method for fabricating a layer structure in a trench includes: simultaneously forming a dielectric film containing a Si—N bond on an upper surface, and a bottom surface and sidewalls of the trench, wherein a top/bottom portion of the film formed on the upper surface and the bottom surface and a sidewall portion of the film formed on the sidewalls are given different chemical resistance properties by bombardment of a plasma excited by applying voltage between two electrodes between which the substrate is place in parallel to the two electrodes; and substantially removing either one of but not both of the top/bottom portion and the sidewall portion of the film by wet etching which removes the one of the top/bottom portion and the sidewall portion of the film more predominantly than the other according to the different chemical resistance properties.

A method of forming spacers for spacer-defined multiple pattering (SDMP), includes: depositing a pattern transfer film by PEALD on the entire patterned surface of a template using halogenated silane as a precursor and nitrogen as a reactant at a temperature of 200° C. or less, which pattern transfer film is a silicon nitride film; dry-etching the template using a fluorocarbon as an etchant, and thereby selectively removing a portion of the pattern transfer film formed on a top of a core material and a horizontal portion of the pattern transfer film while leaving the core material and a vertical portion of the pattern transfer film as a vertical spacer, wherein a top of the vertical spacer is substantially flat; and dry-etching the core material, whereby the template has a surface patterned by the vertical spacer on a underlying layer.

The present invention provides straight forward methods for plasma etching a trench having rounded top corners, or rounded bottom corners, or both in a silicon substrate. A first method for creating a rounded top corner on the etched silicon trench comprises etching both an overlying silicon oxide layer and an upper portion of the silicon substrate during a "break-through" step which immediately precedes the step in which the silicon trench is etched. The plasma feed gas for the break-through step comprises carbon and fluorine. In this method, the photoresist layer used to pattern the etch stack is preferably not removed prior to the break-through etching step. Subsequent to the break-through step, a trench is etched to a desired depth in the silicon substrate using a different plasma feed gas composition. A second method for creating a rounded top corner on the etched silicon trench comprises formation of a built-up extension on the sidewall of an overlying patterned silicon nitride hard mask during etch (break-through) of a silicon oxide adhesion layer which lies between the hard mask and a silicone substrate. The built-up extension upon the silicon nitride sidewall acts as a sacrificial masking material during etch of the silicon trench, delaying etching of the silicon at the outer edges of the top of the trench. This permits completion of trench etching with delayed etching of the top corner of the trench and provides a more gentle rounding (increased radius) at the top corners of the trench. During the etching of the silicon trench to its final dimensions, it is desirable to round the bottom corners of the finished silicon trench. We have discovered that a more rounded bottom trench corner is obtained using a two-step silicon etch process where the second step of the process is carried out at a higher process chamber pressure than the first step.

A light emitting apparatus has a light emitting element with an emission wavelength in the range of 360 to 550 nm and a rare-earth element doped oxide nitride phosphor or cerium ion doped lanthanum silicon nitride phosphor. Part of light radiated from the light emitting element is wavelength-converted by the phosphor. The light emitting apparatus radiates white light generated by a mixture of the wavelength-converted light and the other part of light radiated from the light emitting element.

A method for fabricating a layer structure in a trench includes: simultaneously forming a dielectric film containing a Si—N bond on an upper surface, and a bottom surface and sidewalls of the trench, wherein a top/bottom portion of the film formed on the upper surface and the bottom surface and a sidewall portion of the film formed on the sidewalls are given different chemical resistance properties by bombardment of a plasma excited by applying voltage between two electrodes between which the substrate is place in parallel to the two electrodes; and substantially removing either one of but not both of the top/bottom portion and the sidewall portion of the film by wet etching which removes the one of the top/bottom portion and the sidewall portion of the film more predominantly than the other according to the different chemical resistance properties.

A method of etching exposed silicon oxide on patterned heterogeneous structures is described and includes a remote plasma etch formed from a fluorine-containing precursor. Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents combine with water vapor. The chemical reaction resulting from the combination produces reactants which etch the patterned heterogeneous structures to produce, in embodiments, a thin residual structure exhibiting little deformation. The methods may be used to conformally trim silicon oxide while removing little or no silicon, polysilicon, silicon nitride, titanium or titanium nitride. In an exemplary embodiment, the etch processes described herein have been found to remove mold oxide around a thin cylindrical conducting structure without causing the cylindrical structure to significantly deform.

Methods for etching dielectric layers comprising silicon and nitrogen are provided herein. In some embodiments, such methods may include providing a substrate having a dielectric layer comprising silicon and nitrogen disposed thereon, forming reactive species from a process gas comprising hydrogen (H₂) and nitrogen trifluoride (NF₃) using a remote plasma; and etching the dielectric layer using the reactive species. In some embodiments, an oxide layer is disposed adjacent to the dielectric layer. In some embodiments, the flow rate ratio of the process gas can be adjusted such that an etch selectivity of the dielectric layer to at least one of the oxide layer or the substrate is between about 0.8 to about 4.

The formation of a gap-filling silicon oxide layer with reduced tendency towards cracking is described. The deposition involves the formation of a flowable silicon-containing layer which facilitates the filling of trenches. Subsequent processing at high substrate temperature causes less cracking in the dielectric film than flowable films formed in accordance with methods in the prior art. A compressive liner layer deposited prior to the formation of the gap-filling silicon oxide layer is described and reduces the tendency for the subsequently deposited film to crack. A compressive capping layer deposited after a flowable silicon-containing layer has also been determined to reduce cracking. Compressive liner layers and compressive capping layers can be used alone or in combination to reduce and often eliminate cracking. Compressive capping layers in disclosed embodiments have additionally been determined to enable an underlying layer of silicon nitride to be transformed into a silicon oxide layer.

A process for fabrication of a semiconductor device including a modified ONO structure, comprising forming the modified ONO structure by providing a semiconductor substrate; forming a first dielectric material layer on the semiconductor substrate; depositing a silicon nitride layer on the first dielectric material layer; and forming a top dielectric material layer, wherein at least one of the bottom dielectric material layer and the top dielectric material layer comprise a mid-K or a high-K dielectric material. The semiconductor device may be, e.g., a SONOS two-bit EEPROM device or a floating gate flash device including the modified ONO structure.