2966 results about "Atomic layer deposition" patented technology

Methods for making thin-films on semiconductor substrates, which may be patterned using EUV, include: depositing the organometallic polymer-like material onto the surface of the semiconductor substrate, exposing the surface to EUV to form a pattern, and developing the pattern for later transfer to underlying layers. The depositing operations may be performed by chemical vapor deposition (CVD), atomic layer deposition (ALD), and ALD with a CVD component, such as a discontinuous, ALD-like process in which metal precursors and counter-reactants are separated in either time or space.

Methods for making thin-films on semiconductor substrates, which may be patterned using EUV, include: depositing the organometallic polymer-like material onto the surface of the semiconductor substrate, exposing the surface to EUV to form a pattern, and developing the pattern for later transfer to underlying layers. The depositing operations may be performed by chemical vapor deposition (CVD), atomic layer deposition (ALD), and ALD with a CVD component, such as a discontinuous, ALD-like process in which metal precursors and counter-reactants are separated in either time or space.

The invention belongs to the technical field of battery materials, and particularly relates to a method for preparing a porous carbon structure containing a sub-nanoscale ionic conduction improvement layer by utilizing atomic layer deposition and application. The invention discloses a porous carbon-silicon negative electrode structure, which is characterized in that a sub-nano-scale ion conduction improvement layer is added between a porous carbon substrate and silicon particles, and the sub-nano-scale ion conduction improvement layer comprises silicon carbide, aluminum phosphide, aluminum nitride, aluminum oxide, lithium phosphate, aluminum phosphate and lithium aluminum phosphate. Meanwhile, the invention also discloses a preparation method of the porous carbon-silicon negative electrode structure, namely, a sub-nano-scale ion conduction improvement layer is deposited on the porous carbon substrate through an atomic layer deposition method, so that the binding force between the sub-nano-scale ion conduction improvement layer and silicon particles and an ion transport channel are increased, and the ion conduction of a vapor deposition silicon-carbon negative electrode material is improved; the polarization of the material is effectively reduced, so that the rate capability of the battery is improved, and the cycling stability of the porous carbon structure battery is improved.

Methods for making thin-films on semiconductor substrates, which may be patterned using EUV, include: depositing the organometallic polymer-like material onto the surface of the semiconductor substrate, exposing the surface to EUV to form a pattern, and developing the pattern for later transfer to underlying layers. The depositing operations may be performed by chemical vapor deposition (CVD), atomic layer deposition (ALD), and ALD with a CVD component, such as a discontinuous, ALD-like process in which metal precursors and counter-reactants are separated in either time or space.

Metallization schemes involve atomic layer deposition (ALD) of molybdenum (Mo) and in some embodiments, ALD of Mo in a feature without a barrier layer. In some embodiments, deposition of the ALD Mo film may be followed by chemical vapor deposition (CVD) or physical vapor deposition (PVD) of a Mo film. In some embodiments, the CVD or PVD Mo film is part of the metallization stack. In other embodiments, the CVD or PVD Mo film is deposited as a sacrificial overburden layer. In some embodiments, deposition of the ALD Mo film may be followed by CVD or PVD of another metal such as tungsten (W). In some embodiments, the CVD or PVD W film is part of the metallization stack. In other embodiments, the CVD or PVD W film is deposited as a sacrificial overburden layer.

The invention is suitable for the field of atomic layer deposition, and discloses an atomic layer deposition process management method and system based on digital twinning, and the method comprises the steps: building a digital twinning model of an atomic layer deposition production system based on a multi-scale physical information neural network model; acquiring real-time reaction chamber process parameters and real-time state variables, and inputting the real-time reaction chamber process parameters and the real-time state variables into the digital twin model to obtain physical field distribution in the reaction chamber and a predicted growth state of a film on the surface of the substrate; based on the physical field distribution in the reaction cavity and the substrate surface film prediction growth state, decision analysis is carried out through a pre-trained reinforcement learning agent, and correction parameters used for optimizing the film growth quality are obtained; and generating a correction instruction based on the correction parameter, and updating the process parameter of the reaction cavity based on the correction instruction, so that the film on the surface of the substrate in the reaction cavity reaches the target film thickness and uniformity, and thus real-time intelligent closed-loop control of perception-prediction-decision-execution can be formed.

Provided herein are methods and apparatuses for reducing line bending when depositing a metal such as tungsten, molybdenum, ruthenium, or cobalt into features on substrates by periodically exposing the feature to nitrogen, oxygen, or ammonia during atomic layer deposition, chemical vapor deposition, or sequential chemical vapor deposition to reduce interactions between metal deposited onto sidewalls of a feature. Methods are suitable for deposition into V-shaped features.

Provided herein are methods and apparatuses for reducing line bending when depositing a metal such as tungsten, molybdenum, ruthenium, or cobalt into features on substrates by periodically exposing the feature to nitrogen, oxygen, or ammonia during atomic layer deposition, chemical vapor deposition, or sequential chemical vapor deposition to reduce interactions between metal deposited onto sidewalls of a feature. Methods are suitable for deposition into V-shaped features.

The invention discloses a half-piece solar cell passivation method, which comprises the following steps that a plurality of half-piece solar cells are placed in a cavity of atomic layer deposition equipment, cutting surfaces of the plurality of half-piece solar cells are exposed, other surfaces are not exposed, and the cutting surfaces of the half-piece solar cells are parallel or in the same plane; the cutting surface is parallel to the direction of airflow arranged in the cavity; the cavity is heated to a preset reaction temperature, an aluminum source and an oxygen source are alternately introduced into the cavity in a pulse mode, an aluminum oxide film is deposited on the cutting faces of the multiple half solar cells so as to achieve passivation, the aluminum source comprises trimethyl aluminum steam, the oxygen source comprises ozone or water vapor, and the airflow inflow direction of the aluminum source and the oxygen source is parallel to the cutting faces; and annealing and cooling the plurality of half-piece solar cells to obtain the passivated half-piece solar cells. According to the method, the passivation uniformity can be improved, the passivation rate is increased, and the passivation duration, raw material consumption and cost are reduced.

Methods and apparatuses for depositing silicon nitride in various applications are provided. Embodiments include depositing silicon nitride directly on silicon or silicon oxide surfaces using modulated dose to conversion time ratios in thermal atomic layer deposition. Embodiments include exposing a silicon oxide surface to a nitrogen-containing plasma treatment prior to depositing any silicon nitride and depositing silicon nitride by thermal atomic layer deposition.

The invention relates to the technical field of semiconductors, in particular to a nanoscale silicon through hole and a preparation method thereof, and the method comprises the following steps: providing a semiconductor substrate; preparing a nano-scale groove on the surface of the semiconductor substrate by adopting a Bosch process; etching the side wall of the nanoscale groove by adopting an atomic layer etching process to form a smooth side wall; depositing a dielectric layer by adopting an atomic layer deposition process; depositing a barrier layer by adopting an atomic layer deposition process; and depositing a metal layer by adopting an atomic layer deposition process. According to the invention, a Bosch process is combined with an accurate and controllable atomic layer etching (ALE) technology and an atomic layer deposition (ALD) technology. The surface roughness of the side wall is reduced through the ALE technology, scale generated by the Bosch technology is eliminated, so that the smooth side wall is obtained, then the dielectric layer and the metal layer are completely filled through the ALD technology, and finally the back power supply network with excellent performance is constructed. According to the method, the problem of uniform filling of scale and nano-TSV (Through Silicon Via) caused by the Bosch process is effectively solved.

The film-coated member comprises: a substrate; the corrosion-resistant layer is arranged on the surface of the substrate and is formed by adopting an atomic layer deposition technology; the light absorption layer is arranged on the surface, away from the substrate, of the corrosion-resistant layer, the thickness of the light absorption layer is 1-100 nm, and the light absorption layer is used for reducing interference of the substrate on the color of the coated part; the light interference layer is arranged on the surface, away from the substrate, of the light absorption layer, the light interference layer is a laminated layer of at least two sublayers made of different materials, the materials of the sublayers are selected from at least one of oxides, simple substances, carbides, nitrides and sulfides, and the thickness of the light interference layer is 100-2000 nm; and the wear-resistant layer is arranged on the surface, deviating from the substrate, of the light interference layer and is formed by adopting an atomic layer deposition technology. And the coated part is red. Through the comprehensive superposition effect of the four layers, the coated part presents a red appearance which is most difficult to produce at present, and the decorative effect of the coated part is greatly improved. The invention further provides a preparation method of the coated part.

The invention discloses a method for coating fluorescent powder with aluminum oxide through plasma-assisted atomic layer deposition, which comprises the following steps of: building an atomic layer deposition system, and placing a base station in a vacuum chamber of the atomic layer deposition system; fluorescent powder is placed on a base station, a vibration motor is turned on, and then the fluorescent powder is pretreated, including degassing treatment and oxygen plasma pretreatment; sequentially and alternately introducing two precursors into a vacuum chamber of the atomic layer deposition system, so that the two precursors are chemically adsorbed on the surface of the fluorescent powder and react to generate an aluminum oxide film; and after each precursor is introduced and reacts, the vacuum chamber needs to be cleaned by inert gas. According to the method, high-precision monoatomic-layer-level film control is achieved through the plasma-assisted atomic layer deposition technology, the defect that powder is prone to agglomeration in deposition is overcome through the vibration type fluidized bed technology, and therefore a high-quality aluminum oxide protection layer can be formed on the surface of the fluorescent powder; the water resistance and the luminescence property of the fluorescent powder are obviously improved.

The invention discloses a high-weather-resistance bismuth vanadate coating and a preparation method thereof, and belongs to the technical field of inorganic pigment modification. The high-weather-resistance bismuth vanadate coating comprises bismuth vanadate matrix particles, and the surfaces of the bismuth vanadate matrix particles are sequentially coated with an amorphous aluminum oxide layer, a cerium oxide layer and a fluorinated silicon oxide layer. The amorphous aluminum oxide layer is formed in an atomic layer deposition mode; the cerium oxide layer is formed by hydrothermal treatment of a cerium source. The preparation technology has accurate and controllable technological parameters, is suitable for industrial production, can replace the traditional toxic pigment containing lead and cadmium, and meets the requirements of environmental regulations. The bismuth vanadate coating has excellent weather resistance and chemical stability, the service life of a product can be prolonged, the maintenance cost is reduced, and a reliable solution is provided for development of high-performance environment-friendly pigments.

The invention relates to a focused ion beam ultrathin section sample preparation pretreatment method for a wafer sample, and belongs to the technical field of wafer material microscopic experiments. The wafer sample preparation pretreatment method provided by the invention comprises the following steps: (1) depositing a metal oxide on the surface of a wafer sample by adopting an atomic layer deposition technology to obtain an ALD layer; (2) coating a curing glue solution on the surface of the ALD layer, and curing to obtain a curing glue layer; and (3) plating a conductive protection layer on the surface of the cured adhesive layer to finish sample preparation pretreatment. The sample preparation pretreatment method disclosed by the invention can well solve the problems of irradiation damage and deformation of a fine structure which is not resistant to electron beam irradiation, curtain effect in a cutting process, unobvious structural boundary in a shooting process and the like in focused ion beam ultrathin section sample preparation, and has good application prospects in the technical field of wafer material microscopic experiments. And the practical value is very high.

Embodiments of the present disclosure relate to articles, coated articles and methods of coating such articles with a rare earth metal containing fluoride coating. The coating can contain at least a first metal (e.g., a rare earth metal, tantalum, zirconium, etc.) and a second metal that have been co-deposited onto a surface of the article. The coating can include a homogenous mixture of the first metal and the second metal and does not contain mechanical segregation between layers in the coating.

The invention provides a TEM sample and a preparation method and application thereof.According to the preparation method of the TEM sample, on the premise that the hole structure of a semiconductor device is not affected, part of residual polymer accumulated and blocked in a hole opening in the semiconductor device is removed through reactive ion etching, so that the hole opening is expanded and not blocked any more; a protective colloid can enter a pore structure for filling and precursor material plating of atomic layer deposition is facilitated, the definition of the side wall of the pore is enhanced, and the quality and the final observation effect of the TEM sample are effectively improved; the equipment and technology adopted by the preparation method of the TEM sample provided by the invention are low in investment, and the operation process is simpler and faster than that of a Fab etching process; meanwhile, batch laboratory-scale sample treatment can also be realized; in addition, compared with a wet chemical corrosion cleaning technology for removing residual polymers, the problems of chemical reagent residues, chemical reactant pollution and the like at the bottom of the deep hole structure are avoided.

The invention provides a silicon-carbon negative electrode material and a preparation method thereof, and belongs to the technical field of lithium ion battery negative electrode materials. The preparation method comprises the following steps: depositing a metal oxide layer on the surface of a silicon-carbon composite particle by adopting an atomic layer deposition method, and annealing the silicon-carbon composite particle coated with the metal oxide layer to obtain the silicon-carbon negative electrode material. According to the method disclosed by the invention, the negative electrode material has the structural stability of a porous material and has good conductivity and corrosion resistance, so that the material inhibits the dissolution of carbon and silicon elements at an interface, the increase of the thickness of an SEI film organic substance at the interface in the recycling process of the material is inhibited, and the transmission of lithium ions is more facilitated; and the rate capability of the Si / C composite material is further improved.

Methods and apparatuses for depositing material into features are described herein. Methods involve depositing an oxide material and then sputtering the oxide material to reduce seams. The oxide material may be deposited by an ALD process.

A method of depositing at least one fluoride layer comprises: depositing the fluoride layer on a substrate by photoassisted atomic layer deposition, ALD, in a plurality of ALD cycles. The method comprises irradiating the fluoride layer with UV / VIS light at least in some of the plurality of ALD cycles, such as in all ALD cycles, to anneal at least one potential crystal defect in the fluoride layer. The methods can be performed using an apparatus for atomic layer deposition of at least one fluoride layer, thereby producing an optical element comprising a substrate coated with such a fluoride layer, which can be used in an optical arrangement comprising at least one such optical element.

A method for processing a substrate that includes: forming a passivation layer over sidewalls of a recess in a carbon-containing layer over a substrate by a cyclic passivation process including a plurality of cycles, each of the plurality of cycles including, exposing the substrate to a first gas including a refractory metal in the absence of a plasma, and after exposing to the first gas, exposing the substrate to a second gas including oxygen or nitrogen.

The invention discloses a composite modified material for a lithium niobate wafer, and relates to the technical field of nano materials. The material is composed of an anti-corrosion passivation matrix and a function enhancement component, wherein the anti-corrosion matrix adopts a silicon nitride / SiO2 multi-layer composite layer, atomic layer deposition titanium dioxide and magnetron sputtering aluminum oxide to form cascade protection; the functional layer comprises lead sulfide nanoparticles and nano silicon dioxide, and is directionally modified by a silane coupling agent and a perfluoropolyether surfactant. During preparation, PbS nano-particles are synthesized by combining a PECVD-ALD-magnetron sputtering stepped deposition process (200-150 DEG C) with a solvothermal method, and finally, the PbS nano-particles are formed through spin coating-annealing (300-400 DEG C). The optical loss of the material under the wavelength of 1550 nm is smaller than 0.2 dB / cm, the acid and alkali corrosion resistance is larger than 240 h, the lead dissolution rate is smaller than 0.1 ppm, the interface state density is reduced by 2 orders of magnitude, the contradiction between lithium niobate wafer surface degradation, photoelectric property degradation and lead-containing material environment risk is solved, and the material is suitable for 5G optical waveguide and quantum integrated device packaging.

The invention belongs to the technical field of semiconductor manufacturing, and discloses a process chamber and atomic layer deposition equipment. The process chamber comprises a chamber body and a spray header, the chamber body is provided with a reaction cavity and an exhaust passage communicated with the reaction cavity, the spray header is arranged in the reaction cavity and is provided with an air inlet, a spray cavity and a plurality of spray holes, the air inlet is communicated with the spray cavity, the spray cavity is communicated with the reaction cavity through the spray holes, a guide plate is arranged in the spray cavity, and the guide plate is communicated with the reaction cavity through the spray holes. The guide plate is positioned between the air inlet and the plurality of spraying holes, and is used for dispersing and guiding air introduced from the air inlet to the plurality of spraying holes; the atomic layer deposition equipment comprises the process chamber and further comprises a preheating chamber, a cooling chamber and a conveying device, and the preheating chamber, the process chamber and the cooling chamber are sequentially arranged in the conveying direction of the conveying device. According to the process chamber, the uniformity of precursor gas injection is effectively improved, the thickness consistency of an atomic layer film on a substrate is improved, and the generation effect of the atomic layer film is ensured.

The invention discloses an ultra-steep sub-threshold slope transistor and a preparation method thereof, and belongs to the technical field of integrated circuits. An ultra-steep sub-threshold slope transistor is realized by using a superlattice stacked high-kappa gate dielectric, the superlattice stacked high-kappa gate dielectric comprises a plurality of HfO2 / ZrO2 / HfO2 stacking units which are stacked together, and an insertion layer is arranged between every two adjacent stacking units. Growing the superlattice stacked high-kappa gate dielectric by adopting an atomic layer deposition method, performing annealing treatment, and adjusting the gate dielectric interface, the electric leakage characteristic and the proportion of a ferroelectric quadrature phase to an antiferroelectric tetragonal phase by adjusting the type of an insertion layer and / or adjusting an oxygen source and pulse time thereof during growth, so as to obtain the superlattice stacked high-kappa gate dielectric. An ultra-steep sub-threshold slope transistor with a high on-off ratio is achieved. Compared with a traditional transistor, the transistor provided by the invention has higher on-state current, lower sub-threshold swing and smaller electric leakage.

The invention provides a spatial ALD (atomic layer deposition) coating device, a coating method and a composite film. According to the spatial ALD coating device, a coating cavity comprises at least one group of reaction areas which are connected in sequence, and the adjacent reaction areas are isolated through air curtains; each group of reaction areas consists of a precursor reaction area and a co-reactant reaction area which are separated by an air curtain; the gas inlet assembly comprises a precursor source gas inlet piece, a co-reactant source gas inlet piece and a gas curtain supply piece; the precursor source gas inlet piece comprises a precursor source gas supply device and a precursor source gas transmission device; the co-reactant source gas inlet piece comprises a co-reactant source gas supply device and a co-reactant source gas transmission device; the air curtain supply part comprises an air curtain air supply device and an air curtain air conveying device; and the substrate to be coated is driven by the conveying mechanism to sequentially pass through each group of reaction areas. According to the spatial ALD coating device, the preparation of a composite film with any material ratio can be realized according to requirements, the production efficiency is improved, and the application range is widened.

The invention belongs to the field of lithium ion battery materials, and discloses a chloride coated modified positive electrode material, which comprises a positive electrode material matrix and a chloride LiaMClb coated on the surface of the positive electrode material matrix, M is selected from at least one of Ti, Cr, Mn, Fe, Co and Cu, 1 < = a < = 4, 2 < = b < = 6. According to the preparation method, the chloride LiaMClb is deposited on the surface of the positive electrode material substrate in an atomic layer deposition mode. The invention also discloses a sulfide all-solid-state lithium ion battery which comprises the chloride coated modified positive electrode material. The LiaMClb is selected to coat the modified positive electrode material, the LiaMClb and the positive electrode material show good interface compatibility, and the good oxidation resistance of chloride ions can effectively inhibit the decomposition side reaction of the chloride ions and the positive electrode material in the lithium removal process.

The invention belongs to the technical field of supercapacitor materials, and particularly relates to a coal-based porous carbon material and a preparation method and application thereof. In order to solve the problems of safety, batch stability and easy formation of a pore structure in a process for preparing porous carbon from coal, the method comprises the following steps: firstly, carrying out mixing and kneading treatment on fine-particle raw material coal and a liquid-phase doping agent, and then carrying out drying-low-carbon integrated treatment on the mixture; then activating the low-carbon material at a high temperature by means of water vapor, and then performing refined pore-forming on the cavity structure at a high temperature by means of carbon dioxide gas; after the activation reaction is finished, carrying out impurity removal treatment on the activated material with the high specific surface area by virtue of an acid-base solution; and depositing a layer of organic polymer on the surface of the purified material by adopting an atomic layer deposition technology, and forming a passivation layer on the polymer layer by virtue of high-temperature treatment, thereby obtaining the coal-based porous carbon material with stable performance and structure, and further applying the coal-based porous carbon material to the negative pole piece of the supercapacitor.

A method for depositing a metal compound coating on the surface of a polymer base material at low temperature comprises the following steps: placing the polymer base material in an atomic layer deposition chamber, vacuumizing, and adjusting the temperature and pressure of the chamber; activating the surface of the polymer base material by using plasma; injecting a metal organic precursor into the reaction cavity in a pulse manner at the temperature lower than 300 DEG C, and forming a uniform metal compound coating through plasma enhanced atomic layer deposition; and the redundant precursor is purged through gas, and the steps are repeated until the coating with the target thickness is obtained. According to the method, the surface of the plastic base material is modified under the condition that the temperature is lower than 300 DEG C through a plasma enhanced atomic layer deposition (PEALD) technology, the metal compound coating which is uniform in thickness and controllable in component is obtained, and the requirement for improving the biocompatibility of the surface of the implant in the medical field is met.

Semiconductor structures and methods of forming the same are provided. An exemplary method includes depositing a contact etch stop layer (CESL) and an interlayer dielectric (ILD) layer over a bottom epitaxial source / drain feature formed in a bottom portion of a source / drain trench, etching back the CESL and the ILD layer to expose a top portion of the source / drain trench, performing a plasma-enhanced atomic layer deposition process (PEALD) to form an insulating layer over the source / drain trench, where the insulating layer comprises a non-uniform deposition thickness and comprises a first portion in direct contact with the ILD layer and a second portion extending along a sidewall surface of the top portion of the source / drain trench. Method also includes removing the second portion of the insulating layer and forming a top bottom epitaxial source / drain feature on the second portion of the insulating layer and in the source / drain trench.

The invention provides a preparation method and system for improving the reliability of a gallium nitride transistor, and relates to the technical field of manufacturing, and the method comprises the steps: placing a pretreated sapphire substrate in metal organic chemical vapor deposition equipment, introducing trimethyl gallium and ammonia gas as precursors, and carrying out the epitaxial growth of gallium nitride; an alternating pulse supply technology is adopted, and trace iron doping is introduced in the epitaxial growth process so as to reduce the background carrier concentration in the gallium nitride layer; forming a source electrode structure, a drain electrode structure and a grid electrode structure on the gallium nitride epitaxial layer by adopting photoetching and plasma etching technologies; then, a layer of hafnium oxide with the thickness of 5-10 nanometers is deposited in the grid electrode area through the atomic layer deposition technology to serve as a grid dielectric layer; then a plasma enhanced chemical vapor deposition technology is adopted; and finally, the whole device is processed by using a laser annealing technology, and the annealing process is carried out in a nitrogen atmosphere so as to eliminate an interface state and reduce leakage current.