125 results about "Patterned substrate" patented technology

The embodiment of the invention discloses a magnetic separation chip for cell separation and a preparation method thereof.The magnetic separation chip structurally comprises a sample layer, a functional layer, a clamp set and a magnetic field source, the sample layer is composed of a flow channel layer and a sealing film, and the flow channel layer is provided with a sheath fluid inlet, a sample inlet and a sample outlet; the sealing film is attached to the open surface of the runner layer to seal the runner; the functional layer is located below the sample layer and comprises a patterned substrate and an amorphous alloy soft magnetic strip material, the patterned substrate is provided with a counter bore groove, the amorphous alloy soft magnetic strip material is embedded into the counter bore groove, and the upper surface of the amorphous alloy soft magnetic strip material is flush with the upper surface of the substrate, right faces the sealing film and is arranged in the extending direction of the flow channel; the clamp group comprises an upper clamping plate and a lower clamping plate, the upper clamping plate is arranged above the sample layer, the lower clamping plate is arranged below the functional layer, the upper clamping plate is provided with runner holes corresponding to the inlets and the outlets, and the two are connected through bolts to clamp and fix the sample layer and the functional layer; the magnetic field source is arranged at the end where the sample outlet is located and on one side opposite to the functional layer, so that a gradient magnetic field which is gradually enhanced from the inlet to the outlet is formed in the flow channel.

The invention discloses a light-emitting diode chip for improving the polarization effect of a quantum well light-emitting layer and a preparation method of the light-emitting diode chip. Comprising a sapphire patterned substrate, a buffer layer, a defect barrier layer, an N-type gallium nitride layer, a current expansion layer, a stress release layer, a quantum well light-emitting layer, a polarization buffer layer, a P-type electron barrier layer, a P-type gallium nitride layer, a transparent conductive layer, an electrode layer and a protective layer which are sequentially arranged from bottom to top. The polarization buffer layer is arranged between the quantum well light-emitting layer and the P-type electron blocking layer, buffers energy level abrupt change, and improves the polarization effect. A composite structure of an In < x > Ga < 1-x > N / GaN superlattice and a GaN / Al < y > Ga < 1-y > N superlattice is inserted between the multi-quantum well layer and the electron blocking layer, mutation of energy level is buffered by adjusting gradient doping of In and Al, the polarization effect in quantum wells caused by high potential barriers of the electron blocking layer is effectively improved, and the luminous efficiency of the diode is further improved.

The invention discloses a photoetching technology implementation method with a large exposure field, a chip-level chip interconnection method and photoetching equipment. The photoetching technology implementation method with the large exposure field is applied to photoetching equipment, the photoetching equipment comprises a projection system with a reduction ratio of 0.1-2.5 times, and the method comprises the following steps: loading a to-be-exposed substrate with a pattern on an objective table, aligning through an alignment mark on the substrate, and offsetting a set offset distance; executing first exposure, and transferring a preset pattern of the mask to a first exposure area of the substrate through a projection system; the substrate or the mask plate is transversely stepped by M times of the transverse size of the original pattern unit or longitudinally stepped by N times of the longitudinal size of the original pattern unit, second exposure is executed, and the preset pattern is transferred to a second exposure area of the substrate through the projection system; and continuously executing transverse stepping or longitudinal stepping and second exposure until the exposure of the target area on the substrate is completed. According to the scheme, a large-size exposure field can be formed, and high-density interconnection of integrated circuits is realized.

The invention relates to the technical field of semiconductor light emitting diodes, and discloses a composite patterned substrate and a preparation method thereof. The preparation method comprises the following steps: preparing a SiO2 film layer on a substrate; coining glue is prepared on the SiO2 film layer; transferring the pattern of the soft template to the SiO2 film layer by using a nanoimprint technology; performing etching treatment on the SiO2 film layer to form a graphic structure with a preset morphology, and etching to remove part of the substrate material to form a pit to obtain a patterned substrate; preparing an AlN layer on the substrate, filling the pit with the AlN layer, and covering the surface of the graphic structure; carrying out photoetching treatment and etching treatment on the AlN layer, so that the AlN layer is filled in the pit and covers the side surface of a part of the pattern structure; and carrying out annealing treatment, and removing the residual photoresist to obtain the composite patterned substrate. By implementing the preparation method provided by the invention, the obtained composite patterned substrate can improve the crystal quality of the epitaxial layer, thereby improving the internal quantum efficiency and final brightness of the chip.

The invention discloses a circuit board line deposition method and a circuit board line, and belongs to the technical field of circuit board manufacturing, and the method comprises the steps: carrying out the pretreatment of a substrate, the surface of which does not contain a copper foil, and forming a through hole in the substrate; forming graphical printing ink on the surface of the pre-treated substrate; putting the patterned substrate into a chemical copper deposition tank containing a copper salt and a reducing agent, and enabling copper ions to be reduced and separated out to be attached to the hole walls of the through holes and the surface of the substrate which is not covered by the ink under the catalytic action, so as to obtain a copper layer with a target thickness and complete the manufacturing of a circuit layer; the thickness of the ink is greater than or equal to that of the copper layer. The thick copper is directly deposited on the surface of the substrate without the copper foil by combining the circuit deposition process and the thick copper deposition process aiming at the substrate without the copper foil on the surface, so that the cost can be continuously reduced, and the manufacturing cost is greatly reduced through new process development on the premise of meeting the product quality.

The invention discloses a patterned sapphire composite substrate and a preparation method, and relates to the field of LED epitaxial patterned substrate materials, and the patterned sapphire composite substrate comprises a substrate material layer which is made of sapphire, aluminum nitride or gallium nitride; a low refractive index layer material layer; the low-refractive-index material layer is attached to the periphery of the substrate material layer to form a conical inner and outer two-layer type composite pattern structure, and the density of the low-refractive-index material layer is in a gradient increase trend of 1.42-1.52 from a position close to the substrate to a position far away from the substrate. The method has the advantages that the light extraction efficiency is improved, the dislocation density is reduced, the crystal quality is enhanced, the etching process is optimized, the light extraction efficiency is improved, the process compatibility is high, and the cost effectiveness is high.

The invention provides an interlayer surface plasmon resonance biosensor which comprises a patterned substrate, and detection areas which are arranged in an array and are formed by metal layers are formed on the surface of the patterned substrate; the spacing layer is formed in the detection area and comprises capture molecules; the nanometer adhesive tape is compounded on the surface of the patterned substrate, and a metal nanoparticle layer is arranged on one surface, facing the patterned substrate, of the nanometer adhesive tape. The invention further provides a preparation method and application of the interlayer surface plasma resonance biosensor. The nano double-sided adhesive tape is used as a transfer medium, and stable transfer of the metal nanoparticles from the substrate to the adhesive tape can be realized through two-step operation of'attaching-stripping ', so that the transfer difficulty of the metal nanoparticle layer is remarkably reduced, the operation is simplified, and the transfer efficiency is improved. And parameters such as the size, the morphology and the density of the nanoparticles in the sandwich structure can be accurately controlled, and the obtained metal nanoparticle layer is good in stability and can be stored for a long time.

The application provides a two-dimensional nanometer patterning substrate and a preparation method. A graphene film is prepared on a supporting substrate; a metal film is deposited on the graphene film; the metal film is converted into discontinuous metal nanoparticles; the graphene pattern is etched by using the metal nanoparticles as a mask; the metal nanoparticle mask on the graphene pattern is removed; and a nitride material is grown on the graphene pattern. Compared with existing electron beam exposure, nano-imprinting and nano-sphere mask schemes, the two-dimensional nanometer patterning substrate and the preparation method are simple and feasible, and the cost can be effectively controlled. In addition, the two-dimensional nanometer patterning substrate and the preparation method are suitable for large-size and batch construction, and the above technical details are suitable for the advantages. Finally, the nanometer pattern size and other geometric parameters have high flexibility, which is important for promoting subsequent lateral epitaxy of high-quality nitride materials.

The utility model belongs to the technical field of LED epitaxial structures, and particularly discloses a wavelength-adjustable LED epitaxial structure, which comprises a patterned substrate, a buffer layer grown on the patterned substrate, a 3D + GR layer grown on the buffer layer, an N layer grown on the GR layer, and a polarization improvement layer grown between the GR layer and the N layer or between the buffer layer and the 3D layer. And the polarization improvement layer sequentially comprises an AlN1 layer, a ferroelectric material layer and an AlN2 layer. According to the utility model, a ferroelectric material layer (BaTiO, PbZrTiO3 and the like) is inserted into an N-type semiconductor, and spontaneous polarization can be generated under the action of an external electric field or stress by utilizing an important characteristic, namely polarization reversibility, of a ferroelectric material. When the ferroelectric material is plated below the N layer (electronic conducting layer), the polarization direction of the ferroelectric material can be regulated and controlled through an external electric field or stress. By adjusting the polarization direction and intensity, the fine adjustment of PN junction energy level distribution can be realized, so that the wavelength can be indirectly and quickly adjusted.

The invention relates to the technical field of semiconductor materials, in particular to a method for growing a high-quality GaN crystal through a porous GaN micron pyramid structure. The method comprises the following steps: providing a GaN substrate, and arranging a mask with regular periodic patterns on the surface of the GaN substrate to obtain a pattern substrate; wherein the regular periodic pattern is an array formed by a plurality of pores, and the pores can expose the GaN substrate; growing a GaN pyramid in the pores of the pattern substrate so as to construct a micron GaN pyramid array in the pattern area of the pattern substrate; etching a porous structure on the micron GaN pyramid array by using electrochemical etching to obtain a substrate with the porous micron GaN pyramid array; and taking the porous micron GaN pyramid array as a seed crystal, and carrying out epitaxial growth by using an HVPE method to obtain the target GaN crystal. According to the invention, the GaN crystal with large size, low defect density and high crystal quality can be prepared.

Polishing compositions and methods are provided which enable barrier polishing with improved flatness for patterned substrates comprising copper, tantalum, and TEOS. Provided are polishing compositions comprising: an abrasive with a mean particle size (MPS) of 100 nm to 150 nm; a phosphate surfactant; an electronic conductivity (EC) controller; an organic acid; and a water-soluble polymer, wherein a ratio of a concentration of the abrasive to a concentration of the phosphate surfactant is greater than or equal to 50 and less than or equal to 1040.

A photovoltaic (PV) module includes a substrate structure, a plurality of patterned substrate conductor elements, and a dielectric layer provided over the substrate and over the patterned substrate conductor elements. Adjacent first and second PV cells are part of a set of series-connected PV cells. A first set of top via structures extends through the first PV cell and the dielectric layer to a first set of the patterned substrate conductor elements, wherein each patterned substrate conductor element of the first set of patterned substrate conductor elements respectively is a bridge conductor that extends from a first point underneath the first PV cell to a second point underneath the second PV cell. A first set of bottom via structures extend through the dielectric layer to the first set of patterned substrate conductor elements at portions corresponding to the second PV cell.

The present invention relates to the field of patterning substrates with periodic dot structures in the micro- or sub-micrometer range, in particular to an apparatus and a method for structuring surfaces and the interior of a transparent substrate by means of laser interference structuring. The pattern produced in this way with periodic dot structures in the micro- or sub-micrometer range is characterized by a pronounced anti-reflective property. In addition, the present invention relates to a patterned substrate with anti-reflective properties comprising a periodic dot structure.

An electronic device manufacturing system configured to obtain sensor data associated with a deposition process performed in a process chamber to deposit a film stack on a surface of a substrate. The film stack can include a known film pattern and an unknown film pattern. The manufacturing system is further configured to input the sensor data into a first trained machine-learning model to obtain a first output value of the first trained machine-learning model. The first output value can be associated with the known film pattern. The manufacturing system is further configured to input the first output value into a second trained machine-learning model to obtain a second output value of the second trained machine-learning model. The second output value can be indicative of metrology data of the known film pattern.

A generative network, conditioned on metrology data obtained from at least one patterned substrate, is used to process an input, to generate an output. The input is substrate model data defining a substrate model of the at least one substrate, and the output of the generative network is used to produce updated substrate model data defining an updated substrate model. In one or more further iterations, the generative network processes an input based on the updated substrate model generated in the preceding operation. The output of the generative network in the last iteration is used to generate substrate description data describing the at least one substrate.

The invention provides a method for preparing a transparent antimony-based chalcogenide film and a photoelectric detector through selective deposition. The transparent photoelectric detector structure provided by the invention comprises a transparent glass substrate, a patterned substrate, a light absorption layer, a wide-band-gap oxide covering layer and a transparent conductive electrode. The transparent light absorption layer is an antimony-based chalcogenide film and is selectively deposited on the patterned substrate. The antimony-based chalcogenide film has different growth orientations and adhesion coefficients on different substrates, and regional selective deposition of the antimony-based chalcogenide film on the patterned substrate can be realized by regulating and controlling the temperature of the substrate. The method provided by the invention breaks through the limitation of the existing transparent photoelectric detector material, and avoids the pattern edge interface damage caused by the traditional patterning methods, such as a stripping method, an etching method and a laser ablation process. The prepared transparent photoelectric detector has the advantages of being simple in preparation, accurate in transparency regulation and control, wide in spectral response in the range of 405-980 nm and the like.

An example of a resin composition includes an epoxy resin matrix and functionalized silica nanoparticles incorporated into the epoxy resin matrix. The functionalized silica nanoparticles have an average particle size up to about 10 nm. The resin composition is imprintable using nanoimprint lithography. The resin composition may be used to manufacture a patterned substrate for a flow cell.

A photovoltaic module includes a substrate structure having a dielectric layer and a patterned substrate conductor. First and second PV cells are provided over the substrate structure, which independently include i) a bottom electrode, ii) a photoactive layer overlaying the bottom electrode, and iii) a transparent top electrode overlaying the photoactive layer. A top via structure extends through the first PV cell and the dielectric layer to a first portion of the patterned substrate conductor and electrically connects the first portion of the patterned substrate conductor to the top electrode of the first PV cell. A bottom via structure extends through at least the dielectric layer to a second portion of the patterned substrate conductor, the second portion corresponding to the second PV cell, wherein the bottom via structure electrically connects the second portion of the patterned substrate conductor to the bottom electrode of the second PV cell.

Described herein are machine learning based systems, methods, and non-transitory computer readable media for determining three-dimensional (3D) information of structures of a patterned substrate. The 3D information can be determined using a neural network to convert a two-dimensional image to a 3D image. In a method, the neural network is trained by supplying varying parameters to simulated images of a sample to model a real manufactured IC structure. The trained network generates a depth map from a newly supplied image of the sample to predict defect locations. The depth map can be converted to a binary map to predict defect size and location, which can be used to guide inspection of the sample using an inspection tool.

Wavefront measurement of a multi-core optical fiber is described. A multi-core optical fiber is configured to conduct radiation from a radiation source to a structure, such as a metrology target, in one or more layers of a patterned substrate, and to conduct diffracted and / or reflected radiation from the metrology target to a radiation sensor. The multi-core optical fiber has a length configured to facilitate placement of the radiation source and / or the radiation sensor in spaced locations relative to the patterned substrate. Optical path length differences between sets of fiber cores with reflectors in the multi-core optical fiber are determined for radiation of different wavelengths from the radiation source. The optical path length difference is determined based on a path length of reflected radiation that is incident on the radiation sensor after returning through the core set. The optical path length difference indicates wavefront distortion.

The present invention relates to the field of patterning substrates with periodic dot structures in the micro- and / or sub-micrometer range, in particular a patterned substrate and a method for patterning surfaces of a transparent substrate by means of laser interference patterning. The patterning produced in this way with periodic dot structures in the micro- and / or sub-micrometer range is characterized by pronounced anti-fogging properties.

To provide polishing compositions and methods that enable barrier polishing, improving the flatness of patterned substrates containing copper, tantalum, and TEOS. [Solution] The present invention provides an abrasive composition comprising: an abrasive having an average particle size (MPS) of 100 nm to 150 nm; a phosphate surfactant; an electronic conductivity (EC) control agent; an organic acid; and a water-soluble polymer, wherein the ratio of the concentration of the abrasive to the concentration of the phosphate surfactant is 50 or more and less than 1040.

Disclosed is a method of deforming a first patterned substrate or one or more first substrate portions thereof, configured to be bonded to a second patterned substrate, the method comprising providing at least said first patterned substrate or one or more first substrate portions thereof with a layer comprising a material that changes its phase when exposed to a radiation; and irradiating the layer with the radiation, wherein the radiation imposes a stress within the first patterned substrate or one or more first substrate portions thereof, the stress causing deformation of the first patterned substrate or one or more first substrate portions thereof that at least partially corrects a position error of a pattern of the first patterned substrate or one or more first substrate portions thereof.

The invention discloses a preparation method of a GaN patterned substrate and the GaN patterned substrate, which can completely etch a GaN layer but not etch a sapphire layer, can ensure that the perpendicularity of the inner side surface of an etching pit is good, and is beneficial to GaN liquid phase nucleation and automatic separation. The preparation method comprises the following steps: performing laser etching on a sapphire layer to obtain a first through hole; performing vacuum evaporation on the first through hole so as to be filled with an electric conductor; plating a conductive film layer on the surface of the sapphire layer; forming a photoresist layer on the surface of the GaN layer, and then performing photoetching treatment on the photoresist layer to form a second through hole corresponding to the first through hole in position on the photoresist layer; soaking the GaN substrate in a photoelectrochemical electrolyte, connecting the conductive film layer to a positive electrode of a power supply, connecting the photoelectrochemical electrolyte to a negative electrode of the power supply and a contrast electrode, enabling a light source to directly face the position of the second through hole, and corroding the position, corresponding to the second through hole, of the GaN layer until a conductor is exposed; and cleaning the photoresist layer to obtain the GaN patterned substrate.

The application provides a composite patterned substrate and a preparation method and application thereof, and the substrate comprises a sapphire substrate layer and a pattern structure layer arranged on the sapphire substrate layer, wherein the pattern structure layer comprises a plurality of periodic convex structures, and each convex structure comprises, from bottom to top, a sapphire root, a Pt metal film interlayer and a hetero-material pattern. The application effectively improves the light-emitting efficiency of a GaN-LED by sandwiching the Pt metal film between the sapphire substrate layer and the hetero-material pattern. Meanwhile, the design ingeniously solves the problem of the influence of the metal reflection layer on the growth of a GaN single crystal, and realizes the epitaxial preparation of a high-efficiency LED device. In addition, the preparation method is simple and low in cost, and has a good industrialization prospect.

This application provides an anti-reflective composition, an anti-reflective film, a patterning method, a patterned substrate, a semiconductor device, and a method for fabricating the same. Applying the film formed by this anti-reflective composition to the fabrication process of a semiconductor device can effectively reduce the reflection and diffraction of light sources by components such as the substrate beneath the photosensitive material film, and can further reduce the linewidth roughness of the patterned film and improve the white edge phenomenon of the patterned film.

The invention discloses a sub-nano patterned substrate assisted MPCVD diamond heteroepitaxy system and a sub-nano patterned substrate assisted MPCVD diamond heteroepitaxy method. The method comprises the following steps: acquiring microwave power and spectral data in an MPCVD reaction cavity and surface temperature data of a heterogeneous substrate of which the surface is provided with a sub-nano pattern in advance; determining a current reaction stage according to the spectral data, calculating a current gas proportion, and generating a corresponding constraint condition; calculating through deep learning to obtain an expected value; judging whether the microwave power and the gas proportion meet expected values or not, if not, adjusting to the expected values, calculating the average temperature of the surface temperature data, and judging whether the average temperature meets the expected values or not; if yes, calculating the temperature difference between the surface temperature of the sub-nanometer pattern of the heterogeneous substrate and the temperature of the peripheral area to obtain a temperature difference, and judging whether the temperature difference is within a preset temperature interval or not, otherwise, changing the airflow distribution; and outputting an experimental analysis report. By monitoring spectral data and temperature distribution in real time and utilizing the sub-nanometer pattern, the defect problem caused by lattice mismatch is solved.

The invention belongs to the technical field of semiconductors, and relates to a composite patterned substrate adaptive to a high-quality GaN-based epitaxial layer and a preparation method thereof, and the preparation method comprises the following steps: S1, carrying out the etching of a heterogeneous layer of a conical structure on the substrate through a patterned transfer technology, so as to form a concave-convex microstructure on the side wall of the heterogeneous layer; and S2, depositing a buffer layer on the heterogeneous layer with the concave-convex microstructure on the side wall. A concave-convex microstructure is arranged on the side wall of a heterogeneous layer, and the coverage rate of a buffer layer is regulated and controlled through the concave-convex microstructure and a deposition process, so that the phenomenon of high coverage rate of the top of the buffer layer caused by a graphical conical structure is inhibited, the side wall nucleation rate in subsequent epitaxial GaN nucleation is reduced, GaN crystals are guided to laterally epitaxy, and the GaN quality in epitaxy is improved.

A method for patterning a substrate in which a patterned photoresist structure can be formed on a substrate, the patterned photoresist structure having sidewalls. A conformal layer of spacer material can be deposited on the sidewalls. The patterned photoresist structure can then be removed from the substrate leaving behind the spacer material. The sidewall spacers can then be used as an etch mask to directionally etch the substrate to form a substrate having a target critical dimension.

A GaN-based direct white light-emitting LED epitaxial thin film structure and a preparation method therefor. The structure mainly comprises a sapphire patterned substrate, a buffer layer, a uGaN layer, a rough porous layer, an n-GaN layer, a yellow light quantum well layer, an electron blocking layer, and a p-type layer. The rough porous layer is composed of an InGaN layer and a GaN layer which grow alternately. A porous structure is formed by H2 etching treatment at a specific temperature, and blue light emitting is realized. The yellow light quantum well layer is responsible for light emitting in a yellow band. Direct white light emitting can be realized without fluorescent powder, so that the production process is simplified, the cost is reduced, and the stability and controllability of a light source are improved. The present invention can be widely applied to lighting, display, backlight and other fields, and has significant market potential and practical value.