185 results about "Patterned substrate" patented technology

The invention discloses a multilayer composite patterned substrate and a preparation method and application thereof, and relates to the technical field of substrate material preparation. The invention provides a multi-layer composite patterned substrate which comprises a sapphire bottom layer, a periodic pattern layer and a reflecting material layer. The periodic pattern layer is arranged on the surface of the sapphire bottom layer; the periodic pattern layer is provided with a window area, and the window area is a non-coverage area of the periodic pattern layer on the sapphire bottom layer; a reflecting material layer is arranged on the surface of a non-window area of the periodic pattern layer; and an epitaxial layer can be additionally arranged between the sapphire bottom layer and the periodic pattern layer. According to the invention, the surface emergent light of the LED device is obviously increased, so that the external quantum efficiency is improved, and meanwhile, the problem that the GaN growth is influenced by a reflecting layer material (mainly a metal reflecting mirror material) is solved.

The embodiment of the invention discloses a magnetic separation chip for cell separation and a preparation method thereof.The magnetic separation chip structurally comprises a sample layer, a functional layer, a clamp set and a magnetic field source, the sample layer is composed of a flow channel layer and a sealing film, and the flow channel layer is provided with a sheath fluid inlet, a sample inlet and a sample outlet; the sealing film is attached to the open surface of the runner layer to seal the runner; the functional layer is located below the sample layer and comprises a patterned substrate and an amorphous alloy soft magnetic strip material, the patterned substrate is provided with a counter bore groove, the amorphous alloy soft magnetic strip material is embedded into the counter bore groove, and the upper surface of the amorphous alloy soft magnetic strip material is flush with the upper surface of the substrate, right faces the sealing film and is arranged in the extending direction of the flow channel; the clamp group comprises an upper clamping plate and a lower clamping plate, the upper clamping plate is arranged above the sample layer, the lower clamping plate is arranged below the functional layer, the upper clamping plate is provided with runner holes corresponding to the inlets and the outlets, and the two are connected through bolts to clamp and fix the sample layer and the functional layer; the magnetic field source is arranged at the end where the sample outlet is located and on one side opposite to the functional layer, so that a gradient magnetic field which is gradually enhanced from the inlet to the outlet is formed in the flow channel.

The invention relates to the technical field of semiconductor device manufacturing, in particular to an etching method for improving the steepness of a graphic structure and a grating master mask, and the etching method comprises the following steps: S1, forming a graphic photoresist layer on the surface of a substrate; s2, the patterned photoresist layer is used as a masking layer, and the substrate is etched; wherein etching gas adopted in the etching process comprises SF6, Ar and CF4, the flow ratio of the SF6 to the Ar to the CF4 is (1-4): (1.5-4): 1, the radio frequency power of the etching process is 150-400 W, and the cavity pressure is 5-20 mTorr; and S3, the patterned photoresist layer is removed, and the patterned substrate is obtained. According to the method, the fluorocarbon polymer is generated in the etching process to protect the side wall, the vertical etching effect is completed while the morphology of the side wall is protected, the steepness of the side wall can reach 85-90 degrees, the etching steepness is greatly improved, the etching quality of a high-resolution pattern is improved, and a high-precision pattern structure is obtained.

The invention provides a flip LED chip and a manufacturing method thereof. According to the method, a traditional slender flip LED chip is designed and optimized to be of a wide and short structure, the layout of slender strip-shaped P / N electrode bonding pads is adopted, and the distance between the two electrode bonding pads is controlled to be 50-250 micrometers. The specific process comprises the steps of growing an LED epitaxial structure on a patterned substrate, forming an MESA, determining the size of a chip, sequentially preparing a transparent conductive layer, a medium reflecting layer and a metal reflecting layer, and improving the light emitting efficiency; and then depositing a double-layer insulating passivation layer and windowing, and manufacturing a two-stage metal electrode to form a P / N bonding pad. Through the design, the stress distribution of the chip is more uniform, the crystal breaking risk caused by stress concentration in the solid crystal packaging process is greatly reduced, meanwhile, the tin connection short circuit is avoided through the moderate bonding pad distance, and the reliability and the product yield of the LED chip are remarkably improved.

The invention provides a composition, application thereof and a preparation method of a semiconductor device. The composition comprises the following components in percentage by mass: 5-50% of a first aprotic organic solvent; 5%-30% of a second aprotic organic solvent; 0.01%-5% of an acid; 0.15%-5% of a corrosion inhibitor; 10%-85% of water; the corrosion inhibitor comprises amino acid with the molecular weight larger than or equal to 100. The composition provided by the invention can be mixed with an oxidizing agent for use, etching residues on the surface of a patterned substrate can be effectively cleaned after mixing, a part of a hard mask on the patterned substrate can be selectively removed while a metal material in the patterned substrate is effectively protected, and the etching selection ratio of the hard mask to the metal material is improved.

An example of a resin composition includes an epoxy resin matrix and functionalized silica nanoparticles incorporated into the epoxy resin matrix. The functionalized silica nanoparticles have an average particle size up to about 10 nm. The resin composition is imprintable using nanoimprint lithography. The resin composition may be used to manufacture a patterned substrate for a flow cell.

The invention discloses a light-emitting diode chip for improving the polarization effect of a quantum well light-emitting layer and a preparation method of the light-emitting diode chip. Comprising a sapphire patterned substrate, a buffer layer, a defect barrier layer, an N-type gallium nitride layer, a current expansion layer, a stress release layer, a quantum well light-emitting layer, a polarization buffer layer, a P-type electron barrier layer, a P-type gallium nitride layer, a transparent conductive layer, an electrode layer and a protective layer which are sequentially arranged from bottom to top. The polarization buffer layer is arranged between the quantum well light-emitting layer and the P-type electron blocking layer, buffers energy level abrupt change, and improves the polarization effect. A composite structure of an In < x > Ga < 1-x > N / GaN superlattice and a GaN / Al < y > Ga < 1-y > N superlattice is inserted between the multi-quantum well layer and the electron blocking layer, mutation of energy level is buffered by adjusting gradient doping of In and Al, the polarization effect in quantum wells caused by high potential barriers of the electron blocking layer is effectively improved, and the luminous efficiency of the diode is further improved.

The invention discloses a photoetching technology implementation method with a large exposure field, a chip-level chip interconnection method and photoetching equipment. The photoetching technology implementation method with the large exposure field is applied to photoetching equipment, the photoetching equipment comprises a projection system with a reduction ratio of 0.1-2.5 times, and the method comprises the following steps: loading a to-be-exposed substrate with a pattern on an objective table, aligning through an alignment mark on the substrate, and offsetting a set offset distance; executing first exposure, and transferring a preset pattern of the mask to a first exposure area of the substrate through a projection system; the substrate or the mask plate is transversely stepped by M times of the transverse size of the original pattern unit or longitudinally stepped by N times of the longitudinal size of the original pattern unit, second exposure is executed, and the preset pattern is transferred to a second exposure area of the substrate through the projection system; and continuously executing transverse stepping or longitudinal stepping and second exposure until the exposure of the target area on the substrate is completed. According to the scheme, a large-size exposure field can be formed, and high-density interconnection of integrated circuits is realized.

The invention provides an organic metal compound and a preparation method thereof, a patterning composition, a patterning method, a patterning film, a patterning substrate and an electronic component, the organic metal compound is obtained through special molecular design, the molecular formula of the organic metal compound comprises a structure shown as a formula 1: (RaM) b (mu2-O) c (L) d formula 1, [mu] 2-O is a two-linked oxygen atom, R is at least one of C1-30 linear alkyl or branched alkyl or naphthenic base, C2-30 alkenyl, C2-30 alkynyl and C6-30 aryl; l is an organic ligand capable of coordinating with M, M is Sn, Sd or In, 1 < = a < = 5, 1 < = b < = 10, 1 < = c < = 10, and 1 < = d < = 6b. The organometallic compound of the present invention can be used with advantages in terms of high resolution and pattern fidelity, and is particularly suitable for fine patterning in microelectronic and semiconductor manufacturing.

The invention relates to the technical field of semiconductor light emitting diodes, and discloses a composite patterned substrate and a preparation method thereof. The preparation method comprises the following steps: preparing a SiO2 film layer on a substrate; coining glue is prepared on the SiO2 film layer; transferring the pattern of the soft template to the SiO2 film layer by using a nanoimprint technology; performing etching treatment on the SiO2 film layer to form a graphic structure with a preset morphology, and etching to remove part of the substrate material to form a pit to obtain a patterned substrate; preparing an AlN layer on the substrate, filling the pit with the AlN layer, and covering the surface of the graphic structure; carrying out photoetching treatment and etching treatment on the AlN layer, so that the AlN layer is filled in the pit and covers the side surface of a part of the pattern structure; and carrying out annealing treatment, and removing the residual photoresist to obtain the composite patterned substrate. By implementing the preparation method provided by the invention, the obtained composite patterned substrate can improve the crystal quality of the epitaxial layer, thereby improving the internal quantum efficiency and final brightness of the chip.

The invention discloses a patterned substrate and a preparation method and application thereof, and belongs to the technical field of micro-nano processing. The preparation method of the patterned substrate comprises the following steps: cleaning and drying a substrate to remove organic pollutants on the surface to obtain a pretreated substrate; coating photoresist on the pretreated substrate, and carrying out photoetching treatment to obtain a substrate after photoetching; developing the photoetched substrate, and removing the residual developing solution to obtain a developed substrate; with silicon dioxide as a target material and inert gas as sputtering gas, depositing silicon dioxide on the developed substrate through a radio frequency magnetron sputtering method under the sputtering power of 100-300 W to obtain a substrate containing silicon dioxide; and removing the residual photoresist from the silicon dioxide-containing substrate to obtain a patterned substrate. The preparation method is simple, convenient, safe and environment-friendly in preparation process, and when the prepared patterned substrate is used for preparing Ga2O3, the crystallization quality of a Ga2O3 film can be effectively improved.

The invention discloses a circuit board line deposition method and a circuit board line, and belongs to the technical field of circuit board manufacturing, and the method comprises the steps: carrying out the pretreatment of a substrate, the surface of which does not contain a copper foil, and forming a through hole in the substrate; forming graphical printing ink on the surface of the pre-treated substrate; putting the patterned substrate into a chemical copper deposition tank containing a copper salt and a reducing agent, and enabling copper ions to be reduced and separated out to be attached to the hole walls of the through holes and the surface of the substrate which is not covered by the ink under the catalytic action, so as to obtain a copper layer with a target thickness and complete the manufacturing of a circuit layer; the thickness of the ink is greater than or equal to that of the copper layer. The thick copper is directly deposited on the surface of the substrate without the copper foil by combining the circuit deposition process and the thick copper deposition process aiming at the substrate without the copper foil on the surface, so that the cost can be continuously reduced, and the manufacturing cost is greatly reduced through new process development on the premise of meeting the product quality.

The invention discloses a patterned sapphire composite substrate and a preparation method, and relates to the field of LED epitaxial patterned substrate materials, and the patterned sapphire composite substrate comprises a substrate material layer which is made of sapphire, aluminum nitride or gallium nitride; a low refractive index layer material layer; the low-refractive-index material layer is attached to the periphery of the substrate material layer to form a conical inner and outer two-layer type composite pattern structure, and the density of the low-refractive-index material layer is in a gradient increase trend of 1.42-1.52 from a position close to the substrate to a position far away from the substrate. The method has the advantages that the light extraction efficiency is improved, the dislocation density is reduced, the crystal quality is enhanced, the etching process is optimized, the light extraction efficiency is improved, the process compatibility is high, and the cost effectiveness is high.

An embodiment of the present invention discloses a patterned substrate doped with quantum dots, a preparation method thereof, and an LED epitaxial wafer. The preparation method of the patterned substrate doped with quantum dots includes: providing a substrate; forming a hetero-layer on the substrate, and synchronously doping quantum dots during the formation of the hetero-layer; patterning the hetero-layer to form a plurality of hetero-microstructures, and the quantum dots are doped in the hetero-microstructures. The embodiment of the present invention solves the problem of low reliability of phosphors in traditional white LEDs. It can not only enable the hetero-microstructures to realize the function of light excitation to convert the LED color, reducing the process steps of coating phosphors during the packaging process; at the same time, it can also seal the quantum dots in the hetero-microstructures to isolate the external environment, overcoming the disadvantage that traditional coated phosphors are prone to aging and peeling, and contributing to the realization of white LEDs with good color rendering and anti-aging yellowing.

The invention provides an interlayer surface plasmon resonance biosensor which comprises a patterned substrate, and detection areas which are arranged in an array and are formed by metal layers are formed on the surface of the patterned substrate; the spacing layer is formed in the detection area and comprises capture molecules; the nanometer adhesive tape is compounded on the surface of the patterned substrate, and a metal nanoparticle layer is arranged on one surface, facing the patterned substrate, of the nanometer adhesive tape. The invention further provides a preparation method and application of the interlayer surface plasma resonance biosensor. The nano double-sided adhesive tape is used as a transfer medium, and stable transfer of the metal nanoparticles from the substrate to the adhesive tape can be realized through two-step operation of'attaching-stripping ', so that the transfer difficulty of the metal nanoparticle layer is remarkably reduced, the operation is simplified, and the transfer efficiency is improved. And parameters such as the size, the morphology and the density of the nanoparticles in the sandwich structure can be accurately controlled, and the obtained metal nanoparticle layer is good in stability and can be stored for a long time.

The application provides a two-dimensional nanometer patterning substrate and a preparation method. A graphene film is prepared on a supporting substrate; a metal film is deposited on the graphene film; the metal film is converted into discontinuous metal nanoparticles; the graphene pattern is etched by using the metal nanoparticles as a mask; the metal nanoparticle mask on the graphene pattern is removed; and a nitride material is grown on the graphene pattern. Compared with existing electron beam exposure, nano-imprinting and nano-sphere mask schemes, the two-dimensional nanometer patterning substrate and the preparation method are simple and feasible, and the cost can be effectively controlled. In addition, the two-dimensional nanometer patterning substrate and the preparation method are suitable for large-size and batch construction, and the above technical details are suitable for the advantages. Finally, the nanometer pattern size and other geometric parameters have high flexibility, which is important for promoting subsequent lateral epitaxy of high-quality nitride materials.

A patterned liquid crystal monolayer structure (100) on a patterned substrate (900) is described, wherein the patterned substrate comprises a surface region (500) grafted thereto by a liquid crystal compound (300) as a self-assembled monolayer (SAM) (200) and a surface region (400) on the patterned substrate that is not grafted thereto by the SAM. Also described are compositions of selected liquid crystals (200) having different types of polar anchoring groups in an organic spin casting solvent, and using the composition on a substrate containing both or one of a metallic surface region and a non-metallic inorganic silicon compound surface region (depending on the properties of a polar anchoring group on a liquid crystal compound) Methods of selectively depositing SAM and using the selective SAM deposition as a barrier layer to selectively deposit a metal oxide dielectric by ALD on regions that are not grafted by SAM.

The utility model belongs to the technical field of LED epitaxial structures, and particularly discloses a wavelength-adjustable LED epitaxial structure, which comprises a patterned substrate, a buffer layer grown on the patterned substrate, a 3D + GR layer grown on the buffer layer, an N layer grown on the GR layer, and a polarization improvement layer grown between the GR layer and the N layer or between the buffer layer and the 3D layer. And the polarization improvement layer sequentially comprises an AlN1 layer, a ferroelectric material layer and an AlN2 layer. According to the utility model, a ferroelectric material layer (BaTiO, PbZrTiO3 and the like) is inserted into an N-type semiconductor, and spontaneous polarization can be generated under the action of an external electric field or stress by utilizing an important characteristic, namely polarization reversibility, of a ferroelectric material. When the ferroelectric material is plated below the N layer (electronic conducting layer), the polarization direction of the ferroelectric material can be regulated and controlled through an external electric field or stress. By adjusting the polarization direction and intensity, the fine adjustment of PN junction energy level distribution can be realized, so that the wavelength can be indirectly and quickly adjusted.

The invention relates to the technical field of semiconductor materials, in particular to a method for growing a high-quality GaN crystal through a porous GaN micron pyramid structure. The method comprises the following steps: providing a GaN substrate, and arranging a mask with regular periodic patterns on the surface of the GaN substrate to obtain a pattern substrate; wherein the regular periodic pattern is an array formed by a plurality of pores, and the pores can expose the GaN substrate; growing a GaN pyramid in the pores of the pattern substrate so as to construct a micron GaN pyramid array in the pattern area of the pattern substrate; etching a porous structure on the micron GaN pyramid array by using electrochemical etching to obtain a substrate with the porous micron GaN pyramid array; and taking the porous micron GaN pyramid array as a seed crystal, and carrying out epitaxial growth by using an HVPE method to obtain the target GaN crystal. According to the invention, the GaN crystal with large size, low defect density and high crystal quality can be prepared.

Polishing compositions and methods are provided which enable barrier polishing with improved flatness for patterned substrates comprising copper, tantalum, and TEOS. Provided are polishing compositions comprising: an abrasive with a mean particle size (MPS) of 100 nm to 150 nm; a phosphate surfactant; an electronic conductivity (EC) controller; an organic acid; and a water-soluble polymer, wherein a ratio of a concentration of the abrasive to a concentration of the phosphate surfactant is greater than or equal to 50 and less than or equal to 1040.

The invention discloses a patterned substrate, a light emitting diode and a preparation method thereof, and belongs to the technical field of semiconductors. The patterned substrate comprises a substrate body, a plurality of first protrusions and a plurality of second protrusions are located on the surface of the substrate body, the first protrusions are arranged at intervals to form a plurality of first hexagons, and the second protrusions are arranged at intervals to form a plurality of second hexagons. Each second hexagon is positioned in one first hexagon; the first protrusion and the second protrusion are both in a conical shape, the height of the first protrusion is larger than that of the second protrusion, and the diameter of the bottom face of the first protrusion is larger than that of the bottom face of the second protrusion.

A photovoltaic (PV) module includes a substrate structure, a plurality of patterned substrate conductor elements, and a dielectric layer provided over the substrate and over the patterned substrate conductor elements. Adjacent first and second PV cells are part of a set of series-connected PV cells. A first set of top via structures extends through the first PV cell and the dielectric layer to a first set of the patterned substrate conductor elements, wherein each patterned substrate conductor element of the first set of patterned substrate conductor elements respectively is a bridge conductor that extends from a first point underneath the first PV cell to a second point underneath the second PV cell. A first set of bottom via structures extend through the dielectric layer to the first set of patterned substrate conductor elements at portions corresponding to the second PV cell.

The present invention relates to the field of patterning substrates with periodic dot structures in the micro- or sub-micrometer range, in particular to an apparatus and a method for structuring surfaces and the interior of a transparent substrate by means of laser interference structuring. The pattern produced in this way with periodic dot structures in the micro- or sub-micrometer range is characterized by a pronounced anti-reflective property. In addition, the present invention relates to a patterned substrate with anti-reflective properties comprising a periodic dot structure.

An exemplary flow cell includes a patterned substrate having an active area and a bonding area at least partially surrounding the active area. The active area includes a first recess defined in a layer of the patterned substrate, a surface chemical positioned in the first recess, and a first gap area surrounding the first recess. The bonding area includes a second recess defined in the layer and a second gap area surrounding the second recess. An adhesive is positioned over the second recess and over the second gap area. A cover is attached to the adhesive such that a flow channel is defined between a portion of the cover and the active area.

The present invention provides a patterned substrate, a method for preparing the patterned substrate, and an LED chip. The preparation method includes providing a sapphire substrate, depositing a layer of yellow photoresist on the sapphire substrate, preparing a mask, transferring the pattern on the mask onto the yellow photoresist to obtain a first patterned sapphire substrate, etching and cleaning the first patterned sapphire substrate to obtain a second patterned sapphire substrate, preparing a photoresist layer on the second patterned sapphire substrate, removing the photoresist layer on the outer ring of the second patterned sapphire substrate to obtain a third patterned sapphire substrate, and etching and cleaning the third patterned sapphire substrate to obtain a fourth patterned sapphire substrate. The present invention provides a patterned substrate, a method for preparing the patterned substrate, and an LED chip, aiming to address the problem in the prior art of uneven morphology of the inner and outer rings of patterned sapphire substrates, which ultimately leads to a low yield of the outer ring of the extended crystal.

An electronic device manufacturing system configured to obtain sensor data associated with a deposition process performed in a process chamber to deposit a film stack on a surface of a substrate. The film stack can include a known film pattern and an unknown film pattern. The manufacturing system is further configured to input the sensor data into a first trained machine-learning model to obtain a first output value of the first trained machine-learning model. The first output value can be associated with the known film pattern. The manufacturing system is further configured to input the first output value into a second trained machine-learning model to obtain a second output value of the second trained machine-learning model. The second output value can be indicative of metrology data of the known film pattern.

A generative network, conditioned on metrology data obtained from at least one patterned substrate, is used to process an input, to generate an output. The input is substrate model data defining a substrate model of the at least one substrate, and the output of the generative network is used to produce updated substrate model data defining an updated substrate model. In one or more further iterations, the generative network processes an input based on the updated substrate model generated in the preceding operation. The output of the generative network in the last iteration is used to generate substrate description data describing the at least one substrate.

The invention provides a method for preparing a transparent antimony-based chalcogenide film and a photoelectric detector through selective deposition. The transparent photoelectric detector structure provided by the invention comprises a transparent glass substrate, a patterned substrate, a light absorption layer, a wide-band-gap oxide covering layer and a transparent conductive electrode. The transparent light absorption layer is an antimony-based chalcogenide film and is selectively deposited on the patterned substrate. The antimony-based chalcogenide film has different growth orientations and adhesion coefficients on different substrates, and regional selective deposition of the antimony-based chalcogenide film on the patterned substrate can be realized by regulating and controlling the temperature of the substrate. The method provided by the invention breaks through the limitation of the existing transparent photoelectric detector material, and avoids the pattern edge interface damage caused by the traditional patterning methods, such as a stripping method, an etching method and a laser ablation process. The prepared transparent photoelectric detector has the advantages of being simple in preparation, accurate in transparency regulation and control, wide in spectral response in the range of 405-980 nm and the like.

The invention relates to the technical field of ultraviolet LED manufacturing, in particular to a crystal face regulation and control type wide-spectrum deep ultraviolet LED chip and a preparation method thereof. Comprising the steps that a patterned substrate is of a three-dimensional structure with protrusions or recesses, and the height difference between the highest point or the lowest point of each protrusion or recess and the surface of the substrate ranges from 0 micrometer to 10 micrometers; the protrusions or the recesses are composed of inclined plane areas, and the included angle between the inclined plane areas and the surface of the substrate is 0-15 degrees. The epitaxial structure sequentially comprises an n-type AlGaN layer, an AlGaN multi-quantum well structure layer and a p-type AlGaN layer; the p-type ohmic contact composite metal layer is arranged on the p-type AlGaN layer; one side of the n-type AlGaN layer is partially exposed, and an n-type ohmic contact composite metal layer is arranged. The method has the advantages that multiple components are formed in different areas by regulating and controlling the AlGaN component through the inclination angle, multispectral integration on a single chip is achieved, and stability is high; the wavelength range covered by the light-emitting wave band is larger than 20 nm.

The present invention discloses a patterned substrate extended wavelength InGaAs focal plane detector and its preparation method. The period of the patterned substrate is the same as the center distance of the focal plane detector pixels, and the size of the patterned substrate grooves and ridges is the same as the pixel-to-pixel spacing or the pixel spacing and pixel size. The extended wavelength InGaAs detector material structure on the patterned substrate is only available in the absence of SiN. x A semiconductor single crystal material is epitaxially formed on the dielectric layer, corresponding to the focal plane detector chip pixel region. Subsequently, an InGaAs focal plane detector is fabricated through processes such as passivation, metal deposition, and flip-flop soldering. This method allows dislocations in lattice-mismatched materials to terminate at the pattern edge rather than extending upward, reducing the dislocation density of the absorber layer material. The period and size of the patterned substrate align with the focal plane chip pixel region, reducing process complexity and making it suitable for large-scale deployment. This method can also be extended to the fabrication of focal plane detectors using other lattice-mismatched material systems, demonstrating its high versatility.