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904 results about "Patterned substrate" patented technology
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Researchers have developed ways to create patterns — periodic structures of varying geometry and dimension — on the sapphire substrate surface. These sapphire wafers with periodic structures of various shapes such as cone, dome, pyramid, and pillar, etc., are called patterned sapphire substrates (PSS).
Conformal doping via plasma activated atomic layer deposition and conformal film deposition
ActiveUS8956983B2Liquid surface applicatorsSemiconductor/solid-state device manufacturingDopantPatterned substrate
Disclosed herein are methods of doping a patterned substrate in a reaction chamber. The methods may include forming a first conformal film layer which has a dopant source including a dopant, and driving some of the dopant into the substrate to form a conformal doping profile. In some embodiments, forming the first film layer may include introducing a dopant precursor into the reaction chamber, adsorbing the dopant precursor under conditions whereby it forms an adsorption-limited layer, and reacting the adsorbed dopant precursor to form the dopant source. Also disclosed herein are apparatuses for doping a substrate which may include a reaction chamber, a gas inlet, and a controller having machine readable code including instructions for operating the gas inlet to introduce dopant precursor into the reaction chamber so that it is adsorbed, and instructions for reacting the adsorbed dopant precursor to form a film layer containing a dopant source.
Owner:NOVELLUS SYSTEMS
Method for treating SiOCH film with hydrogen plasma
ActiveUS9029272B1Avoid crackingAvoid disconnectionSemiconductor/solid-state device manufacturingPhysical chemistryThin membrane
Owner:ASM IP HLDG BV
Method of depositing film with tailored comformality
ActiveUS8470187B2Easy to controlAvoid damageDecorative surface effectsPretreated surfacesEngineeringPatterned substrate
A method of depositing a film with a target conformality on a patterned substrate, includes: depositing a first film on a convex pattern and a bottom surface; and depositing a second film on the first film, thereby forming an integrated film having a target conformality, wherein one of the first and second films is a conformal film which is non-flowable when being deposited and has a conformality of about 80% to about 100%, and the other of the first and second films is a flowable film which is flowable when being deposited.
Owner:ASM JAPAN
Conformal doping via plasma activated atomic layer deposition and conformal film deposition
ActiveUS20130040447A1Liquid surface applicatorsSemiconductor/solid-state device manufacturingDopantPatterned substrate
Disclosed herein are methods of doping a patterned substrate in a reaction chamber. The methods may include forming a first conformal film layer which has a dopant source including a dopant, and driving some of the dopant into the substrate to form a conformal doping profile. In some embodiments, forming the first film layer may include introducing a dopant precursor into the reaction chamber, adsorbing the dopant precursor under conditions whereby it forms an adsorption-limited layer, and reacting the adsorbed dopant precursor to form the dopant source. Also disclosed herein are apparatuses for doping a substrate which may include a reaction chamber, a gas inlet, and a controller having machine readable code including instructions for operating the gas inlet to introduce dopant precursor into the reaction chamber so that it is adsorbed, and instructions for reacting the adsorbed dopant precursor to form a film layer containing a dopant source.
Owner:NOVELLUS SYSTEMS
Post-planarization densification
InactiveUS20110081782A1High densityReduce Pattern Loading EffectSemiconductor/solid-state device manufacturingChemical vapor deposition coatingHigh densitySilicon oxide
Processes for forming high density gap-filling silicon oxide on a patterned substrate are described. The processes increase the density of gap-filling silicon oxide particularly in narrow trenches. The density may also be increased in wide trenches and recessed open areas. The densities of the gap-filling silicon oxide in the narrow and wide trenches / open areas become more similar following the treatment which allows the etch rates to match more closely. This effect may also be described as a reduction in the pattern loading effect. The process involves forming then planarizing silicon oxide. Planarization exposes a new dielectric interface disposed closer to the narrow trenches. The newly exposed interface facilitates a densification treatment by annealing and / or exposing the planarized surface to a plasma.
Owner:APPLIED MATERIALS INC
Use of pulsed-DC wafer bias for filling vias/trenches with metal in HDP physical vapor deposition
InactiveUS6051114AControl depositionPrevent openingCellsElectric discharge tubesCapacitanceIon current
The present invention provides a method and apparatus for preferential PVD conductor fill in an integrated circuit structure. The present invention utilizes a high density plasma for sputter deposition of a conductive layer on a patterned substrate, and a pulsed DC power source capacitively coupled to the substrate to generate an ion current at the surface of the substrate. The ion current prevents sticking of the deposited material to the field areas of the patterned substrate, or etches deposited material from the field areas to eliminate crowning or cusping problems associated with deposition of a conductive material in a trench, hole or via formed on the substrate.
Owner:APPLIED MATERIALS INC
Radiation-assisted selective deposition of metal-containing cap layers
InactiveUS20100210108A1Semiconductor/solid-state device manufacturingChemical vapor deposition coatingDevice materialSelective deposition
A method for integrating metal-containing cap layers into copper (Cu) metallization of semiconductor devices to improve electromigration and stress migration in bulk Cu metal. In one embodiment, the method includes providing a patterned substrate containing Cu metal surfaces and dielectric layer surfaces, exposing the patterned substrate to a process gas comprising a metal-containing precursor, and irradiating the patterned substrate with electromagnetic radiation, where selective metal-containing cap layer formation on the Cu metal surfaces is facilitated by the electromagnetic radiation. In some embodiments, the method further includes pre-treating the patterned substrate with additional electromagnetic radiation and optionally a cleaning gas prior to forming the metal-containing cap layer.
Owner:TOKYO ELECTRON LTD
Structured material substrates for flexible, stretchable electronics
ActiveUS20100330338A1Reduce strainCircuit bendability/stretchabilityLayered productsStretchable electronicsPatterned substrate
A flexible and stretchable patterned substrate is provided having a strain-permitting material comprising a patterned conformation that allows the flexible patterned substrate to experience local strain or local strain domains lower than the macroscopic strain of the flexible and stretchable patterned substrate.
Owner:INFINITE CORRIDOR TECH
Method and system for post-etch treatment of patterned substrate features
ActiveUS20120258600A1Decorative surface effectsSemiconductor/solid-state device manufacturingPatterned substratePhysics
Owner:VARIAN SEMICON EQUIP ASSOC INC
Selective deposition of metal-containing cap layers for semiconductor devices
ActiveUS20100248473A1Improve electromigrationImprove stress migrationSemiconductor/solid-state device manufacturingDevice materialSelective deposition
A method for integrating metal-containing cap layers into copper (Cu) metallization of semiconductor devices. In one embodiment, the method includes providing a patterned substrate containing metal surfaces and dielectric layer surfaces, and modifying the dielectric layer surfaces by exposure to a reactant gas containing a hydrophobic functional group, where the modifying substitutes a hydrophilic functional group in the dielectric layer surfaces with a hydrophobic functional group. The method further includes depositing metal-containing cap layers selectively on the metal surfaces by exposing the modified dielectric layer surfaces and the metal surfaces to a deposition gas containing metal-containing precursor vapor.
Owner:TOKYO ELECTRON LTD
Silicon oxide recess etch
ActiveUS8748322B1Electric discharge tubesSemiconductor/solid-state device manufacturingSilicon oxidePatterned substrate
A method of etching silicon oxide from a trench is described which allows more homogeneous etch rates across a varying pattern on a patterned substrate. The method also provides a more rectilinear profile following the etch process. Methods include a sequential exposure of gapfill silicon oxide. The gapfill silicon oxide is exposed to a local plasma treatment prior to a remote-plasma dry etch which may produce salt by-product on the surface. The local plasma treatment has been found to condition the gapfill silicon oxide such that the etch process proceeds at a more even rate within each trench and across multiple trenches. The salt by-product may be removed by raising the temperature in a subsequent sublimation step.
Owner:APPLIED MATERIALS INC
Epitaxial deposition of doped semiconductor materials
ActiveUS7863163B2Polycrystalline material growthSemiconductor/solid-state device manufacturingSemiconductor materialsSingle crystal
Owner:ASM IP HLDG BV
Density multiplication and improved lithography by directed block copolymer assembly
ActiveUS20090196488A1High densityQuality improvementMaterial nanotechnologyPatterned record carriersHigh densityPeriodic nanostructures
Methods to pattern substrates with dense periodic nanostructures that combine top-down lithographic tools and self-assembling block copolymer materials are provided. According to various embodiments, the methods involve chemically patterning a substrate, depositing a block copolymer film on the chemically patterned imaging layer, and allowing the block copolymer to self-assemble in the presence of the chemically patterned substrate, thereby producing a pattern in the block copolymer film that is improved over the substrate pattern in terms feature size, shape, and uniformity, as well as regular spacing between arrays of features and between the features within each array compared to the substrate pattern. In certain embodiments, the density and total number of pattern features in the block copolymer film is also increased. High density and quality nanoimprint templates and other nanopatterned structures are also provided.
Owner:WISCONSIN ALUMNI RES FOUND +1
Orientation-controlled self-assembled nanolithography using a block copolymer
InactiveUS20080311402A1Material nanotechnologyRadiation applicationsNanolithographyPatterned substrate
Disclosed is a structure made of a trench patterned substrate having a pre-determined trench period and a pre-determined mesa to trench width ratio, and a block copolymer on top of the trench patterned substrate. The block copolymer has at least an organic block and a silicon-containing block, wherein the block copolymer can have either perpendicular or parallel cylinders. The structure is annealed under a pre-determined vapor pressure for a predetermined annealing time period, wherein the pre-determined trench period, the pre-determined mesa to trench width ratio, the predetermined vapor pressure and the predetermined annealing time period are chosen such that cylinders formed in the block copolymer are either perpendicular or parallel with respect to the trench-patterned substrate. A method is also described to form the above-mentioned structure.
Owner:MASSACHUSETTS INST OF TECH
Directed assembly of triblock copolymers
Methods of directed self-assembly of multi-block (i.e., triblock and higher-order) copolymers on patterned substrates and related compositions are provided. According to various embodiments, the methods involve depositing copolymer materials on substrates configured to drive the assembly of micro-phase separated films that exhibit the same morphology as that copolymer materials in the bulk. In certain embodiments, binary patterns are used to drive the triblock copolymer films. The binary two-dimensional surface patterns are transformed into three-component and three-dimensional structures throughout the thickness of the overlying copolymer films.
Owner:WISCONSIN ALUMNI RES FOUND
Method of forming a group iii-nitride crystalline film on a patterned substrate by hydride vapor phase epitaxy (HVPE)
ActiveUS20110012109A1Quality improvementSemiconductor/solid-state device manufacturingChemical vapor deposition coatingCrystal orientationPatterned substrate
A method of depositing a high quality low defect single crystalline Group III-Nitride film. A patterned substrate having a plurality of features with inclined sidewalls separated by spaces is provided. A Group III-Nitride film is deposited by a hydride vapor phase epitaxy (HVPE) process over the patterned substrate. The HVPE deposition process forms a Group III-Nitride film having a first crystal orientation in the spaces between features and a second different crystal orientation on the inclined sidewalls. The first crystal orientation in the spaces subsequently overgrows the second crystal orientation on the sidewalls and in the process turns over and terminates treading dislocations formed in the first crystal orientation.
Owner:APPLIED MATERIALS INC
(Al,In,Ga,B)N DEVICE STRUCTURES ON A PATTERNED SUBSTRATE
ActiveUS20090072262A1High luminous output powerLight emission efficiencySemiconductor/solid-state device manufacturingSemiconductor devicesQuantum wellPatterned substrate
A nitride light emitting diode, on a patterned substrate, comprising a nitride interlayer having at least two periods of alternating layers of InxGa1-xN and InyGa1-yN where 0<x<1 and 0≦y<1, and a nitride based active region having at least one quantum well structure on the nitride interlayer.
Owner:RGT UNIV OF CALIFORNIA
Ordered vertically oriented porous inorganic films produced through solution processing
InactiveUS20060278158A1Easy to produceFrom gel statePhotosensitive materialsPatterned substrateSelf-assembly
Porous films with straight pores oriented normal to the plane of the films are produced through solution processing techniques. The production takes advantage of inorganic-surfactant or inorganic-polymer co-assembly and a patterned substrate. The patterned substrate, which is also produced via solution phase self-assembly, forces vertical orientation in a hexagonal cylinder system with no practical limits in substrate size or type. This provides a route to vertically oriented inorganic pores with a pitch ranging from 3 nm to over 15 nm and pore sizes ranging from 2 nm to over 12 nm. The size is tuned by choice the choice of organic templating agents and the deposition conditions. The pores can be produced with or without a capping layer which can be used to seal the nanopores.
Owner:RGT UNIV OF CALIFORNIA
Single or multi-color high efficiency light emitting diode (LED) by growth over a patterned substrate
InactiveUS20060202226A1Improve extraction efficiencyEmission controlSolid-state devicesRadiation controlled devicesMetallic materialsRefractive index
A single or multi-color light emitting diode (LED) with high extraction efficiency is comprised of a substrate, a buffer layer formed on the substrate, one or more patterned layers deposited on top of the buffer layer, and one or more active layers formed on or between the patterned layers, for example by Lateral Epitaxial Overgrowth (LEO), and including one or more light emitting species, such as quantum wells. The patterned layers include a patterned, perforated or pierced mask made of insulating, semiconducting or metallic material, and materials filling holes in the mask. The patterned layer acts as an optical confining layer due to a contrast of a refractive index with the active layer and / or as a buried diffraction grating due to variation of a refractive index between the mask and the material filling the holes in the mask.
Owner:RGT UNIV OF CALIFORNIA
Structured material substrates for flexible, stretchable electronics
ActiveUS8883287B2Circuit bendability/stretchabilityLayered productsStretchable electronicsPatterned substrate
A flexible and stretchable patterned substrate is provided having a strain-permitting material comprising a patterned conformation that allows the flexible patterned substrate to experience local strain or local strain domains lower than the macroscopic strain of the flexible and stretchable patterned substrate.
Owner:INFINITE CORRIDOR TECH
Surface cleaning and selective deposition of metal-containing cap layers for semiconductor devices
ActiveUS20110244680A1Improve electromigrationImprove stress migrationSemiconductor/solid-state device manufacturingSurface cleaningSelective deposition
A method is provided for integrating metal-containing cap layers into copper (Cu) metallization of semiconductor devices. In one embodiment, the method includes providing a planarized patterned substrate containing metal surfaces and dielectric layer surfaces with a residue formed thereon, removing the residue from the planarized patterned substrate, and depositing metal-containing cap layers selectively on the metal surfaces by exposing the dielectric layer surfaces and the metal surfaces to a deposition gas containing metal-containing precursor vapor. The removing includes treating the planarized patterned substrate containing the residue with a reactant gas containing a hydrophobic functional group, and exposing the treated planarized patterned substrate to a reducing gas.
Owner:TOKYO ELECTRON LTD
A method for forming a ruthenium metal layer on a patterned substrate
ActiveUS20060211228A1Semiconductor/solid-state device detailsSolid-state devicesThermal chemical vapor depositionRuthenium
A method for forming a ruthenium metal layer includes providing a patterned substrate in a process chamber of a deposition system, where the patterned substrate contains one or more vias or trenches, or combinations thereof, depositing a first ruthenium metal layer on the substrate in an atomic layer deposition process, and depositing a second ruthenium metal layer on the first ruthenium metal layer in a thermal chemical vapor deposition process. The deposited ruthenium metal layer can be used as a diffusion barrier layer, a seed layer for electroplating, or both.
Owner:TOKYO ELECTRON LTD
Method of manufacturing patterned subtrate for culturing cells, patterned subtrate for culturing cells, patterning method of culturing cells, and patterned cell chip
InactiveUS20110053800A1Preparing sample for investigationPretreated surfacesCulture cellPatterned substrate
The present invention relates to a method of manufacturing a patterned substrate for culturing cells, comprising the steps of: (1) preparing a substrate; (2) forming a first plasma polymer layer by integrating a first precursor material using a plasma on the substrate; (3) placing a shadow mask having a predetermined pattern on the first plasma polymer layer; and (4) forming a second patterned plasma polymer layer by integrating a second precursor material using a plasma.
Owner:SUNGKYUNKWAN UNIVERSITY
Method of moulding
InactiveUS20140036428A1Cost-effective manufacturingMinimize cracksCircuit arrangements on support structuresLaminationEngineeringPatterned substrate
A method comprising: patterning one or more electrical layers on a substrate; shaping the patterned substrate into a 3-dimensional contour, wherein the contour including a significant change in gradient in or adjacent to one or more sensing areas of the electrical layer, and over-moulding the shaped substrate, wherein degradation of a trace in the electrical layer at or adjacent to the one or more sensing areas during shaping and / or over-moulding is substantially minimised based on the width of the trace, the thickness or number of layers of the trace, the bending radius of the trace, the material of the trace, and / or a primer over layer on the trace.
Owner:FISCHER TECH
Method for depositing titanium nitride films for semiconductor manufacturing
ActiveUS7776733B2Semiconductor/solid-state device manufacturingChemical vapor deposition coatingSurface reactionHigh volume manufacturing
Embodiments of the invention describe TiN deposition methods suitable for high volume manufacturing of semiconductor devices on large patterned substrates (wafers). One embodiment describes a chemical vapor deposition (CVD) process using high gas flow rate of a tetrakis(ethylmethylamino) titanium (TEMAT) precursor vapor along with an inert carrier gas at a low process chamber pressure that provides high deposition rate of conformal TiN films with good step coverage in surface reaction limited regime. Other embodiments describe cyclical TiN deposition methods using TEMAT precursor vapor and a nitrogen precursor.
Owner:TOKYO ELECTRON LTD
Patterned substrate with hydrophilic/hydrophobic contrast, and method of use
InactiveUS7112617B2Simple methodSuitable receptionMicrobiological testing/measurementLayered productsGas phaseUltraviolet lights
A gas phase species (such as ozone, H2O2, or N2O) is photodissociated with ultraviolet light into a reactive species that is patternwise directed (e.g., through a mask) onto a surface of a material, such as an organosilicate. The reactive species reacts with the material to form a polar oxidation product such as —OH, thereby resulting in discrete hydrophilic regions separated from each other by hydrophobic regions. The degree of hydrophilicity of the discrete regions may be tailored by controlling the concentration of the reactive species, the ultraviolet light intensity, the temperature to which the material is heated, and exposure time. End products made with the methods are suitable for use in a biomolecular array.
Owner:GLOBALFOUNDRIES INC
Horizontal emitting, vertical emitting, beam shaped, distributed feedback (DFB) lasers fabricated by growth over a patterned substrate with multiple overgrowth
InactiveUS20070125995A1Improve propertiesEffective limitOptical wave guidanceLaser optical resonator constructionDistributed feedback laserGrating
A structure using integrated optical elements is comprised of a substrate, a buffer layer grown on the substrate, one or more first patterned layers deposited on top of the buffer layer, wherein each of the first patterned layers is comprised of a bottom lateral epitaxial overgrowth (LEO) mask layer and a LEO nitride layer filling holes in the bottom LEO mask layer, one or more active layers formed on the first patterned layers, and one or more second patterned layers deposited on top of the active layer, wherein each of the second patterned layers is comprised of a top LEO mask layer and a LEO nitride layer filling holes in the top LEO mask layer, wherein the top and / or bottom LEO mask layers act as a mirror, optical confinement layer, grating, wavelength selective element, beam shaping element or beam directing element for the active layers.
Owner:RGT UNIV OF CALIFORNIA
Method for integrating selective low-temperature ruthenium deposition into copper metallization of a semiconductor device
InactiveUS20090186481A1Improve electromigrationImprove stress migrationSemiconductor/solid-state device detailsSolid-state devicesDevice materialRuthenium
A method for integrating low-temperature selective Ru metal deposition into manufacturing of semiconductor devices to improve electromigration and stress migration in bulk Cu metal. The method includes providing a patterned substrate containing a recessed feature in a dielectric layer, where the recessed feature is at least substantially filled with planarized bulk Cu metal, heat-treating the bulk Cu metal and the dielectric layer in the presence of H2, N2, or NH3, or a combination thereof, and selectively depositing a Ru metal film on the heat-treated planarized bulk Cu metal.
Owner:TOKYO ELECTRON LTD
Fabrication of complex three-dimensional structures based on directed assembly of self-assembling materials on activated two-dimensional templates
Methods of fabricating complex three-dimensional structures on patterned substrates and related compositions are provided. The methods involve depositing on the substrate a block copolymer material that is “mismatched” to the substrate pattern, and then ordering the material to form a complex three-dimensional structure. According to various embodiments, the copolymer material mismatches the substrate pattern in that the symmetry and / or length scale of its bulk morphology differs from that of the pattern. When ordered, a balance between the physics that determines the bulk block copolymer morphology and the physics that determines the substrate surface interfacial interactions results in a thermodynamically stable complex three-dimensional film that varies in a direction perpendicular to the substrate and has a morphology that differs from its bulk morphology.
Owner:WISCONSIN ALUMNI RES FOUND
Method of moulding
InactiveUS8912447B2Electronic interface can be more attractive and/or user friendlyCost-effective manufacturingLine/current collector detailsCircuit arrangements on support structuresEngineeringPatterned substrate
A method includes patterning one or more electrical layers on a substrate; shaping the patterned substrate into a 3-dimensional contour, wherein the contour including a significant change in gradient in or adjacent to one or more sensing areas of the electrical layer, and over-molding the shaped substrate. Degradation of a trace in the electrical layer at or adjacent to the one or more sensing areas during shaping and / or over-molding is substantially minimized based on the width of the trace, the thickness or number of layers of the trace, the bending radius of the trace, the material of the trace, and / or a primer over layer on the trace.
Owner:FISCHER TECH
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