1176results about "Radiation controlled devices" patented technology

A pixel array includes photodiodes and a color filter array. A first fraction of the photodiodes is included in CIS pixels and a second fraction of the photodiodes is included in hybrid CIS / EVS pixels. The photodiodes are arranged into groupings. The color filter array includes first, second, and third color filters arranged in a mosaic pattern over the photodiodes. Each grouping includes a plurality of subgroupings including a first subgrouping disposed under at least one of the first color filters, a second subgrouping disposed under at least one of the second color filters, and a third subgrouping disposed under at least one of the third color filters. Each of the first, second, and third subgroupings includes at least one CIS pixel, and at least one of the first subgrouping of photodiodes further includes at least one hybrid CIS / EVS pixel disposed under at least one of the first color filters.

A pixel circuit includes a pixel array and a color filter. The pixel array includes a plurality of pixels each comprising two photodiodes, a floating diffusion coupled between the two photodiodes, and two transfer transistor coupled between the two photodiodes and the floating diffusion. The color filter array includes a plurality of color filters each having one of a plurality of colors and disposed over at least one of the pixels. Each pixel is coupled to a first readout circuit. The pixels include a second subset of the pixels coupled to a second readout circuit and a first subset of the pixels not coupled to the second readout circuit. Each pair of pixels arranged in two adjacent rows includes a first pixel included in the second subset of the pixels and a second pixel included in the first subset of the pixels and disposed underneath one of the color filters.

Disclosed herein is a single photon avalanche diode (SPAD) pixel circuit, including a SPAD having an anode coupled to a negative voltage and a cathode and a cascode transistor having a drain coupled to the cathode of the SPAD, a gate controlled by a cascode control signal, and a source. A readout circuit is coupled to the source of the cascode transistor and configured to detect a voltage change at the source of the cascode transistor and generate a pulse indicating an occurrence of an avalanche event. An active quenching circuit is coupled to the cathode of the SPAD and configured to detect an onset of the avalanche event and pull the cathode of the SPAD to a negative voltage to quench the avalanche event.

A subpixel including at least one second-conductivity-type pinned photodiode layer that forms a p-n junction with a substrate semiconductor layer, at least one floating diffusion region, and at least one transfer gate stack structure. The at least one transfer gate stack structure may at least partially laterally surround the at least one second-conductivity-type pinned photodiode layer with a total azimuthal extension angle in a range from 240 degrees to 360 degrees around a geometrical center of the second-conductivity-type pinned photodiode layer. The at least one transfer gate stack structure may include multiple edges that overlie different segments of a periphery of the at least one second-conductivity-type pinned photodiode layer, and the floating diffusion region includes a portion located between the first edge and the second edge. In addition, multiple transfer gate stack structures and multiple floating diffusion regions may be present in the subpixel.

A control circuitry region of a pixel sensor of a semiconductor device includes a plurality of conversion gain circuits that may be selectively activated and / or deactivated in various combinations to enable a plurality of sequential conversion gain operations to be performed across an exposure operation of the semiconductor device. The control circuitry region may include a first conversion gain circuit and a second conversion gain circuit that are connected to a floating diffusion node of the pixel sensor in parallel. The selectable parallel conversion gain circuits enable sequential conversion gain operations to be performed for the pixel sensor such that the capacitance in the pixel sensor may be gradually increased through the conversion gain operations. Gradually increasing the capacitance in the pixel sensor across the sequential conversion gain operations provides for smaller signal-to-noise ratio (SNR) drops, which enables a low SNR drop to be achieved for the pixel sensor.

A system and method of instantaneously acquiring a spatio-spectral cube image from a sample material, using a perturbative mosaic array element, configured in correspondence with a photo-detecting pixel array sensor.

A semiconductor structure includes: an epitaxial layer; photo-detecting portions disposed in the epitaxial layer and spaced apart from each other, each of the photo-detecting portions including a p-n junction; and trench isolations disposed in the epitaxial layer, each of the trench isolations being disposed to separate two adjacent ones of the photo-detecting portions from each other. Each of the trench isolations includes a first dielectric layer having a first refractive index and a first thickness, and a second dielectric layer having a second refractive index that is different from the first refractive index, and a second thickness that is different from the first thickness. The first dielectric layer and the second dielectric layer are arranged to prevent a light incident to one of the photo-detecting portions from entering an adjacent one of the photo-detecting portions.

A method of fabricating an IR transparent window wafer with integrated AR grating structures includes providing a handle wafer having a first surface and a second surface opposite the first surface, providing a device wafer including a single crystal silicon layer disposed on an oxide layer, the single crystal silicon layer having a planar side and the oxide layer having a bonding side that is opposite the planar side, forming AR grating structures in a first portion of the first surface of the handle wafer, bonding the bonding side of the oxide layer to the first surface of the handle wafer, and etching a recess in the planar side of the single crystal silicon layer to: remove the buried oxide layer, form a plurality of recess walls, and expose the AR grating structures in the first portion of the first surface of the handle wafer.

An image sensor comprising a photodiode, an inter-layer dielectric layer, and a deep trench isolation structure is described. The photodiode is disposed within a semiconductor substrate having a front side and a backside opposite the front side. The inter-layer dielectric layer is disposed over the front side of the semiconductor substrate such that the front side is disposed between the inter-layer dielectric layer and the backside. The deep trench isolation structure is configured to isolate the photodiode from adjacent photodiodes included in the image sensor. The deep trench isolation structure includes a trench disposed within the inter-layer dielectric layer and the semiconductor substrate and a fill material disposed within the trench. The trench extends through the inter-layer dielectric layer and the front side of the semiconductor substrate towards the backside of the semiconductor substrate.

An image sensor with one or more imaging sensor layers and / or one or more color filter layers is provided. Imaging sensor layers sense different combinations of wavelengths of light depending in part on filtered light passing through the color filter layers. The color filter layers, which can be tunable filters, plasmonic color filters or dielectric subwavelength grating filters, allow certain colors of light to pass through to the imaging sensor layers and block others. The image sensor is connected to control circuitry that measures the properties of light received at each imaging sensor layer, reconstructs the color components of each pixel of the imaging sensor layers based on these measurements, and generates full-color image data from the color components. Methods of manufacturing the image sensor are also provided using lithography and securing the layers in a sensor stack using a bonding substrate.

An image sensor structure including a substrate, a pixel structure, and a deep trench isolation (DTI) structure is provided. The substrate includes a first side and a second side opposite to each other. The pixel structure includes a transfer transistor, a light sensing device, and a floating diffusion region. The transfer transistor includes a first gate. The first gate is disposed on the first side of the substrate. The light sensing device is disposed in the substrate and is located on one side of the first gate. The floating diffusion region is disposed in the substrate and is located on another side of the first gate. The DTI structure extends into the substrate from the second side of the substrate. The top-view pattern of the floating diffusion region does not overlap the top-view pattern of the DTI structure.

An image sensor with one or more imaging sensor layers and / or one or more color filter layers is provided. Imaging sensor layers sense different combinations of wavelengths of light depending in part on filtered light passing through the color filter layers. The color filter layers, which can be tunable filters, plasmonic color filters or dielectric subwavelength grating filters, allow certain colors of light to pass through to the imaging sensor layers and block others. The image sensor is connected to control circuitry that measures the properties of light received at each imaging sensor layer, reconstructs the color components of each pixel of the imaging sensor layers based on these measurements, and generates full-color image data from the color components. Methods of manufacturing the image sensor are also provided using lithography and securing the layers in a sensor stack using a bonding substrate.

In a case where a photodiode is in a saturated state, the photodiode can be transited from the saturated state to an unsaturated state during a period when a knee pulse is supplied from a knee pulse supplying unit. The knee pulse supplying unit preferably supplies the knee pulse a plurality of times during one frame period.

An image sensor comprises: an active pixel sensor region outputting a pixel signal for generating an image; and a periphery region surrounding the active pixel sensor region, where the active pixel sensor region and the periphery region each include a sensor layer that includes a plurality of pixels and extends through the active pixel sensor region and the periphery region, where the active pixel sensor region comprises (i) a meta-photonic structure facing the sensor layer, and (ii) a dielectric layer, the meta-photonic structure comprising a plurality of nano-structures arranged to have a meta pattern with the dielectric layer filled among the plurality of nano-structures, and where the periphery portion comprises (i) the dielectric layer integrally extending from the active pixel sensor region and (ii) a crack stopper having a groove shape formed within the dielectric layer.

An optical sensor and included pixel circuits of an array of pixel circuits are described. Each pixel circuit may include a microlens, a color filter disposed adjacent the microlens, and an epitaxial substrate layer disposed adjacent the color filter opposite the microlens. An isolation trench may be formed in the epitaxial substrate layer to provide a trench capacitor for the pixel circuit, and having sidewalls with sidewall recesses formed therein that increase a surface area, and therefore a capacitance, of the trench capacitor.

To provide an image pickup device capable of suppressing quality degradation of a pixel signal.SOLUTION: The image pickup device comprises: a first photoelectric conversion part for generating electric charge by photoelectric conversion of light and a shading part which shades a portion of light incident into the first photoelectric conversion part; a second photoelectric conversion part for generating electric charge by photoelectric conversion of light; an accumulation part for accumulating at least one of the electric charge generated by the first photoelectric conversion part and the electric charge generated by the second photoelectric conversion part; a supply part which supplies a predetermined voltage: a first connection part capable of connecting the accumulation part with the supply part; and a second connection part capable of connecting the first photoelectric conversion part with the supply part.SELECTED DRAWING: Figure 3

To provide a semiconductor device which is easily manufactured and has a structure excellent in reliability.SOLUTION: A semiconductor device includes a structure in which a plurality of semiconductor layers including first and second semiconductor layers and an insulation structure alternately insulating the plurality of semiconductor layers are laminated. The insulation structure includes a first insulation layer arranged between the first semiconductor layer and the second semiconductor layer. The semiconductor device includes: a conductive penetration vias penetrating the second semiconductor layer; a wiring pattern arranged in the first insulation layer; and a conductive connection member arranged in the first insulation layer so as to electrically connect the penetration via and the wiring pattern.SELECTED DRAWING: Figure 7

Advanced processing is performed in a chip. A stacked light-receiving sensor according to an embodiment includes a first substrate (100, 200, 300), a second substrate (120, 320) bonded to the first substrate, and connection wiring (402) bonded to the second substrate. The first substrate includes a pixel array (101) in which a plurality of unit pixels are arranged in a two-dimensional matrix. The second substrate includes a converter (17A) configured to convert an analog pixel signal output from the pixel array to digital image data and a processing unit (14) configured to perform a process for data based on the image data. At least a part of the converter is disposed on a first side in the second substrate. The processing unit is disposed on a second side opposite to the first side in the second substrate. The connection wiring is attached to a side other than the second side in the second substrate.

This X-ray detector which detects an X-ray and generates a corresponding output signal comprises: a TFT array including a plurality of pixel TFT circuits each generating the output signal according to the intensity of the detected X-ray; a gate circuit configured to apply, to the TFT array, a gate signal for driving the plurality of pixel TFT circuits; and a readout circuit configured to receive the output signal generated by each of the plurality of pixel TFT circuits and transmit the output signal to the outside. The gate circuit comprises: a gate chip-on film configured to generate the gate signal and apply the gate signal to the TFT array; and a gate connection FPCB circuitly connected to the gate chip-on film so as to receive a driving signal for generating the gate signal and transmit the driving signal to the gate chip-on film. The gate chip-on film and the gate connection FPCB are respectively arranged along different sides of the X-ray detector.

The image sensor includes a photoelectric conversion layer, a color filter layer disposed on the photoelectric conversion layer, a buffer layer disposed on the color filter layer, a meta layer, and an anti-reflective layer coated on the meta layer. The meta layer includes a lining layer on the buffer layer and a plurality of top nano-structures protruded from the lining layer in a direction away from the photoelectric conversion layer. The anti-reflective layer includes a first portion on a top surface of a first nano-structure of the top nano-structures and a second portion on a sidewall of the first nano-structure, and a height of the first portion is greater than a width of the second portion.

A semiconductor device may include a plurality of single-photon avalanche diode (SPAD) pixels. The semiconductor device may be a backside device that includes a sensor wafer stacked with an integrated passive component (IPC) wafer. The sensor wafer may include the SPAD pixels in an array across the sensor wafer. The IPC wafer may include active microcells that include quench resistors and dummy microcells that omit or disconnect the quench resistors. The sensor wafer may be bonded to the IPC wafer through hybrid bonding. The regions with active microcells may form active areas of the semiconductor device, while the regions with dummy microcells may form inactive areas. In this way, the active areas and inactive areas of the semiconductor device may be configurable by adjusting the active and dummy microcells of the IPC wafer.

Various embodiments of the present disclosure are directed towards a semiconductor device including a plurality of photodetectors disposed within a substrate, where the substrate has a front-side opposite a back-side. The semiconductor device includes a floating diffusion node disposed in the substrate, where the photodetectors are disposed around the floating diffusion node. A trench isolation structure is disposed within the substrate and laterally surrounds the photodetectors. The trench isolation structure includes a first isolation structure disposed in the substrate and having a first depth, where the first isolation structure is disposed between adjacent photodetectors and is laterally offset from the floating diffusion node. The trench isolation structure includes a second isolation structure extending from the back-side of the substrate towards the floating diffusion node, where the second isolation structure directly overlies the floating diffusion node and has a second depth less than the first depth.

An image sensor includes a sensing unit. The sensing unit includes a plurality of pixels. Each of the plurality of pixels includes at least one photodiode, at least one first transistor and a first source follower transistor. The sensing unit further includes a plurality of second transistors and a second source follower transistor. In each of the plurality of pixels, the at least one photodiode is electrically connected to the first source follower transistor at least through the at least one first transistor, and electrically connected to the second source follower transistor at least through at least one corresponding second transistor among the plurality of second transistors.

Disclosed herein are approaches for forming nanopillars of an image sensor. One method of forming an image sensor may include forming an etch stop layer atop a spacer layer, wherein the spacer layer is formed over a color filter, and forming a first optical material layer over the etch stop layer. The method may further include forming a plurality of pillars from the optical material layer, forming an opening through a first pillar of the plurality of pillars, the opening exposing the etch stop layer, and removing the etch stop layer by performing a wet etch through the opening, wherein the wet etch forms a cavity beneath the plurality of pillars. The method may further include forming a second optical material layer within the cavity.

Provided are an image sensor including an oblique light compensation layer, and an electronic apparatus including the image sensor. The image sensor may include a sensor substrate including a plurality of photosensing cells, each of the plurality of photosensing cells being configured to sense a light; a color separation nanostructure layer provided on the sensor substrate; a spacer layer provided on the color separation nanostructure layer; and an oblique light compensation layer provided on the spacer layer.

An image sensor includes a substrate, a first floating diffusion region and a second floating diffusion region in the substrate and spaced apart from each other, a ground region in the substrate and spaced apart from the first floating diffusion region and the second floating diffusion region, a first interconnection line on the substrate and connecting the first floating diffusion region and the second floating diffusion region, and a second interconnection line on the substrate and connected to the ground region, where the first interconnection line is at a first level and the second interconnection line is at a second level that is different from the first level.

A photodetector includes a first base, a second base, and a light blocker. The first base includes a first semiconductor substrate in which a first photoelectric conversion element is disposed. The first photoelectric conversion element converts entering light into electric charge. The second base is disposed on an opposite side of the first base to a light entering side and includes a second semiconductor substrate in which a second photoelectric conversion element is disposed. The second photoelectric conversion element converts entering light into electric charge. The light blocker is disposed, as viewed from the light entering side, along and around a side surface of the second photoelectric conversion element. The light blocker extends from a surface of the second base on the light entering side through at least the second semiconductor substrate in a thickness direction. The light blocker blocks light from the second photoelectric conversion element.

To realize both of an AF performance improvement and a layout efficiency improvement.SOLUTION: A photoelectric conversion device includes a plurality of pixels to be arranged in an array shape, and each of the plurality of pixels includes a plurality of photoelectric conversion parts sharing a microlens. The plurality of photoelectric conversion parts of a first pixel from the plurality of pixels are separated each other in a first direction, and the plurality of photoelectric conversion parts of a second pixel of the plurality of pixels is separated each other in a second direction that is different from the first direction. A floating diffusion region is arranged to rows or columns of the photoelectric conversion parts contained into the plurality of pixels, and a well contact is arranged to the other of the row or the column of the photoelectric conversion parts to be contained to the plurality of pixels is arranged.SELECTED DRAWING: Figure 6

The disclosure provides a structure with a doped well between a photodetector and an optical interface of a semiconductor layer. A structure of the disclosure includes a semiconductor layer having a first surface configured for optically interfacing with incident radiation, and a second surface opposite the first surface. A photodetector is within the semiconductor layer and on the second surface thereof. A doped well is within the semiconductor layer between the photodetector and the first surface. The doped well has a same conductivity type as the semiconductor layer and a higher dopant concentration than the semiconductor layer.

To provide a solid-state imaging element device with improved structural accuracy and a method for manufacturing the same.SOLUTION: A solid-state imaging element package includes a transparent first substrate, a second substrate having a solid-state imaging element, a hardened material layer interposed between the first substrate and the second substrate and arranged to surround the solid-state imaging element, and a plurality of columnar structures embedded in the hardened material layer and defining a distance between the first substrate and the second substrate.SELECTED DRAWING: Figure 1