16205results about How to "Lower resistance" patented technology

To provide a semiconductor device in which a defect or fault is not generated and a manufacturing method thereof even if a ZnO semiconductor film is used and a ZnO film to which an n-type or p-type impurity is added is used for a source electrode and a drain electrode. The semiconductor device includes a gate insulating film formed by using a silicon oxide film or a silicon oxynitride film over a gate electrode, an Al film or an Al alloy film over the gate insulating film, a ZnO film to which an n-type or p-type impurity is added over the Al film or the Al alloy film, and a ZnO semiconductor film over the ZnO film to which an n-type or p-type impurity is added and the gate insulating film.

A thin film transistor has a semiconductor thin film including zinc oxide, a protection film formed on entirely the upper surface of the semiconductor thin film, a gate insulating film formed on the protection film, a gate electrode formed on the gate insulating film above the semiconductor thin film, and a source electrode and drain electrode formed under the semiconductor thin film so as to be electrically connected to the semiconductor thin film.

An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

A touch panel module in which a conductive film in which a mesh conductive layer composed of a mesh-like metal electrode is formed on a support, a λ / 4 plate, a polarizing plate, and a protective layer are arranged in this order. A λ / 4 plate is further arranged on a side of the conductive film opposite to the protective layer. The touch panel module has a visible light diffuse reflectivity of 2% or less, which is measured from the protective layer.

A multilayer printed circuit board (“PCB”) coil that simulates a coil formed from litz wire. The PCB includes a plurality of alternating conductor and insulating layers interconnected to cooperatively form the coil. Each conductor layer includes a trace that follows the desired coil shape and is divided into a plurality of discrete conductor segments. The segments are electrically connected across layers to provide a plurality of current flow paths (or filaments) that undulate between the layers in a regular, repeating pattern. The coil may be configured so that each filament spends a substantially equal amount of time in proximity to the paired coil and therefore contributes substantially equally to the self or mutual inductance of the coil. Each conductor layer may include a plurality of associated traces and intralayer connector that interconnected so that each filament undulates not only upwardly / downwardly, but also inwardly / outwardly in a regular, repeating pattern.

Floorboards with a format corresponding to a traditional parquet block for laying of mechanically joined floating flooring. Rectangular floorboards include a surface layer and a core with two long sides and two short sides, for making a floating flooring, which floorboards are mechanically lockable and which along their four sides have pairs of opposing connectors for locking similar, adjoining floorboards to each other both vertically and horizontally wherein the long sides have a length not exceeding 80 cm and the short sides have a width not exceeding 10 cm.

A wafer transfer blade including a body including metal oxide and configured to support a wafer, and an adsorbing part on the body, the adsorbing part having at least one therein and configured to apply vacuum pressure to attach the wafer on the body may be provided. The body may include metal oxide to prevent static electricity.

Methods for forming a diffusion barrier on low aspect features of an integrated circuit include at least three operations. The first operation deposits a barrier material and simultaneously etches a portion of an underlying metal at the bottoms of recessed features of the integrated circuit. The second operation deposits barrier material to provide some minimal coverage over the bottoms of the recessed features. The third operation deposits a metal conductive layer. Controlled etching is used to selectively remove barrier material from the bottom of the recessed features, either completely or partially, thus reducing the resistance of subsequently formed metal interconnects.

Devices and methods are provided for an implantable medical device which is degradable over a clinically relevant period of time. The medical devices may have the form of implants, graft implants, vascular implants, non vascular implants, wound closure implants, sutures, drug delivery implants, biologic delivery implants, urinary tract implants, inter-uterine implants, organ implants, bone implants including bone plates, bone screws, dental implants, spinal disks, or the like. In preferred embodiments, the implantable medical device comprises an implantable luminal prosthesis, such as vascular and non-vascular stents and stents grafts.

Floor panels ( 1, 1 ') are provided with a mechanical locking system including a flexible locking element 15 in a locking groove 14 which during a horizontal motion is displaced vertically.

A method of forming vertical spacers for spacer-defined multiple patterning, includes: depositing a first conformal pattern-transfer film having a first film stress, and continuously depositing a second conformal pattern-transfer film having a second film stress on a template; dry-etching the template except for a core material and a vertical portion of the first and second pattern-transfer films to form vertical spacers; and dry-etching the core material, forming a vacant space between the vertical spacers, wherein by adjusting the difference in film stress between the first and second pattern-transfer films, the leaning angle of the spacers is adjusted.

A lithium ion battery electrode includes silicon nanowires used for insertion of lithium ions and including a conductivity enhancement, the nanowires growth-rooted to the conductive substrate.

A memory structure, includes (a) active columns of polysilicon formed above a semiconductor substrate, each active column extending vertically from the substrate and including a first heavily doped region, a second heavily doped region, and one or more lightly doped regions each adjacent both the first and second heavily doped region, wherein the active columns are arranged in a two-dimensional array extending in second and third directions parallel to the planar surface of the semiconductor substrate; (b) charge-trapping material provided over one or more surfaces of each active column; and (c) conductors each extending lengthwise along the third direction. The active columns, the charge-trapping material and the conductors together form a plurality of thin film transistors, with each thin film transistor formed by one of the conductors, a portion of the lightly doped region of an active column, the charge-trapping material between the portion of the lightly doped region and the conductor, and the first and second heavily doped regions. The thin film transistors associated with each active column are organized into one or more vertical NOR strings.

A III-nitride switch includes a recessed gate contact to produce a nominally off, or an enhancement mode, device. By providing a recessed gate contact, a conduction channel formed at the interface of two III-nitride materials is interrupted when the gate electrode is inactive to prevent current flow in the device. The gate electrode can be a schottky contact or an insulated metal contact. Two gate electrodes can be provided to form a bi-directional switch with nominally off characteristics. The recesses formed with the gate electrode can have sloped sides. The gate electrodes can be formed in a number of geometries in conjunction with current carrying electrodes of the device.

A light fixture using LEDs includes a lower skin layer possessing heat transfer properties. A circuit board is affixed to the lower skin layer, and a single LED, or a plurality of LEDs, is electrically connected to the circuit board. The single LED, or plurality of LEDs, when electrically activated, emits light through substantially around a vertical axis. The light fixture also includes a core possessing heat transfer properties that is in thermal contact with the LED and has an interior cavity for the LED. The core is affixed to the lower skin layer, and an upper skin layer, containing a window or windows over the LED or LEDs, is affixed to the core. The LEDs may be white, infrared, ultraviolet, and / or colored and may be mounted on a printed circuit board or individually.

In an electron device in which plural thin film transistors each having at least a source electrode, a drain electrode, a semiconductor region including a channel, a gate insulation film and a gate electrode are provided on a substrate, a device separation region provided between the plural thin film transistors and the semiconductor region are constituted by a same metal oxide layer, and resistance of the semiconductor region is formed to be lower than resistance of the device separation region.

A RFID transponder having a microchip or integrated circuit, an impedance-matching structure and a resonant structure mounted on at least one substrate and connected to each other by an electric field.

A printed circuit board has a liquid crystalline polymer layer that is bonded to an electrically conductive layer that includes traces that electrically connect components mounted on the printed circuit board. The liquid crystalline polymer material is thermally conductive and dielectric. When the components produce heat, the liquid crystalline polymer layer absorbs and dissipates the heat produced by the electrical components mounted on the printed circuit board. The thermal equilibrium of the printed circuit board is lower than the maximum operating temperature of the components.

To provide a semiconductor device in which a defect or fault is not generated and a manufacturing method thereof even if a ZnO semiconductor film is used and a ZnO film to which an n-type or p-type impurity is added is used for a source electrode and a drain electrode. The semiconductor device includes a gate insulating film formed by using a silicon oxide film or a silicon oxynitride film over a gate electrode, an Al film or an Al alloy film over the gate insulating film, a ZnO film to which an n-type or p-type impurity is added over the Al film or the Al alloy film, and a ZnO semiconductor film over the ZnO film to which an n-type or p-type impurity is added and the gate insulating film.

A field effect transistor which includes, on a substrate, at least a semiconductor layer, a passivation layer for the semiconductor layer, a source electrode, a drain electrode, a gate insulating film and a gate electrode, the source electrode and the drain electrode being connected through the semiconductor layer, the gate insulating film being present between the gate electrode and the semiconductor layer, the passivation layer being at least on one surface side of the semiconductor layer, and the semiconductor layer including a composite oxide which comprises In (indium), Zn (zinc) and Ga (gallium) in the following atomic ratios (1) to (3):In / (In+Zn)=0.2 to 0.8  (1)In / (In+Ga)=0.59 to 0.99  (2)Zn / (Ga+Zn)=0.29 to 0.99  (3).

A coated article is provided, having a coating supported by a glass substrate where the coating includes at least one color and / or reflectivity-adjusting absorber layer. The absorber layer(s) allows color tuning, and reduces the glass side reflection of the coated article and / or allows sheet resistance of the coating to be reduced without degrading glass side reflection. In certain example embodiments the absorber layer is provided between first and second dielectric layers which may be of substantially the same material and / or composition. In certain example embodiments, the coated article is capable of achieving desirable transmission, together with desired color, low reflectivity, and low selectivity, when having only one infrared (IR) reflecting layer of silver and / or gold. Coated articles according to certain example embodiments of this invention may be used in the context of insulating glass (IG) window units, monolithic windows, or the like.