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2296 results about "Sheet resistance" patented technology

Sheet resistance is a measure of resistance of thin films that are nominally uniform in thickness. It is commonly used to characterize materials made by semiconductor doping, metal deposition, resistive paste printing, and glass coating. Examples of these processes are: doped semiconductor regions (e.g., silicon or polysilicon), and the resistors that are screen printed onto the substrates of thick-film hybrid microcircuits.

Reversible electrochemical mirror (REM) state monitoring

Reversible electrochemical mirror (REM) devices typically comprise a conductive oxide mirror electrode that is substantially transparent to radiation of some wavelengths, a counter electrode that may also be substantially transparent, and an electrolyte that contains ions of an electrodepositable metal. A voltage applied between the two electrodes causes electrodeposition of a mirror deposit on the mirror electrode and dissolution of the mirror deposit on the counter electrode, and these processes are reversed when the polarity of the applied voltage is changed. Such REM devices provide precise control over the reflection and transmission of radiation and can be used for a variety of applications, including smart windows and automatically adjusting automotive mirrors. According to the present invention, measurements of the sheet resistance of the mirror electrode in a REM device are correlated with the thickness of electrodeposited mirror metal and can be used to monitor the reflectance of the device. Sheet resistance measurements can be performed while the mirror state of the device is being switched if adequate isolation between the measurement and switching circuits is provided. This can be accomplished by use of external resistors or more sophisticated circuitry, or by taking advantage of the relatively high sheet resistance of the mirror electrode itself. Monitoring the reflectance of REM devices according to this invention provides significant cost and performance advantages.
Owner:TELEDYNE SCI & IMAGING

Method of multiple pulse laser annealing to activate ultra-shallow junctions

A method for forming a highly activated ultra shallow ion implanted semiconductive elements for use in sub-tenth micron MOSFET technology is described. A key feature of the method is the ability to activate the implanted impurity to a highly active state without permitting the dopant to diffuse further to deepen the junction. A selected single crystalline silicon active region is first amorphized by implanting a heavy ion such as silicon or germanium. A semiconductive impurity for example boron is then implanted and activated by pulsed laser annealing whereby the pulse fluence, frequency, and duration are chosen to maintain the amorphized region just below it's melting temperature. It is found that just below the melting temperature there is sufficient local ion mobility to secure the dopant into active positions within the silicon matrix to achieve a high degree of activation with essentially no change in concentration profile. The selection of the proper laser annealing parameters is optimized by observation of the reduction of sheet resistance and concentration profile as measured on a test site. Application of the method is applied to forming a MOS FET and a CMOS device. The additional processing steps required by the invention are applied simultaneously to both n-channel and p-channel devices of the CMOS device pair.
Owner:CHARTERED SEMICONDUCTOR MANUFACTURING

Flexible fingerprint sensor materials and processes

A flexible fingerprint sensor laminate comprising: a layer of flexible substrate having a front surface and a back surface, at least a domain of electrically conductive material deposited on the front surface, a protective hard coating layer that covers the domain of electrically conductive material, and a plurality of sensor electrodes deposited preferably on the back surface and related circuitry (e.g. integrated circuit for driving and sensing). Preferably, the layer of flexible substrate is no greater than 20 μm in thickness, the domain of electrically conductive material has a thickness no greater than 2 μm, the protective hard coating has a thickness no greater than 1 μm, and the laminate has a surface sheet resistance no greater than 200 Ohm per square and surface scratch resistance no less than 3 H. The laminate exhibits good scratch resistance, low sheet resistance, good flexibility and mechanical integrity. The invention also provides a biometric sensor, such as a fingerprint sensor. The invention further provides a process for producing such a sensor laminate.
Owner:GLOBAL GRAPHENE GRP INC

Optical resonator type organic electroluminescent element

An optical resonator type organic electroluminescent element has a multilayered film mirror 30, a transparent electrode 12, an electron hole transportation layer 14 and a luminescent layer 16 configuring an organic layer, and a metallic electrode mirror 20, formed on a glass substrate 10. The optical resonator type organic electroluminescent element amplifies a specific wavelength (especially, in a range of about 30 nm toward a shorter wavelength side from a luminescence peak wavelength of the organic layer) in luminescence light by a minute optical resonator, which comprises the multilayered film mirror 30 and the metallic electrode mirror 20. It is determined that the minute optical resonator has an optical length L which is twice as long as a resonance wavelength, the organic layer has a thickness of 100 nm or more, and the transparent electrode has a thickness of 50 nm or more or a thickness so to have a sheet resistance of 30 OMEGA/square or less. Thus, the transparent electrode can be prevented from generating heat even when a large current is caused to flow into it, and the element characteristics can be reliably prevented from being deteriorated. Moreover, the reliability of this element can be improved because the organic layer containing the luminescent layer has a sufficient thickness.
Owner:TOYOTA CENT RES & DEV LAB INC

Method for forming tungsten contacts and interconnects with small critical dimensions

Provided are methods of void-free tungsten fill of high aspect ratio features. According to various embodiments, the methods involve a reduced temperature chemical vapor deposition (CVD) process to fill the features with tungsten. In certain embodiments, the process temperature is maintained at less than about 350° C. during the chemical vapor deposition to fill the feature. The reduced-temperature CVD tungsten fill provides improved tungsten fill in high aspect ratio features, provides improved barriers to fluorine migration into underlying layers, while achieving similar thin film resistivity as standard CVD fill. Also provided are methods of depositing thin tungsten films having low-resistivity. According to various embodiments, the methods involve performing a reduced temperature low resistivity treatment on a deposited nucleation layer prior to depositing a tungsten bulk layer and / or depositing a bulk layer via a reduced temperature CVD process followed by a high temperature CVD process.
Owner:NOVELLUS SYSTEMS
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