2517 results about "Crystalline silicon" patented technology

A non-volatile solid state resistive device that includes a first electrode, a p-type poly-silicon second electrode, and a non-crystalline silicon nanostructure electrically connected between the electrodes. The nanostructure has a resistance that is adjustable in response to a voltage being applied to the nanostructure via the electrodes. The nanostructure can be formed as a nanopillar embedded in an insulating layer located between the electrodes. The first electrode can be a silver or other electrically conductive metal electrode. A third (metal) electrode can be connected to the p-type poly-silicon second electrode at a location adjacent the nanostructure to permit connection of the two metal electrodes to other circuitry. The resistive device can be used as a unit memory cell of a digital non-volatile memory device to store one or more bits of digital data by varying its resistance between two or more values.

A novel and very useful method for forming a crystal silicon film by introducing a metal element which promotes crystallization of silicon to an amorphous silicon film and for eliminating or reducing the metal element existing within the crystal silicon film thus obtained is provided. The method for fabricating a semiconductor device comprises steps of intentionally introducing the metal element which promotes crystallization of silicon to the amorphous silicon film and crystallizing the amorphous silicon film by a first heat treatment to obtain the crystal silicon film; eliminating or reducing the metal element existing within the crystal silicon film by implementing a second heat treatment within an oxidizing atmosphere; eliminating a thermal oxide film formed in the previous step; and forming another thermal oxide film on the surface of the region from which the thermal oxide film has been eliminated by implementing another thermal oxidation.

A perovskite-based thin film structure includes a semiconductor substrate layer, such as a crystalline silicon layer, having a top surface cut at an angle to the (001) crystal plane of the crystalline silicon. A perovskite seed layer is epitaxially grown on the top surface of the substrate layer. An overlayer of perovskite material is epitaxially grown above the seed layer. In some embodiments the perovskite overlayer is a piezoelectric layer grown to a thickness of at least 0.5 μm and having a substantially pure perovskite crystal structure, preferably substantially free of pyrochlore phase, resulting in large improvements in piezoelectric characteristics as compared to conventional thin film piezoelectric materials.

A method for manufacturing a fin-type field effect transistor simply and securely by using a SOI (Silicon On Insulator) wafer, capable of suppressing an undercut formation, is disclosed. The method includes forming a fin-shaped protrusion by selectively dry-etching a single crystalline silicon layer until an underlying buried oxide layer is exposed; forming a sacrificial oxide film by oxidizing a surface of the protrusion including a damage inflicted thereon; and forming a fin having a clean surface by removing the sacrificial oxide film by etching, wherein an etching rate r₁ of the sacrificial oxide film is higher than an etching rate r₂ of the buried oxide layer during the etching.

A method of manufacturing a semiconductor memory device comprising: a step of forming a storage node in which a conductive layer 7 to be the storage node is formed in the vicinity of single crystalline silicon 3 formed on an insulator 2, a gettering step for conducting heat treatment to the single crystalline silicon 3 after the step of forming the storage node and gettering contaminants contained in the single crystalline silicon 3 by the conductive layer 7 connected to the single crystalline silicon, and a step of forming a gate oxide film 8a on the single crystalline silicon 3 after the step of gettering is provided to thereby obtain a sufficient gettering effect even though the width of an element and/or the thickness of the element is reduced in accordance with microminiaturization of the element.

A wireless X-ray detector for a digital radiography system with remote detection of impinging radiation from the system X-ray source onto a sensor panel having amorphous or crystalline silicon photodiodes or metal insulated semiconductor (MIS) sensors. Changes in current in the photodiode bias supply circuit is sensed to generate a signal indicating presence of radiation. Improved detection of X-ray cessation is achieved either by leaving at least one line of sensors connected between the bias supply circuit to a virtual ground during charge accumulation or by using an X-ray presence detector circuit that increases the sensitivity of the detector circuit to bias circuit current changes occurring after onset of the radiation.

Concentration of metal element which promotes crystallization of silicon and which exists within a crystalline silicon film obtained by utilizing the metal element is reduced. A first heat treatment for crystallization is performed after introducing nickel to an amorphous silicon film 103. Then, laser light is irradiated to diffuse nickel element which is concentrated locally. After that, another heat treatment is performed within an oxidizing atmosphere at a temperature higher than that of the previous heat treatment. At this time, HCl or the like is added to the atmosphere. A thermal oxide film 106 is formed in this step. At this time, gettering of the nickel element into the thermal oxide film 106 takes place. Then, the thermal oxide film 106 is removed. Thereby, a crystalline silicon film 107 having low concentration of the metal element and a high crystallinity can be obtained.

An i-type amorphous silicon film and an anti-reflection film made of amorphous silicon nitride or the like are formed in this order on a main surface of an n-type single-crystalline silicon substrate. On a back surface of the n-type single-crystalline silicon substrate are provided a positive electrode and a negative electrode next to each other. The positive electrode includes an i-type amorphous silicon film, a p-type amorphous silicon film, a back electrode, and a collector electrode formed in this order on the back surface of the n-type single-crystalline silicon substrate. The negative electrode includes an i-type amorphous silicon film, an n-type amorphous silicon film, a back electrode, and a collector electrode formed in this order on the back surface of the n-type single-crystalline silicon substrate.

Crystal orientation planes exist randomly in a crystalline silicon film manufactured by a conventional method, and the orientation ratio is low with respect to a specific crystal orientation. A semiconductor film having a high orientation ratio for the {101} lattice plane is obtained if crystallization of an amorphous semiconductor film, which has silicon as its main constituent and contains from 0.1 to 10 atom % germanium, is performed after introduction of a metal element. A TFT is manufactured utilizing the semiconductor film.

A resistive memory device includes a first electrode; a second electrode having a polycrystalline semiconductor layer that includes silicon; a non-crystalline silicon structure provided between the first electrode and the second electrode. The first electrode, second electrode and non-crystalline silicon structure define a two-terminal resistive memory cell.

The present invention is related to a thin film semiconductor which can be regarded as substantially a single crystal and a semiconductor device comprising an active layer formed by the thin film semiconductor. At least a concave or convex pattern is formed intentionally on a insulating film provided in contact with the lower surface of an amorphous silicon film, whereby at least a site is formed in which a metal element for accelerating crystallization can be segregated. Therefore, a crystal nuclei is selectively formed in a portion where the concave or convex pattern is located, which carries out controlling a crystal diameter. Thus, a crystalline silicon film is obtained. A crystallinity of the crystalline silicon film is improved by the irradiation of a laser light or an intense light having an energy equivalent to that of the laser light, whereby a monodomain region in which no grain boundary substantially exit is formed.

Silicon is formed at selected locations on a silicon-insulator (SOI) substrate during fabrication of selected electronic components, including resistors, capacitors, and diodes. The silicon location is defined using a patterned, removable mask, and the silicon may be applied by deposition or growth and may take the form of polysilicon or crystalline silicon. Electrostatic discharge (ESD) characteristics of the SOI device is significantly improved by having a thick double layer of silicon in selected regions.

A micro-electro-mechanical device and method of manufacture therefore with a suspended structure formed from mono-crystalline silicon, bonded to a substrate wafer with an organic adhesive layer serving as support and spacer and the rest of the organic adhesive layer serving as a sacrificial layer, which is removed by a dry etch means. Said substrate wafer may contain integrated circuits for sensing and controlling the device.

To uniformly form a silicon thin film for a solar cell, having an i layer formed with crystalline silicon, on a substrate of a large area to provide a high power solar cell, in a manufacturing method of a silicon thin film solar cell, a silicon thin film, having a structure such that an i layer is sandwiched between a p layer and an n layer, is formed on a substrate with a high frequency plasma CVD method, wherein i layer is formed with crystalline silicon using plasma with pulse-modulated high frequency power, one cycle of pulse modulation includes an ON state for outputting high frequency power and an OFF state for not outputting, an output waveform is modulated to be rectangular, a time of the ON state is 1-100 microseconds, and a time of the OFF state is 5 microseconds or longer.

A photovoltaic element which directly converts an optical energy such as solar light into an electric energy. After many uneven sections are formed on the surface of an n-type crystalline silicon substrate (1), the surface of the substrate (1) is isotropically etched. Then the bottoms (b) of the recessed sections are rounded and a p-type amorphous silicon layer (3) is formed on the surface of the substrate (1) through an intrinsic amorphous silicon layer (2). The shape of the surface of the substrate (1) after isotropic etching is such that the bottoms of the recessed sections are slightly rounded and therefore the amorphous silicon layer can be deposited in a uniform thickness.

Methods for surface texturing a crystalline silicon substrate are provided. In one embodiment, the method includes providing a crystalline silicon substrate, wetting the substrate with an alkaline solution comprising a wetting agent, and forming a textured surface with a structure having a depth about 1 μm to about 10 μm on the substrate. In another embodiment, a method of performing a substrate texture process includes providing crystalline silicon substrate, pre-cleaning the substrate in a HF aqueous solution, wetting the substrate with a KOH aqueous solution comprising polyethylene glycol (PEG) compound, and forming a textured surface with a structure having a depth about 3 μm to about 8 μm on the substrate.

A method of manufacturing a semiconductor device, comprises the steps of: forming a first insulating film on a first substrate; forming a second insulating film on the first insulating film; forming an amorphous silicon film on the second insulating film; holding a metal element that promotes the crystallization of silicon in contact with a surface of the amorphous silicon film; crystallizing the amorphous silicon film through a heat treatment to obtain a crystalline silicon film; forming a thin-film transistor using the crystalline silicon film; forming a sealing layer that seals the thin-film transistor; bonding a second substrate having a translucent property to the sealing layer; and removing the first insulating film to peel off the first substrate.

This invention is made to improve the characteristics of a photovoltaic module in which a plurality of solar cells are electrically connected to each other with connecting members such as tabs or connecting leads. The present invention provides a method for manufacturing a photovoltaic module comprising a plurality solar cells each including a semiconductor heterojunction made by combining amorphous silicon and crystalline silicon and connecting members for connecting the plurality solar cells in which the connecting members are connected to the solar cells by soldering after a high-temperature heat treatment is applied to the solar cells, and the plurality of solar cells are electrically connected to each other with the connecting members.

Concentration of metal element which promotes crystallization of silicon and which exists within a crystal silicon film obtained by utilizing the metal element is reduced. A first heat treatment for crystallization is implemented after introducing nickel element to an amorphous silicon film 103. Then, after obtaining the crystal silicon film, another heat treatment is implemented within an oxidizing atmosphere at a temperature higher than that of the previous heat treatment. At this time, HCl or the like is added to the atmosphere. A thermal oxide film 106 is formed in this step. At this time, gettering of the nickel element into the thermal oxide film 106 takes place. Next, the thermal oxide film 106 is removed. Thereby, a crystal silicon film 107 having low concentration of the metal element and a high crystalinity can be obtained.

The invention discloses a preparation method of a textured structure of a crystalline silicon solar cell. The method includes the steps of (1) cleaning and texture preparation, (2) soaking a silicon wafer in a solution containing metal ions to enable the surface of the silicon wafer to be coated with a layer of metal nanometer particles, (3) corroding the surface of the silicon wafer to form a nanometer-grade texture, (4) cleaning to remove the metal particles, (5) carrying out microstructure amendment etching in second chemical corrosive liquid, and (6) cleaning and spin-drying. As is proved by a test, the size of the textured structure is between 100nm-500nm; the textured structure is of a nanopore shape with a large hole diameter and a small depth, or a nanometer pyramid with edge angles, or of a nanometer pit shape structure with an edge angle nanometer cone body or with an edge angle; and compared with a nanometer-micrometer composite textured structure disclosed in CN102610692A, the textured structure enables conversion efficiency of a cell piece to be improved by about 0.2%-0.5%, and an unexpected effect is achieved.

Embodiments of three-dimensional (3D) memory devices and methods for forming the 3D memory devices are disclosed. In an example, a NAND memory device includes a substrate, one or more peripheral devices on the substrate, a plurality of NAND strings above the peripheral devices, a single crystalline silicon layer above and in contact with the NAND strings, and interconnect layers formed between the peripheral devices and the NAND strings. In some embodiments, the NAND memory device includes a bonding interface at which an array interconnect layer contacts a peripheral interconnect layer.

Concentration of metal element which promotes crystallization of silicon and which exists within a crystal silicon film obtained by utilizing the metal element is reduced. A first heat treatment for crystallization is implemented after introducing nickel to an amorphous silicon film 103. Then, laser light is irradiated to diffuse the nickel element concentrated locally. After that, another heat treatment is implemented within an oxidizing atmosphere at a temperature higher than that of the previous heat treatment. A thermal oxide film 106 is formed in this step. At this time, the nickel element is gettered to the thermal oxide film 106. Then, the thermal oxide film 106 is removed. Thereby, a crystal silicon film 107 having low concentration of the metal element and a high crystallinity can be obtained.

Photovoltaic devices or solar cells are provided. More particularly, the present invention provides photovoltaic devices having IR and/or UV absorbing nanostructured layers that increase efficiency of solar cells. In some embodiments the nanostructured materials are integrated with one or more of: crystalline silicon (single crystal or polycrystalline) solar cells and thin film (amorphous silicon, microcrystalline silicon, CdTe, CIGS and III-V materials) solar cells whose absorption is primarily in the visible region. In some embodiments the nanoparticle materials are comprised of quantum dots, rods or multipods of various sizes.

Formation of a solar cell device from upgraded metallurgical grade silicon which has received at least one defect engineering process and including a low contact resistance electrical path. An anti-reflective coating is formed on an emitter layer and back contacts are formed on a back surface of the bulk silicon substrate. This photovoltaic device may be fired to form a back surface field at a temperature sufficiently low to avoid reversal of previous defect engineering processes. The process further forms openings in the anti-reflective coating and a low contact resistance metal layer, such as nickel layer, over the openings in the anti-reflective coating. The process may anneal the low contact resistance metal layer to form n-doped portion and complete an electrically conduct path to the n-doped layer. This low temperature metallization (e.g., <700° C.) supports the use of UMG silicon for the solar device formation without the risk of reversing earlier defect engineering processes.

The invention discloses an aluminum pulp composition of a crystal silicon solar cell and a preparation method thereof, wherein an aluminum pulp is prepared by the following compositions in percentage by weight: 50-85 percent of spherical aluminum powder, 2-15 percent of lead-free glass adhesive, 10-35 percent of organic carrier and 0.5-6 percent of metal/nonmetal power additive. The prepared aluminum pulp is used for a single crystal silicon solar cell, can enable warpage of a silicon wafer to be small, and aluminum films are dense and uniform, have no aluminum pills, do not bulb and have strong adhesion force and high photoelectric conversion efficiency.

A lithium-ion secondary battery allowed to improve cycle characteristics and initial charge-discharge characteristics is provided. The lithium-ion secondary battery includes a cathode; an anode; and an electrolytic solution. The anode includes an anode active material layer including a plurality of anode active material particles. The anode active material particles each include a core section and a coating section applied to a part or a whole of a surface of the core section, and the core section includes a silicon-based material (SiO_x: 0≦x<0.5) and the coating section includes an amorphous or low-crystalline silicon-based material (SiO_y: 0.5≦y≦1.8).

The present invention generally provides a batch substrate processing system for in-situ processing of a film stack used to form regions of a solar cell device. The batch processing system is configured to process an array of substrates positioned on a substrate carrier. The batch processing system includes a substrate transport interface that provides loading an unloading of the array of substrates in a production line environment. The substrate transport interface may include one or more of a substrate carrier cleaning module, a substrate carrier cooling module, and a substrate carrier buffer module.

An exhaust gas purifying apparatus is provided which includes a honeycomb structure used as a filter to capture particulates in exhaust gas from an internal combustion engine such as diesel engine and as a carrier of a catalyst to convert the exhaust gas. The honeycomb structure is formed from a composite material comprising ceramic particles and crystalline silicon. The particulates captured by the honeycomb structure are removed by combustion at a temperature of 250 to 800° C., thereby, even if a relatively low temperature is distributed or a heat cycle has been repeated from a long term, thermal stress is prevented from being stored, cracking is prevented and thermal shock resistance is thus improved.

Disclosed are a hetero-junction silicon solar cell and a fabrication method thereof. The hetero-junction silicon solar cell according to the present invention forms a pn junction of a crystalline silicon substrate and a passivation layer doped with impurities so as to minimize a recombination of electrons and holes, making it possible to maximize efficiency of the hetero-junction silicon solar cell. The present invention provides a hetero-junction silicon solar cell comprising a crystalline silicon substrate and a passivation layer that is formed on the crystalline silicon substrate and is doped with impurities.

A method for obtaining a desired dopant profile of an emitter for a solar cell which includes depositing a first amorphous silicon layer having a first doping level over an upper surface of the crystalline silicon substrate, depositing a second amorphous silicon layer having a second doping level on the first amorphous silicon layer, and heating the crystalline silicon substrate and the first and second amorphous silicon layers to a temperature sufficient to cause solid phase epitaxial crystallization of the first and second amorphous silicon layers, such that the first and second amorphous silicon layers, after heating, have the same grain structure and crystal orientation as the underlying crystalline silicon substrate