117 results about "Charge-carrier density" patented technology

There is provided a thin-film transistor including at least a substrate, a gate electrode, a gate insulating layer, an oxide semiconductor layer, a source electrode, a drain electrode and a protective layer, wherein the oxide semiconductor layer is an amorphous oxide containing at least one of the elements In, Ga and Zn, the gate electrode-side carrier density of the oxide semiconductor layer is higher than the protective layer-side carrier density thereof, and the film thickness of the oxide semiconductor layer is 30 nm±15 nm.

Objects are to provide a semiconductor device for high power application in which a novel semiconductor material having high productivity is used and to provide a semiconductor device having a novel structure in which a novel semiconductor material is used. The present invention is a vertical transistor and a vertical diode each of which has a stacked body of an oxide semiconductor in which a first oxide semiconductor film having crystallinity and a second oxide semiconductor film having crystallinity are stacked. An impurity serving as an electron donor (donor) which is contained in the stacked body of an oxide semiconductor is removed in a step of crystal growth; therefore, the stacked body of an oxide semiconductor is highly purified and is an intrinsic semiconductor or a substantially intrinsic semiconductor whose carrier density is low. The stacked body of an oxide semiconductor has a wider band gap than a silicon semiconductor.

The present invention relates to a concept for optical distance measurement, wherein a radiation pulse is emitted in the direction of an object of measurement. At least two different transfer gates which couple a photoactive region to at least two different evaluating capacities are driven during different drive intervals so that charge carriers generated during the drive intervals by a radiation pulse reflected from the object of measurement and/or by ambient radiation can be transported from the photoactive region to the evaluating capacities each coupled to the at least two transfer gates. Another transfer gate is driven during a time outside the drive intervals of the at least two transfer gates to connect the photoactive region to a reference potential terminal acting as a charge carrier sink during the time outside the drive intervals of the at least two transfer gates.

The present invention provides methods of fabricating a radiation-absorbing semiconductor wafer by irradiating at least one surface location of a silicon substrate, e.g., an n-doped crystalline silicon, by a plurality of temporally short laser pulses, e.g., femtosecond pulses, while exposing that location to a substance, e.g., SF₆, having an electron-donating constituent so as to generate a substantially disordered surface layer (i.e., a microstructured layer) that incorporates a concentration of that electron-donating constituent, e.g., sulfur. The substrate is also annealed at an elevated temperature and for a duration selected to enhance the charge carrier density in the surface layer. For example, the substrate can be annealed at a temperature in a range of about 700 K to about 900 K.

The reliability of a transistor including an oxide semiconductor is improved. The transistor in a semiconductor device includes a first oxide semiconductor film over a first insulating film, a gate insulating film over the first oxide semiconductor film, a second oxide semiconductor film over the gate insulating film, and a second insulating film over the first oxide semiconductor film and the second oxide semiconductor film. The first oxide semiconductor film includes a channel region overlapping with the second oxide semiconductor film, a source region and a drain region each in contact with the second insulating film. The channel region includes a first layer and a second layer in contact with a top surface of the first layer and covering a side surface of the first layer in the channel width direction. The second oxide semiconductor film has a higher carrier density than the first oxide semiconductor film.

A semiconductor device containing a GaN FET has n-type doping in at least one III-N semiconductor layer of a low-defect layer and an electrical isolation layer below a barrier layer. A sheet charge carrier density of the n-type doping is 1 percent to 200 percent of a sheet charge carrier density of the two-dimensional electron gas.

A first and a second tunnel junctions (2 and 3) which have a common electrode composed of a nonmagnetic conductor (4) and each of which has a counterelectrode composed of a ferromagnet (6, 8) are disposed spaced apart from each other by a distance that is shorter than a spin diffusion length of the nonmagnetic conductor (4) wherein the first tunnel junction (2) acts to inject spins from the ferromagnet (6) into the nonmagnetic conductor (4) and the second tunnel junction (3) serves to detect, between the ferromagnetic metal (8) and the nonmagnetic conductor (4), a voltage that accompanies spin injection of the first tunnel junction (2) and wherein the nonmagnetic conductor (4) is a nonmagnetic conductor, such as a semiconductor or a semimetal, that is lower in carrier density than a metal. The common electrode alternatively may be composed of a superconductor (4′). A spin injection device thus provided can exhibit a large signal voltage with low current and under low magnetic field and can be miniaturized in device size. Magnetic apparatuses utilizing such a spin injection device are also provided.

A capacitor and capacitor-like device or any other device showing capacitive effects, including FETs, transmission lines, piezoelectric and ferroelectric devices, etc., with at least two electrodes, of which at least one electrode consists of or comprises a material or is generated as electron system, whose absolute value of the electronic charging energy as defined by the charging-induced change of E_kin+E_exc+E_corr exceeds 10% of the charging-induced change of the Coulomb field energy of the capacitor according to E=E_coul+E_kin+E_exc+E_corr. Therein, E is the energy of a capacitor and E_coul=Q²/2 C_coul=Q²d/(2ε₀ ε_x A), A is the area of the capacitor electrodes, d is the distance and ε₀ε_x the dielectric constant between them. E_corr describes the correlation energy, E_kin the electronic kinetic energy and E_exc the exchange energy of the electrode material. Particularly in miniaturized devices, E_coul is becoming so small that, by using certain materials or material combinations for the capacitor, E_kin, E_exc, and/or E_corr provide significant contributions to E. Preferred are materials with strongly correlated electron systems such as perovskites like La_1-xSr_xTiO₃, YBa₂Cu₃O_7-d, vanadates such as (V_1-xA_x)₂O₃ with A=Cr, Ti, materials with free electron gases of typically low densities such as Cs, Bi or Rb, or of materials the carrier density of which is reduced by diluting these materials in other materials with smaller carrier densities, metals like Fe, or Ni, materials with van-Hove singularities in the electronic density of states such as graphite or Bechgaard salts or even or 2D-electron gases generated by graphene or by heterostructures, such as the electron gases generated at LaAlO₃/SrTiO₃ or ZnO/(Mg_xZn_1-x)O multilayers and more.

The invention relates to a boron nitride-graphene composite material which sequentially comprises a boron nitride film (8), a graphene film (9) and the boron nitride film (10). By using the composite material, under the condition that a carrier density is not increased, conductivity of the grapheme can be substantially increased. In addition, the invention also relates to a preparation method of the composite material and a purpose of preparing a transparent electrode.

An object is to provide a semiconductor device including an oxynitride semiconductor whose carrier density is controlled. By introducing controlled nitrogen into an oxide semiconductor layer, a transistor in which an oxynitride semiconductor having desired carrier density and on characteristics is used for a channel can be manufactured. Further, with the use of the oxynitride semiconductor, even when a low resistance layer or the like is not provided between an oxynitride semiconductor layer and a source electrode and between the oxynitride semiconductor layer and a drain electrode, favorable contact characteristics can be exhibited.

A semiconductor device, which can accurately control carrier density, includes: a single crystal substrate; a semiconductor layer which is made of hexagonal crystal with 6 mm symmetry and is formed on the single crystal substrate; a source electrode, a drain electrode and a gate electrode which are formed on the semiconductor layer, where the main surfaces of a GaN layer and an AlGaN layer constituting the semiconductor layer respectively include C-axis of the hexagonal crystal, and a length direction of a channel region in the semiconductor layer is parallel to the C-axis of the hexagonal crystal.

A method of manufacturing a nitride semiconductor device comprises the steps of: growing an In_xGa_1-xN (0≦x≦1) layer, and growing an aluminium-containing nitride semiconductor layer over the In_xGa_1-xN layer at a growth temperature of at least 500° C. so as to form an electron gas region at an interface between the In_xGa_1-xN layer and the nitride semiconductor layer. The nitride semiconductor layer is then annealed at a temperature of at least 800° C.

The method of the invention can provide an electron gas having a sheet carrier density of 6×10¹³ cm⁻² or greater. An electron gas with such a high sheet carrier concentration can be obtained with an aluminium-containing nitride semiconductor layer having a relatively low aluminium concentration, such as an aluminium mole fraction of 0.3 or below, and without the need to dope the aluminium-containing nitride semiconductor layer or the In_xGa_1-xN layer.

An optical semiconductor device includes an SiC substrate having an n-type conductivity, and an AlGaN buffer layer having an n-type conductivity formed on the SiC substrate with a composition represented as Al_xGa_1-xN, wherein the AlGaN buffer layer has a carrier density in the range between 3×10¹⁸–1×10²⁰ cm⁻³, and the compositional parameter x is larger than 0 but smaller than 0.4 (0<x<0.4).

An indium phosphide substrate for semiconductor devices is obtained as follows. In order to have the direction of growth of the crystal in the <100> orientation, a seed crystal having a specified cross-sectional area ratio with the crystal body is placed at the lower end of a growth container. The growth container housing the seed crystal, indium phosphide raw material, dopant, and boron oxide is placed in a crystal growth chamber. The temperature is raised to at or above the melting point of indium phosphide. After melting the boron oxide, indium phosphide raw material, and dopant, the temperature of the growth container is lowered in order to obtain an indium phosphide monocrystal. An average dislocation density is a function of a carrier density and diameter of the substrate, dislocation density, and a dopant concentration on the wafer is substantially uniform in the depth direction.

An active layer is formed by arranging a plurality of quantum-well layers and a plurality of barrier layers alternatively. An amount of band discontinuity in a conduction band between a barrier layer that is sandwiched by the quantum-well layers and adjacent quantum-well layers is equal to or more than 26 meV and less than 300 meV, so that an overflow of injected carriers due to a thermal excitation between the quantum-well layers is intentionally caused to make the carrier density uniform between the quantum-well layers.

A plasmon-enhanced terahertz graphene-based photodetector exhibits an increased absorption efficiency attained by utilizing a tunable plasmonic resonance in sub-wavelengths graphene micro-ribbons formed on SiC substrate in contact with an array of bi-metallic electrode lines. The orientation of the graphene micro-ribbons is tailored with respect to the array of sub-wavelengths bi-metallic electrode lines. The graphene micro-ribbons extend at the angle of approximately 45 degrees with respect to the electrode lines in the bi-metal electrodes array. The plasmonic mode is efficiently excited by an incident wave polarized perpendicular to the electrode lines, and/or to the graphene micro-ribbons. The absorption of radiation by graphene is enhanced through tunable geometric parameters (such as, for example, the width of the graphene micro-ribbons) and control of a carrier density in graphene achieved through tuning the gate voltage applied to the photodetector.

There is disclosed a simulation model for designing a semiconductor device, comprising adding at least a part of a difference between a density of a carrier described in a quasi-static manner with respect to a voltage applied between electrodes at a first time and a density of the carrier described in a transient state at a second time before the first time to the carrier density at the second time in accordance with a running delay of the carrier between both the times to thereby describe the carrier density at the first time in the transient state with respect to a semiconductor element having the first and second electrodes. A current flowing between the electrodes is described as a sum of a current flowing between the electrodes in the quasi-static manner, and a displacement current between the electrodes.

The present invention improves a photoelectric conversion efficiency of a crystalline silicon-based solar cell. The crystalline silicon based solar cell includes a silicon-based thin-film of a first conductivity type and a first transparent electrode layer, in this order, on one surface of a conductive single-crystal silicon substrate, and a silicon-based thin-film of the opposite conductivity type and a second transparent electrode layer, in this order, on the other surface of the conductive single-crystal silicon substrate. The first and second transparent electrode layers are each formed of a transparent conductive metal oxide, and the first transparent electrode layer preferably has at least two layers, and a total thickness of 50 to 120 nm, wherein the carrier density of the substrate-side electroconductive layer is higher than that of the surface-side electroconductive layer, and the carrier density of the surface-side electroconductive layer is 1 to 4×10²⁰ cm⁻³.