An embodiment of the present application discloses an ESD protection circuit, comprising a negative ESD protection module and a positive ESD protection module, wherein the negative ESD protection module comprises a first resistor, a charging capacitor, a first field effect transistor and a second field effect transistor, and the positive ESD protection module comprises a fourth field effect transistor. When a negative ESD event occurs, the gate of P-type GAN enhanced power supply will have a large transient voltage relative to the source, so that a displacement current from the source to the gate of the P-type GAN enhanced power supply is generated on the recharge capacitor, as that first field effect transistor is tur on, the first field effect transistor and the second field effect transistor form a path, thereby releasing negative ESD energy from the grid relative to the source. At that same time, when a negative steady-state voltage is apply to the gate electrode with respect to the source electrode, the first field effect transistor is in an off state, so that the negative voltage test at the steady-state state can be compatible.