1681 results about "Negative voltage" patented technology

The invention discloses a phase change memory and electronic equipment, the phase change memory comprises a comparator, a second switch, a third switch, a memory circuit, a selected digital line, a first switch and an unselected digital line, the memory circuit, the selected digital line, the first switch and the unselected digital line are connected in sequence, and the reference voltage of the unselected digital line is set in a reading operation through the first switch and the third switch; the reference voltage is in positive correlation with the second negative voltage, the second negative voltage is smaller than the first negative voltage, and compared with the reference voltage which is in positive correlation with the first negative voltage, the lower reference voltage can be generated, so that the overshoot current flowing through the memory cell at the opening moment is reduced, and the reading interference suffered by the memory cell is reduced.

An electrical circuit includes positive and negative voltage rails, a reference voltage rail, a non-trimmable bandgap core configured to output a voltage reference on the reference voltage rail, and a trimming element in an auxiliary section located external to the bandgap core. A current source is coupled to the non-trimmable bandgap core and the positive voltage rail. An auxiliary diode arranged in an auxiliary section outside of the bandgap core is coupled to the current source and negative voltage rail. The trimming element is coupled to the current source external to the non-trimmable bandgap core and has an adjustable set point. The adjustable set point is adjusted to inject a corresponding bias current to the auxiliary section during a trimming process and thereby change the voltage reference.

The invention belongs to the field of driving circuits of gallium nitride (GaN) power devices in motor driving or power electronic conversion, and discloses a design method of a three-level active driving circuit for restraining bridge arm crosstalk of a GaN device, and the method comprises the steps that a circuit is connected in a bridge type topological structure, and the bridge type topological structure comprises an upper bridge arm and a lower bridge arm which are the same in structure; the upper bridge arm and the lower bridge arm are both divided into two parts, namely a traditional driving circuit and an auxiliary circuit, and the auxiliary circuit is divided into a negative voltage self-recovery circuit and a crosstalk suppression circuit. According to the invention, a negative voltage self-recovery circuit and a crosstalk suppression circuit are formed by using the output and reverse conduction characteristics of the charge pump and the auxiliary GaN device. The advantages of the two methods are combined, the defects of a traditional method are effectively overcome, the turn-off speed is increased, the turn-off loss is reduced, and the positive and negative crosstalk is reduced while the turn-on speed is hardly influenced and the reverse turn-on loss is not additionally increased. The overall design is flexible, efficient and reliable.

A method and apparatus for the electrochemical polishing of metallic workpieces are proposed, wherein an electrolyte medium containing solid granular particles and a liquid electrolyte is placed in a container and conductively connected to a first electrode, wherein the metallic workpiece is conductively connected to a second electrode and immersed in the electrolyte medium in the container, wherein the electrodes are subjected to an electrical voltage such that the first electrode in contact with the electrolyte medium has a negative voltage and the second electrode in contact with the workpiece has a positive voltage, and wherein the workpiece is moved relative to the majority of solid granular particles of the electrolyte medium in order to polish it electrochemically.The invention provides that the polarity of the electrical voltage applied to the electrodes is temporarily reversed at least once, in particular periodically, during the electrochemical polishing of the workpiece, so that the first electrode in contact with the electrolyte medium temporarily has a positive voltage and the second electrode in contact with the workpiece temporarily has a negative voltage.

The invention relates to a safe starting control method, device, equipment and medium for a bootstrap drive inverter, and the method comprises the steps: obtaining a detection voltage representing an output filter inductance voltage after responding to any starting event and before formally transmitting a drive signal; comparing the negative voltage with a preset negative voltage safety threshold value; only when the detected voltage is higher than the safety threshold, a driving enable signal is generated to allow the inverter to be normally started; otherwise, generating a driving blocking signal, carrying out detection and judgment again after waiting for preset time delay, and circulating the process until the system state enters the safe area; the method is realized by modifying a control algorithm, no power hardware needs to be added, the starting impact risk is eliminated with low cost, and the contradiction between the hardware limitation of a bootstrap drive circuit and the negative residual voltage possibly existing on the output inductance of the inverter is solved; therefore, the safety problem of direct connection between the impact current and the bridge arm during starting in an unfavorable initial state is solved.

The utility model provides an insulated gate bipolar transistor driving circuit with adjustable positive and negative voltages, comprising a magnetic isolation module, the input end of which is connected with a driving signal and outputs an isolation driving signal; the input end of the first voltage regulating module is connected with the first positive voltage and outputs a second positive voltage within a first preset range; the input end of the second voltage regulating module is connected with the first negative voltage and outputs a second negative voltage within a second preset range; the push-pull output module is connected between the second positive voltage and the second negative voltage, the control end of the push-pull output module is connected with an isolation driving signal, and the output end of the push-pull output module is connected with the gate pole of the to-be-tested insulated gate bipolar transistor through a gate resistor; and the protection module is controllably connected between the output end of the push-pull output module and the second voltage regulation module under the action of the control signal. The driving circuit has the beneficial effects that the positive and negative voltage output capability can be flexibly adjusted according to debugging requirements, the working condition requirements of different clients are met, and the flexibility and adaptability of the driving circuit are improved.

This power conversion device includes a multilevel inverter which outputs multilevel voltages by adding / subtracting voltage of a sub inverter to / from output voltage of a main inverter. The multilevel inverter can switch between PWM operation in which plural pulses are outputted in each of positive voltage output and negative voltage output in one cycle and a pulse width is controlled, and one-pulse operation in which one pulse is outputted in each of positive voltage output and negative voltage output in one cycle, and has a current-split switching mode in which current flowing between a neutral point and the sub inverter flows through a first switch group and a second switch group provided to the main inverter and connected in parallel, in a case where the main inverter outputs zero voltage which is the potential of the neutral point, in the one-pulse operation.

The present invention discloses a boost converter power stage circuit, comprising: an organic light-emitting diode power management integrated circuit unit, a switched capacitor converter, and a boost converter, wherein, a flying capacitor is used to boost the voltage of the inductor to twice the voltage, and then the positive voltage of the output voltage source is boosted, and then use the switched capacitor converter to output the voltage in order to obtain the conversion of the negative voltage.

A driver circuit for controlling a high-power switch. The driver circuit comprises a flyback converter having a positive output rail and a negative output. The driver circuit also comprises: a driving stage that is connected between the positive output rail and the negative output rail; a shunt regulator configured to regulate the negative output voltage on the negative output rail based on a difference between the negative output voltage and a target negative voltage value, wherein the shunt regulator is powered by the positive output voltage on the positive output rail; a short-circuit transistor having a conduction channel that is connected between the negative output rail and a ground terminal; and a regulation control circuit configured to: provide a short-circuit control signal to a control terminal of the short-circuit transistor in order to short the negative output rail to the ground terminal until the positive output voltage reaches a positive threshold.

The invention discloses a partition display driving method, a display driving circuit and a display screen, and the method comprises the steps: obtaining the pixel ranges of a first display region and a second display region, and controlling the absolute value of a gate turn-off voltage received by a switching transistor in a pixel driving unit corresponding to the second display region to decrease according to the pixel range of the second display region; according to the pixel range of the first display area, the gate turn-on voltage received by the switch transistor in the pixel driving unit corresponding to the first display area is controlled to be reduced, so that when the display panel starts the partition refreshing function, differential processing can be performed on the positive voltage and the negative voltage of the gate of the switch transistor; and the purpose of reducing the brightness difference caused by the PBS or the NBS is achieved.

In the present invention, a first control circuit (11) turns on a first switching element (Q1) when a negative voltage is applied, and generates a first control signal for turning off the transistor (Q1) when a positive voltage is applied. A second control circuit (12) turns on a second switching element (Q2) when a negative voltage is applied, and generates a second control signal for turning off the transistor (Q2) when a positive voltage is applied. When a positive voltage is applied to the first switching element (Q1), the first control circuit (11) supplies the second control circuit (12) with power for generating the second control signal. When a positive voltage is applied to the second switching element (Q2), the second control circuit (12) supplies the first control circuit (11) with power for generating the first control signal.

Embodiments of the invention includes various power supplies for plasma systems. These power supplies, for example, closes a switch to connect and disconnect a current pathway to cause an application of an asymmetric periodic voltage waveform. Where each cycle of the asymmetric periodic voltage waveform includes a first portion that begins with a first negative voltage and changes to a positive peak voltage, a second portion that changes from the positive peak voltage to a third voltage level and a fourth portion that includes a negative voltage ramp from the third voltage level to a fourth voltage level.

Disclosed herein is a single photon avalanche diode (SPAD) pixel circuit, including a SPAD having an anode coupled to a negative voltage and a cathode and a cascode transistor having a drain coupled to the cathode of the SPAD, a gate controlled by a cascode control signal, and a source. A readout circuit is coupled to the source of the cascode transistor and configured to detect a voltage change at the source of the cascode transistor and generate a pulse indicating an occurrence of an avalanche event. An active quenching circuit is coupled to the cathode of the SPAD and configured to detect an onset of the avalanche event and pull the cathode of the SPAD to a negative voltage to quench the avalanche event.

The invention relates to a class-C voltage-controlled oscillator with negative-pressure substrate bias and a use method thereof. Aiming at the problem that a traditional C-type voltage-controlled oscillator is difficult to start, the C-type voltage-controlled oscillator provided by the scheme adopts different circuits to simultaneously control the grid voltage and the substrate voltage of the cross-coupled pair transistors, so that the transistors are effectively prevented from entering a linear region, and the C-type voltage-controlled oscillator is quickly started and stably works in a C-type oscillation mode. The circuit structure of the scheme comprises an NMOS (N-channel Metal Oxide Semiconductor) cross coupling circuit, a PMOS (P-channel Metal Oxide Semiconductor) cross coupling circuit, an LC resonant cavity circuit, an amplitude detection circuit, a Schmidt signal processing circuit and a negative voltage charge pump circuit. Wherein the Schmidt signal processing circuit and the negative voltage charge pump circuit rapidly process an initial oscillation signal and provide negative voltage required by the system, and a substrate of the NMOS cross coupling tube is biased. According to the scheme, the design structure is simple, the tuning range is wide, and a new thought is provided for research and design of quick start of the C-type voltage-controlled oscillator.

According to the pure hardware PID current control system and method based on the direct current brushless motor provided by the invention, the negative voltage interference generated by electromagnetic induction is directly filtered in the bus current signal acquisition stage through the cooperation of the current sampling module and the bus negative voltage elimination module; the problem of signal distortion caused by negative voltage in a traditional sampling circuit is eliminated, and the current effective value detection precision is improved; the PID control module constructed based on pure hardware calculates a difference value between a target voltage and an actual voltage in real time through an analog circuit, and generates a proportional, integral and differential composite compensation signal, so that a PWM modulation circuit can adjust duty ratio output in real time according to the compensation signal, and it is ensured that a bus current of a motor driver is rapidly converged to a target value; the whole scheme does not need to depend on a microcontroller and a complex software algorithm, closed-loop current control is achieved through discrete devices, and the system cost is reduced.

An enhancement mode gallium nitride (GaN) transistor configured to eliminate holes in the gate material under the gate metal. The transistor has four electrodes, namely a drain electrode, a source electrode, a gate electrode and a hole collector electrode. In a preferred embodiment, a negative voltage is applied to the hole collector electrode, attracting holes in the gate material under the gate metal. The attracted holes recombine with electrons supplied by the negative voltage, thereby substantially eliminating the holes.

The present invention proposes a sputtering cleaning system and cleaning method for the inner wall of the ionization chamber of a radio frequency ion thruster. The system is composed of a gas distributor, a potential control line, a radio frequency coil, an ionization chamber, a screen grid, an acceleration grid, a positive DC voltage source, a radio frequency power supply, a negative DC voltage source and a conductive tape. The method includes: 1. The radio frequency ion thruster is started, and plasma is formed in the ionization chamber; 2. A positive voltage is applied to the screen grid, and ions are drawn out by the grid system, and the thruster enters a working state; 3. When the conductive film is thicker and the power input is weakened, the positive DC power supply is turned off, and no ions are drawn out of the thruster; 4. The negative DC power supply is turned on, and a negative voltage is slowly applied to the potential control line to increase the energy of ions hitting the inner wall of the ionization chamber; 5. The conductive film on the inner wall of the ionization chamber is bombarded by ions, and particles are sputtered out. The particles are neutral and are discharged from the ionization chamber under the action of the neutral particle flow, thereby achieving cleaning of the inner wall of the ionization chamber.

The invention provides an extra-high voltage hybrid DC power transmission control system and method, and the system comprises a controller which is used for transmitting fault control trigger pulse control information to a hybrid converter when a transmitting end AC fault occurs; the hybrid converter is used for reducing the injected active power and the output direct-current power when the extra-high voltage direct-current power transmission line is in a normal operation condition; based on the state of the ultra-high-voltage direct-current power transmission line in the normal operation working condition, the full-bridge sub-module in the ultra-high-voltage direct-current power transmission line is controlled to output negative voltage, and short-circuit fault current is suppressed. And the turn-off current source type current converter is used for triggering an internal lightning arrester to generate a commutation voltage when a receiving end AC fault occurs, and carrying out commutation by combining the power grid voltage with the commutation voltage. According to the system, a hybrid converter is adopted at a sending end, active power and reactive power of the sending end are flexibly regulated and controlled, and negative voltage is output to suppress short-circuit fault current when a direct-current short-circuit fault occurs; and when the receiving end has an alternating current fault, reliable commutation can still be ensured.

The invention discloses a coaxial double-switch reluctance motor torque ripple minimization control method, which comprises the following steps: establishing a unified model for two switch reluctance motors, obtaining a reference torque through a proportional integral controller after making a difference between a reference rotating speed and an actual rotating speed, and establishing a phase current prediction model according to a phase voltage equation of the switch reluctance motors, based on the predicted current and the predicted angle, establishing a torque prediction model in a positive voltage excitation and zero voltage follow current mode in the conduction interval of each phase winding, and establishing a torque prediction model in a negative voltage demagnetization mode in the turn-off interval of each phase winding to obtain predicted torques of each phase winding in the conduction interval and the turn-off interval; and establishing a unified evaluation function by using the predicted torque and the reference torque of each phase winding of the two switched reluctance motors, and selecting an optimal switching state which enables the evaluation function to be minimum, thereby realizing the torque pulsation minimization control of the coaxial double-switched reluctance motor. The torque ripple minimization control method of the coaxial double-switch reluctance motor is not influenced by the phase difference of the double motors and the conduction range of each phase winding, can be easily expanded to a double-switch reluctance motor driving system with any phase number, and has good application prospect and engineering value.

The invention discloses a negative charge leakage circuit, a rapid chip negative charge leakage method and a radio frequency chip. The negative charge leakage circuit comprises a leakage circuit module and a control signal module, the bleeder circuit module comprises a first PMOS (P-channel Metal Oxide Semiconductor) tube, the source electrode of the first PMOS tube is grounded, and the drain electrode of the first PMOS tube is connected with the negative voltage potential of the chip; the input end of the control signal module is used for receiving an enable signal, and the output end of the control signal module is connected with the grid electrode of the first PMOS tube; the control signal module is used for outputting a corresponding control signal according to the received enable signal so as to control the first PMOS tube to be in a conduction state or a cut-off state; the first PMOS tube is used for discharging negative charges in the chip when the first PMOS tube is in a conducting state. According to the invention, the discharge speed of negative pressure in the chip can be improved, and the reliability of the chip in repeated power-on and power-off starting is improved.

The invention provides a memristor based on a quasi 2D / 3D heterojunction perovskite and a preparation method and application of the memristor. The invention belongs to the technical field of memristors. In the memristor, a three-dimensional (3D) (FAPbI3) 0.95 (MAPbBr3) 0.05 perovskite thin film and a CF3-PEAI quasi-two-dimensional perovskite thin film are prepared by adopting a spin coating method and are used as functional layers of the memristor. The device has a stable I-V cycle characteristic, not only can realize a stable conductivity adjustable characteristic under positive and negative voltages, but also can accurately simulate a recognition task of a handwritten data set by utilizing the device and linear updating for enhancing and inhibiting a conductivity weight, and the accuracy rate can reach 94%. The invention aims to provide the perovskite memristor with a novel structure so as to meet the requirements of efficient neural synaptic bionic and brain-like computing system construction.

The invention discloses an ultra-wideband high-linearity phased array switch, which comprises three ports, namely a transmitting end TX port, an antenna end ANT port and a receiving end RX port, and is characterized in that when a transmitting branch is switched on, a signal is transmitted from the TX port to the ANT port; when the receiving branch is conducted, a signal is transmitted from the ANT port to the RX port; the transmitting branch comprises a matching inductor L2, a transistor M5, a transistor M6, a transistor M1, a transistor M2 and a matching inductor L1, the receiving branch comprises a matching inductor L1, a transistor M3, a transistor M4, a transistor M7, a transistor M8 and a matching inductor L3, the proposed switch is designed by adopting a classic series-parallel structure, a deep N-well NMOS (N-channel Metal Oxide Semiconductor) transistor is used, and the matching inductor L1, the transistor M5, the transistor M6, the transistor M1, the transistor M2 and the matching inductor L3 are matched. The isolation degree of the transistor of the turn-off branch is improved by adopting a negative body bias technology, and meanwhile, the power processing capacity of the turn-off transistor is improved by adopting a negative voltage bias technology and a transistor stacking technology together.

The embodiment of the invention discloses a semiconductor device, a manufacturing method, a power module, a power conversion circuit and a vehicle. The semiconductor device includes a semiconductor body including a first surface, a second surface, a first device region, and a second device region; the first device region comprises a well region, a first region and a channel layer, and the first region is in contact with the channel layer; a gate trench; a first insulating layer; a first trench located in the second device region; the second device region further comprises a second insulating layer and a filling layer; a trench gate; an interlayer insulating layer; a Schottky metal layer; a drain electrode; and a source electrode. According to the technical scheme of the embodiment of the invention, the depletion type semiconductor device is formed and is in a conducting state and a cut-off state in a normal state, negative voltage needs to be applied between the grid electrode and the source electrode to cut off the channel, the response can be faster, the current circulation can be controlled, and the conducting loss is smaller. And a Schottky structure is integrated, so that the forward conduction voltage drop of the device is reduced, and the energy loss of the device in a reverse follow current state is reduced.

The invention discloses a direct-current converter, a power amplifier system and a battery system, the direct-current converter comprises a power supply module and N bridge arms, each bridge arm comprises a first controllable switch and a second controllable switch which are alternately conducted, and the first end of the first controllable switch is connected with the first end of the power supply module; m inductance units and N dynamic voltage stabilizing points, when N is equal to 1, the direct-current converter further comprises a first capacitor and a second capacitor, the first end of the first capacitor is connected with the first end of the power supply module, the second end of the first capacitor and the first end of the second capacitor are connected to a dynamic voltage stabilization point, and the second end of the second capacitor is connected with the second end of the power supply module, so that two output voltages connected in series are formed; or when N is greater than or equal to 2, the direct-current converter comprises a plurality of third capacitors, and the third capacitors are respectively arranged between adjacent N dynamic voltage stabilizing points so as to form at most N-1 series output voltages. The direct-current converter can generate positive voltage and negative voltage, so that the cost and the power consumption are reduced.

A memory device, including: a memory cell array including a plurality of cell strings; a voltage generator configured to generate a precharge voltage, a program voltage, and a negative voltage; and a control logic circuit configured to control a program operation for programming a threshold voltage of a selected memory cell to have a target state, wherein the program operation is performed using a plurality of program loops, based on a voltage increment of the program voltage, and wherein each program loop from among the plurality of program loops includes a precharge duration and a program execution duration, wherein the control logic circuit is further configured to provide the negative voltage to a plurality of unselected string select transistors and a plurality of unselected ground select transistors included in a plurality of unselected cell strings from among the plurality of cell strings, during the program execution duration.

The present invention provides a negative voltage protection circuit, which includes a voltage clamping module, which is arranged between the gate terminal and the drain terminal of an NMOS tube, and is used to clamp the voltage between the drain terminal and the source terminal of the NMOS tube to a protection threshold voltage when the NMOS tube is turned off, so that the voltage between the drain terminal and the source terminal of the NMOS tube can be clamped within a safe range, avoiding the problem that the NMOS tube is broken down due to excessive current between its source terminal and the drain terminal. In this process, the power supply voltage for the inductive load, the NMOS tube and the inductive load form a demagnetization path, so that the inductive load can be demagnetized faster. On this basis, since the protection threshold voltage of the voltage clamping module is negatively correlated with the temperature of the voltage clamping module, when the NMOS tube is overheated during demagnetization, the voltage between the drain terminal and the source terminal of the NMOS tube will decrease, so that the NMOS tube will not produce thermal failure during demagnetization.

Provided are a gate driver and a display device including the same. The display device may include a display panel configured to display an image, a data driver configured to supply a data voltage to the display panel, a gate driver including a scan signal generation circuit configured to supply a scan signal to the display panel and a light-emitting signal generation circuit configured to supply a light-emitting signal to the display panel, and a clear signal line connected to the gate driver to deliver a clear signal in an alternating current form including a positive voltage and a negative voltage, wherein the gate driver initializes at least one of nodes of the scan signal generation circuit and nodes of the light-emitting signal generation circuit based on the clear signal.

The invention belongs to the technical field of electronic circuits, and provides a negative voltage charge pump circuit, a switching power supply converter and electronic equipment. A reference voltage generation module, a comparison module, a fourth driving module, a fifth power tube, a sixth power tube and a seventh power tube are additionally arranged on an existing charge pump. The reference voltage generation module is used for generating third reference voltage, namely threshold voltage when the negative-voltage charge pump circuit enters the light load, then the comparison module is used for comparing the third reference voltage with error voltage output by the error amplifier, and whether the negative-voltage charge pump circuit enters the light-load working condition or not is judged; when the negative-voltage charge pump circuit enters a light-load working condition, the large-size power tube and the driving module thereof are closed, and only the small-size power tube works, so that other performances of the negative-voltage charge pump circuit are ensured, the working current of the negative-voltage charge pump circuit in the light-load state is greatly reduced, and the working efficiency of the negative-voltage charge pump circuit is improved. Therefore, the conversion efficiency of the charge pump circuit in light load is improved.

Positive and negative glitch detectors detect glitches on a supply voltage node. The positive glitch detector has a capacitor and a resistor serially coupled between the supply voltage node and ground. An amplifier is coupled to a first node between the capacitor and resistor. A positive glitch results in the glitch on the first node (normally biased low) and generation of a clock pulse by the amplifier that causes a latch to assert its output to indicate the positive glitch. The negative glitch detector has a capacitor and resistor coupled in parallel between the supply voltage node and a second node. A negative glitch on the supply voltage node decreases the voltage on the second node (normally biased high) and an inverting amplifier coupled to the second node generates a clock pulse to cause a latch to assert its output to indicate the negative voltage glitch.

The invention relates to an ESD protection circuit and a power device circuit device. The ESD protection circuit comprises a first clamping diode string, a second clamping diode string, a third clamping diode string and an ESD discharge device. Wherein the first clamping diode string and the third clamping diode string are connected between a grid electrode and a source electrode of the GaN power device in a series connection mode with opposite polarities, and an anode of the second clamping diode string is respectively connected with a cathode of the first clamping diode string and a cathode of the third clamping diode string. The cathode of the second clamping diode string is connected with the grid electrode of the ESD discharge device. Through a back-to-back diode string structure with opposite polarities, electric leakage of the protection device at the grid electrode and the source electrode under a non-ESD event can be suppressed, a positive / reverse ESD trigger threshold value is independently controlled through a voltage division path, and the compatibility of the ESD protection circuit with negative voltage turn-off and grid electrode negative voltage test is improved.