163 results about "Snubber" patented technology

The invention relates to the technical field of transformers, in particular to a power electronic transformer with a shielding structure, which mainly comprises a transformer body, a radiator is fixedly mounted on the side surface of the transformer body, a cooling fan is fixedly mounted at the end part of the radiator, and a weak current box is fixedly mounted at the end part of the transformer body. Double oil mist separation is achieved through the deoiler, one is that spiral ascending airflow is formed through guiding of the jet pipe, oil mist in gas is removed according to the centrifugal demisting principle, and the other is that residual oil mist in the gas is secondarily intercepted through the filter element pipe, so that the oil mist in respiratory airflow can be effectively removed, the oil mist interception efficiency is remarkably improved, and the oil mist separation efficiency is greatly improved. Meanwhile, the elastic membrane of the buffer can absorb sudden pressure change of the oil conservator through elastic deformation, so that the pressure fluctuation amplitude is reduced when the load changes suddenly, pulverization or structural damage of the drying agent caused by strong airflow impact is avoided, it is ensured that the moisture absorption drying agent is always in a clean and stable working environment, and the efficient dehumidification capacity is maintained.

A current measurement system, comprising a plurality of parallel sensing circuits, each sensing circuit configured to measure a respective range of voltage corresponding to a current through a load, wherein each sensing circuit is triggered to initiate measurement of a voltage across the load in response to a buffer current through a common buffer reaching a respective threshold, a buffer circuit for inputting a virtual ground voltage or a virtual ground current to the load and to the plurality of parallel sensing circuits, the virtual ground voltage corresponding to the voltage across the load or the current through the load, and a processor coupled to the plurality of parallel sensing circuits, wherein the processor is configured to combine data representing voltage measurements from the plurality of parallel sensing circuits to determine the current through the load.

According to the buffer output control circuit, the buffer output control method and the LDO circuit applying the buffer output control circuit, the second control signal generation circuit and the second transistor are arranged, and in the dropout state, the second control signal generation circuit generates the high-level second control signal based on the error amplification signal to control the second transistor to be switched on; the potential of the control end of the power tube is pulled down to the ground, the problem of voltage loss on the control end of the power tube in the prior art is avoided, the power tube can be completely conducted in the state, the output voltage changes along with the input voltage, the voltage difference between the output voltage and the input voltage is small, and then the system loss can be reduced; and compared with the prior art, the power tube with a smaller area can be adopted to realize the same technical index. When the output voltage is in a voltage stabilization state, the second control signal generation circuit generates a low-level second control signal based on the error amplification signal to control the second transistor to be turned off, namely, in the state, the buffer output control circuit does not affect the work of the power tube.

The utility model discloses a clutch detection tool comprising an installation clamp used for fixing a clutch to be detected, an overturning mechanism which is connected with the installation clamp and can drive the installation clamp to rotate, a driving mechanism, and a limiting mechanism which ensures that the center position of the clutch to be detected does not deviate after overturning. In a standby state, the mounting clamp is kept horizontal; the positioning mechanism is selected according to the model of the clutch to be tested, the clutch is fixed on the mounting fixture and vertically inserted into the mounting fixture, the clamping cylinder performs automatic clamping, quick positioning is facilitated, and the mounting fixture and the turnover mechanism are integrated together, so that the mounting time is shortened; the first limiting block in the limiting part can prevent the overturning mechanism from overturning excessively, and when the overturning mechanism collides with the first limiting block, the first buffer can reduce impact force and cooperate with the concentric bearing on the support, so that the clutch to be detected is prevented from deviating to the maximum extent, follow-up butt joint with the load shaft is ensured, the adjustment time is shortened, and the detection precision is ensured.

The invention belongs to the technical field of hoisting equipment, and particularly relates to an intelligent hoisting structure of mechanical electrical automation equipment, which comprises a chassis frame, a rotation driving mechanism, a translation assembly and a sling assembly, the chassis frame is connected with an arranged lower stand column through the rotation driving mechanism, the translation assembly is arranged between the lower stand column and an upper stand column, and the sling assembly is connected with the chassis frame through the rotation driving mechanism. A lifting adjusting mechanism matched with the lifting appliance assembly is arranged on the upper side of the upper stand column. According to the invention, a passive gravity center self-adaptive mechanism in which an inclined slide rail is matched with an inclined slide block is designed in the lifting appliance assembly. After the lifting appliance is connected with lifted equipment, the inclined sliding block automatically slides to the gravity center position of the system under the driving of a gravity component, so that a lifting point is accurately overlapped with the gravity center, and sliding impact is absorbed by the hydraulic buffer. The structure does not need complex transmission parts such as a motor lead screw and closed-loop control, and has the remarkable advantages of being simple in structure, high in reliability and low in maintenance cost.

The invention relates to a W-band low-noise voltage-controlled oscillator based on a transformer resonant cavity and harmonic extraction. The W-band low-noise voltage-controlled oscillator comprises a dual-core in-phase coupled oscillator core, a two-bit switched capacitor bank, a linear variable capacitor bank and an output buffer, the dual-core in-phase coupled oscillator core comprises a transformer resonant cavity and a harmonic extraction network, a fundamental wave oscillation signal is generated in the transformer resonant cavity and is coupled and output to the output buffer, and a high-power second harmonic oscillation signal is generated in the harmonic extraction network and is output as a target oscillation signal; the two-bit switched capacitor bank adopts an HBT switch with excellent high-frequency performance, the tuning range of the oscillator is divided into four sub-bands, and the tuning gain is reduced; the capacitance value of the linearized variable capacitor bank is linearly changed along with the tuning voltage height, and a conversion mechanism of flicker noise is inhibited; and the output buffer realizes load isolation and buffering of the fundamental wave oscillation signal. The voltage-controlled oscillator has low tuning gain and high output power in the W wave band, and excellent phase noise is achieved.

The invention discloses a DC micro-grid power buffer safety control method and device aiming at FDI attack, and relates to the technical field of power electronics and power system control. The method comprises the steps of obtaining a block matrix of a DCmGs system node current equation according to the Kirchhoff's current law; adopting Kron simplification to eliminate internal node voltage, obtaining a relation between a port current vector and a voltage vector, and constructing a small signal model of the port voltage vector; based on a small signal model, a linear mapping relation about disturbance of bus voltage to equivalent input impedance of each power buffer is constructed, modeling and linearization are carried out on energy and adjustable input impedance of each power buffer, a network coupling small signal model is constructed, and a second-order high-gain observer is designed; and if the FDI attack exists in the DCmGs system, an anti-FDI attack elastic control law is designed, so that the closed-loop voltage in the DCmGs system and the energy of a power buffer are quickly converged, and buffeting is inhibited. By adopting the method, the DCmGs system can be prevented from buffeting in an unknown FDI attack scene.

A frequency synthesis circuit includes a first inductor coupled to receive a first input signal at an input frequency, and a second inductor coupled to receive second input signal at the input frequency and out-of-phase relative to the first input signal. The circuit has first and second transistors with control terminals coupled to the first and second inductors, respectively. A first resonant tank of an inductor in parallel with a capacitor is coupled between a power supply terminal and the first transistor. A second resonant tank of an inductor in parallel with a capacitor is coupled between the power supply terminal and the second transistor. The first and second resonant tanks are tuned to a selected harmonic of the input frequency. An injection-locked oscillator has inputs coupled to the first and second transistors.

vibration damper (2) comprising - a damper tube at least partially filled with damping fluid, in which a piston rod is movable back and forth, wherein a working piston is movable along with the piston rod, by which the interior of the damper tube is divided into a working space on the piston rod side and a working space away from the piston rod, - at least one pressure stop buffer (1), wherein the at least one pressure stop buffer (1) comprises an outer contour (4) for at least partial inclusion in a dome bearing housing (3) and a hollow cylindrical basic structure with an inner contour (6) for coaxial arrangement on a piston rod (5) of the vibration damper (2), characterized by the fact that the outer contour (4) of the pressure stop buffer (1) has at least in an area relating to the at least partial reception in the strut bearing housing (3) a three-dimensionally structured surface (7) with several protrusions (8, 8', 8'', 8''') and / or several depressions (9, 9', 9'', 9'''), wherein the multiple protrusions (8, 8', 8'', 8''') and / or depressions (9, 9', 9'', 9''') are at least partially homogeneously distributed, at least in the area of ​​at least partial reception in the strut bearing housing (3), wherein more than 5% of the multiple protrusions (8, 8', 8'', 8''') at least in the area of ​​at least partial reception in the strut bearing housing (3) have a height in the range of 0.2 to 0.3 mm relative to the zero plane of a forming tool with which the pressure stop buffer (1) was manufactured.

The invention relates to a linearity detection system for an input buffer, and the system comprises a main buffer, a terminating resistor unit, an auxiliary buffer, a switched capacitor unit, an observation comparator, and a judgment unit. The input end of the main buffer and the first input end of the terminating resistor unit receive input signals respectively; the second input end of the terminating resistor unit is connected to a first common-mode voltage, the output end of the terminating resistor unit is connected to the input end of the auxiliary buffer, and the output end of the auxiliary buffer and the output end of the main buffer are connected to the input end of the observation comparator through the switched capacitor unit. The output end of the observation comparator is connected to the input end of the judgment unit, and the output end of the judgment unit is connected to the output end of the main buffer; the determination unit is used for determining a determination result for the main buffer and determining a compensation mode. The current linearity state of the main buffer can be rapidly detected in real time and a corresponding compensation mode can be obtained on the premise that a main signal chain is not interfered.

This invention discloses a control circuit based on a hybrid switching timing of relays and thyristors. By connecting the thyristor in parallel with the relay, the thyristor bears the load current before and after the relay is closed, thus avoiding contact arcing. The control unit triggers the thyristor at the AC zero-crossing point, reducing switching losses and electromagnetic interference, and combines an RC snubber circuit with optocoupler isolation to improve reliability. This device can increase the relay lifespan from 20,000 cycles to 500,000 cycles, and its cost is only 1 / 3 that of a solid-state relay, making it particularly suitable for soft-start control of high-current inductive loads.

Solid-state circuit breakers (SSCBs) have been witnessing an impressive progress with the aid of wide bandgap (WBG) devices such as silicon carbide (SiC) MOSFETs. Along with obtaining high efficiency as the result of low on-state resistance, response times have been gaining remarkable achievements in microseconds range. Not only that, the reported successes in control and gate drivers design and incorporating fault detection / location techniques in SSCBs are promising. A MOV-resistive capacitive switch (MOV-RCS) snubber for solid state circuit breakers addresses the following: 1) the MOV degradation issue in DCCBs is solved, 2) the maximum allowable DC bus voltage on DCCBs is extended. The solid state circuit breaker and an active clamping snubber includes a first circuit including a fault current bypass based solid state breaker for low voltage direct current systems.

Solid-state switch array apparatus and methods for digitized plasma magneto-inertial fusion are disclosed herein. A solid-state switch array apparatus for enabling discharge of direct current includes multiple solid-state switches arranged in series and parallel configurations. The apparatus includes corresponding series resistor circuits connected in parallel with each solid-state switch to distribute voltage across the switches and receive constant current flow from a power supply during charging. Snubber circuits including capacitors configured in parallel with each solid-state switch protect against transient back electromotive force during discharge. A ferrite core assembly includes wire fed through ferrite cores wound and connected to gates and cathodes of the solid-state switches. The ferrite core assembly delivers voltage pulses to simultaneously transition all switches to a conducting state in response to discharge from a discharge circuit capacitor, enabling control for plasma generation applications.

Discussed is converter that may include a first inductor connected to a power source at a first node, a second inductor connected to the first inductor at a second node, a third inductor connected to the first inductor at the first node and the second node, a switch connected in series to the second inductor at a third node, a first diode connected to the second inductor and the switch at the third node, a first capacitor connected to the first inductor and the second inductor at the second node and connected to the first diode at a fourth node, a fourth inductor connected to the first diode and the first capacitor at the fourth node, a second diode connected to the fourth inductor at a fifth node, and a resistor connected to the second diode at a sixth node.

Systems, devices, and methods are provided for an improved voltage buffer. Improved voltage buffers may include an output circuit operating in a first voltage domain, and an input circuit operating in a second voltage domain and receiving a reference voltage and feedback signal. The second voltage domain may have a lower voltage than the first voltage domain. A bias circuit coupled between the input and output circuits may bias operation of the output circuit. An error signal from the input circuit may adjust the bias of the output circuit. A level shifting circuit may translate the adjusted bias signal from the second to the first voltage domain. The bias circuit may be controlled according to transistors having opposite VGS temperature curves. Advantageously, a reduced portion of the voltage buffer may be exposed to over-voltage stress, and the voltage buffer may be more resistant to temperature-based fluctuations in output voltage.

The present disclosure relates to voltage-controlled inverters. A voltage-controlled delay buffer includes a number of inverters configured in a cascade structure to receive an input signal from a source circuit and to output an output signal to an output circuit. The inverters include voltage-controlled inverters controlled by a control signal having a first voltage and a second voltage. The voltage-controlled inverters include a PMOS transistor to assist a low-to-high transition of the output signal and an NMOS transistor to assist a high-to-low transition of the output signal. Two variable capacitors, one connected in a forward direction and the other connected in a reverse direction, are used to adjust a delay of a transition of the input signal. Two other variable capacitors, one connected in a forward direction and the other connected in a reverse direction, are used to adjust a delay of a transition of the output signal according to the first voltage and the second voltage.

This invention relates to the field of power electronics technology and discloses a simulation-optimized thyristor RC snubber method and circuit. The method includes: building a precise physical model containing stray parameters in a simulation environment; first, simulating and obtaining turn-off voltage spikes and dv / dt data without the snubber circuit connected; then, connecting an RC network and performing simulation comparisons with multiple sets of parameters for the resistor and capacitor; selecting the optimal RC parameters based on voltage suppression effect, dv / dt limitation, and resistor power consumption, and finally determining the device model. This invention overcomes the coarseness of traditional empirical formulas and the inefficiency of trial and error methods, offering advantages such as high design accuracy, intuitive process, and outstanding efficiency. It effectively avoids problems of conservative parameters or insufficient protection, achieving the best balance between cost, size, and performance while ensuring the safe operation of the thyristor. It is applicable to thyristor protection design in various power electronic systems; it quickly selects the optimal parameter combination that meets the requirements of voltage suppression and dv / dt limitation, shortening the product development cycle.

The purpose of the technology of the present disclosure is to provide a technology for preventing cracks from occurring in a projectile or in a projectile target. This sliding structure comprises: a housing that contains a housing space extending in one direction; an igniter that is provided to the housing; a projectile that is disposed in the housing space, that is launched from one end side of the housing space by means of energy received from the igniter, and that slides along the extension direction of the housing space; and a buffer material that is provided to a terminal end regulation part for regulating the sliding terminus position of the projectile.

To provide a power control unit 1 for a ship's propulsion system 100, comprising an internal combustion engine 4 and a shaft 2 having a shaft generator 5. [Solution] The power control unit 1 is configured to provide fuel commands to the internal combustion engine 4 based on the low-speed component of the shaft 2 speed error, i.e., the low-speed component of the deviation of the shaft speed from the speed setpoint. A generator power command is provided to the shaft generator 5 based on the high-speed component of the shaft 2 speed error and the state of the electrical grid of the electrical grid electrically connected to the shaft generator 5. An energy buffer 7 is used to store power from the shaft generator 5, release power to the shaft generator 5, and release power to the electrical grid 8. Thus, it becomes easier to achieve a more stable engine control system and avoid engine overload.

Embodiments of this disclosure provide an apparatus and method for generating a circuit clock signal. The apparatus includes: a clock buffer configured to buffer an original clock signal to obtain a buffered clock signal; a clock delay unit configured to delay the original clock signal to obtain a plurality of delayed clock signals, the plurality of delayed clock signals being delayed by different amounts of time relative to the original clock signal; a broadened clock generator configured to generate a broadened clock signal based on the original clock signal and the plurality of delayed clock signals, the frequency of the broadened clock signal being lower than the frequency of the original clock signal; and a clock selector configured to select one of the buffered clock signal and the broadened clock signal as the circuit clock signal based on the selection signal.

The embodiment of the invention provides an automatic gain control system and method based on a casing coupling positioning signal. The system is applied to the field of petroleum perforation engineering and comprises an analog front end, a prediction module, a master control module and a bus, and the analog front end comprises an over-temperature protection circuit, an over-current protection circuit, a level translation circuit, a buffer, a programmable amplification circuit and a filter circuit; wherein the level translation circuit is used for converting a bipolar signal into a unipolar signal; the buffer is used for isolating front-stage and rear-stage circuits; the programmable amplification circuit is used for adjusting a gain coefficient; the filter circuit is used for suppressing noise signals; the prediction module is used for pre-judging the voltage amplitude of the casing coupling positioning signal according to the real-time falling speed of the perforating gun; and the main control module is used for processing the falling speed data of the perforating gun, calling the prediction module to output a pre-judgment voltage value, matching an optimal gain coefficient according to the pre-judgment voltage value, and outputting a control instruction to the programmable amplification circuit through a bus, so that the quality of perforating data is improved.

The application aims to provide a V 2 The application discloses an adaptive ripple compensation circuit of a COT-controlled step-down converter, which can guarantee the stability of a power system and optimize the transient response speed of the system, and has the characteristics that the compensation circuit comprises a P-type MOS transistor PMOS, a first N-type MOS transistor NMOS, a second N-type MOS transistor NM1, a third N-type MOS transistor NM2, a first resistor R0, a second resistor R1, a third resistor R2, a fourth resistor Rs, a fifth resistor R3, a sixth resistor R4, a first capacitor Cout, a second capacitor C1, a third capacitor C2, a fourth capacitor Cs, an inductor L, a comparator CMP, a buffer BUF and an operational amplifier EA.

A vehicle system includes a powertrain system including one or more electrical loads and prime mover configured to drive one or mechanical loads. A power converter is configured to power the one or more electrical loads via a main output and an auxiliary output The power converter includes a rectifier configured to power the main output and including a plurality of switching devices, an inductive-capacitive network operatively coupled with the plurality of switching devices and configured recover energy of electrical transients result resulting from operation of the plurality of switching devices, and a capacitive reservoir configured to store energy recovered by the inductive-capacitive network and power a DC / DC converter with said energy, the DC / DC converter being operatively coupled with the auxiliary output.

A switched-mode power supply (100) with a quiescent state and a normal operating state comprises a transformer (150, TR1) with a primary and a secondary side. A primary-side circuit arrangement is coupled to the primary side of the transformer and includes a startup circuit (300). The startup circuit (300) includes a first buffer (320, C3), a first resistor (R3), and a switch (330, SW2) and is configured to generate the supply voltage for a switching regulator IC (310, PWC) in the quiescent state. A secondary-side circuit arrangement is coupled to the secondary side of the transformer (150, TR1) and is configured to provide at least one output voltage (VB), smoothed and buffered via a second buffer (420, C2).A coupling component (600, U2) with a signal path for a switching signal (650, 660) from the secondary-side to the primary-side circuit arrangement comprises a first and a second galvanically isolated side. The secondary-side circuit arrangement is configured to supply the coupling component (600, U2) with current from the second buffer storage (420, C2). The primary-side circuit arrangement includes a switch control (500) for charging the first buffer storage (320, C3), which is configured to periodically open and close the switch (330, SW2) in the idle state.

This application discloses a low-power temperature-compensated RC oscillator, comprising a low-voltage linear buffer, an RC core circuit, a comparator, a Schmitt trigger, a non-overlapping clock generator, and a level shifter. The low-voltage linear buffer uses intrinsic transistors to reduce operating voltage and power consumption; the RC core circuit employs temperature compensation technology, including a series low-temperature drift resistor and a temperature-dependent current source, causing the equivalent resistance to increase with temperature; the comparator compares a triangular wave signal with a reference voltage and outputs a reference clock; the Schmitt trigger filters out clock glitches; the non-overlapping clock generator generates a two-phase clock with dead time to control charging and discharging; and the level shifter converts the low-voltage domain clock to the high-voltage domain. This oscillator eliminates the influence of comparator offset voltage through two-phase switching control and employs low-voltage and temperature compensation technology to achieve a high-precision, low-temperature drift reference frequency in a small area with low power consumption, making it suitable for compact sensing and measurement systems.

The application provides a true rail-to-rail input and output reference voltage buffer circuit suitable for high-precision ADC, which alternately performs a sampling phase F1 and a holding phase F2 during operation; the circuit comprises a sampling capacitor C s During the sampling phase F1, the bottom plate tracks the input reference voltage, and the top plate is reset to the ground; a level shift capacitor C LVL During the sampling phase F1, the difference between the input reference voltage and the output common-mode voltage of a transconductance operational amplifier (OTA) is synchronously sampled, and during the holding phase F2, the output voltage is connected to the output end of the transconductance operational amplifier (OTA), so as to realize the expansion of the true rail-to-rail range of the output voltage; a feedback capacitor C f During the sampling phase F1, the charge is not cleared, and during the holding phase F2, the sampling capacitor C s is connected in parallel, and the output voltage is established through charge averaging; the switch network is used for controlling the connection state of the capacitors in the sampling phase F1 and the holding phase F2. The application embodiment can realize true rail-to-rail input and output and high effective input impedance.

The utility model discloses an energy taking unit for a thyristor switched capacitor, and belongs to the technical field of energy storage. The energy taking unit comprises a voltage type energy taking branch, a current type energy taking branch, a thyristor group, a reactive compensation loop, a power supply conditioning circuit and an energy storage member. The thyristor group and the reactive compensation loop are connected in series; the voltage type energy taking branch is connected with the thyristor group in parallel and is connected with the power supply conditioning circuit; one end of the current type energy taking branch circuit is connected between the thyristor group and the reactive compensation loop, and the other end of the current type energy taking branch circuit is connected with the power supply conditioning circuit; the power supply conditioning circuit is connected with the energy storage part; the thyristor group is connected with a power supply, and the reactive compensation loop is grounded. According to the utility model, the problem of high DC / DC cost and the reliability problem caused by DC / DC isolation voltage resistance in the prior art can be solved through a double-loop energy taking mode of the resistance-capacitance absorption circuit and the mutual inductor.

This disclosure relates to an adaptive cascode gate bias generation circuit. The circuit includes a first resistor, a second resistor, a current source, and a transistor. The first resistor is located between a voltage rail and a drive interconnect. The drive interconnect and the voltage rail are electrically connected to the first resistor. The second resistor is located between the drive interconnect and ground. Ground and the drive interconnect are electrically connected to the second resistor. The current source is located between the voltage rail and the drive interconnect. The drive interconnect and the voltage rail are electrically connected to the current source. The transistor is located between the drive interconnect and a snubber interconnect. The drive interconnect and the snubber interconnect are electrically connected to the transistor.

According to an embodiment of the present disclosure, provided is a bidirectional LDC (Low DC-DC Converter) having opposite ends connected to a high voltage battery and a low voltage battery, respectively, and including a lossless snubber circuit, wherein, when any one of a first synchronous rectifier and a second synchronous rectifier is turned on, a voltage of a low voltage side connected to the low voltage battery is stepped up and transmitted to a high voltage side connected to the high voltage battery. When the first synchronous rectifier and the second synchronous rectifier are turned off, a first switch of the lossless snubber circuit is turned on to perform a voltage clamping operation and a freewheeling operation.