284 results about "Snubber" patented technology

A control device (100) for controlling a number N, with N ≥ 1, of actuators (200) for actuating N optical elements of an optical system, comprising a control node (K2) coupling to the actuator (200) for providing a control voltage (V2) for the actuator (200), an amplifier (110) configured to receive a supply voltage (V1) provided at an input node (K1) and to provide an output voltage (V3) at an output node (K3), wherein the amplifier (110) comprises a plurality M, with M ≥ 2, of current sources (111, 112) comprising at least one charge-controlled current source (112) and a holding capacitor (113) for maintaining the level of the provided output voltage (V3), and a buffer coupled between the output node (K3) and the control node (K2). (120), which is designed to,to decouple the control node (K2) from the output node (K3) and to provide the control voltage (V2) for the actuator (200) based on the level of the output voltage (V3) of the holding capacitor (113).

The invention relates to the technical field of transformers, in particular to a power electronic transformer with a shielding structure, which mainly comprises a transformer body, a radiator is fixedly mounted on the side surface of the transformer body, a cooling fan is fixedly mounted at the end part of the radiator, and a weak current box is fixedly mounted at the end part of the transformer body. Double oil mist separation is achieved through the deoiler, one is that spiral ascending airflow is formed through guiding of the jet pipe, oil mist in gas is removed according to the centrifugal demisting principle, and the other is that residual oil mist in the gas is secondarily intercepted through the filter element pipe, so that the oil mist in respiratory airflow can be effectively removed, the oil mist interception efficiency is remarkably improved, and the oil mist separation efficiency is greatly improved. Meanwhile, the elastic membrane of the buffer can absorb sudden pressure change of the oil conservator through elastic deformation, so that the pressure fluctuation amplitude is reduced when the load changes suddenly, pulverization or structural damage of the drying agent caused by strong airflow impact is avoided, it is ensured that the moisture absorption drying agent is always in a clean and stable working environment, and the efficient dehumidification capacity is maintained.

The invention discloses a low-power-consumption small-area on-chip temperature sensor based on an MOS tube and a method thereof. Comprising a temperature sensing circuit and an analog-to-digital conversion circuit which are connected with each other, the temperature sensing circuit is used for generating a voltage signal related to the temperature and outputting the voltage signal to the analog-to-digital conversion circuit to achieve digital quantization of the temperature, and the output end of a CTAT branch is connected to the input end of a switched capacitor amplifier through a buffer. The output end of the switched capacitor amplifier is connected to the non-inverting input end of the comparator, the output end of the PTAT branch is connected to the inverting input end of the comparator, the output end of the comparator is connected with the input end of the successive approximation logic unit, and the output end of the successive approximation logic unit is connected to the switched capacitor amplifier. According to the temperature sensing circuit structure, the problem of power supply sensitivity existing when voltage is generated is effectively solved, reference signals do not need to be additionally generated in the quantization process, and the problem of error accumulation is avoided.

A triple-active bridge (TAB) converter and methods to optimize the same is disclosed. The TAB converter includes a high-frequency three-winding transformer and three active full bridges, each coupled to the high-frequency transformer through a different passive network. The converter also includes a centralized controller providing gating pulses to semiconductor switches within the active full bridges, a power pulsating buffer (PPB) configured to reduce capacitor requirements on the DC port, and an unfolder stage to convert rectified AC voltage to a pure sine wave. The centralized controller may optimize performance by varying at least one of a switching frequency, a duty cycle of bridge voltages, and a phase shift between bridge voltages. The PPB may include a buck active power decoupler with a half-bridge, inductor, and capacitors, and also a primary full bridge and a power transfer impedance block.

The invention relates to a buffer and an integrated circuit. The buffer includes: an operational amplifier; the first end of the voltage-voltage feedback network is coupled to the positive phase / negative phase input end of the operational amplifier; the first end of the isolation resistor is coupled to the output end of the buffer; the first group of switches and the second group of switches are controlled to be closed when the first capacitive load is driven, the second group of switches are disconnected when the second capacitive load is driven, and the first group of switches are disconnected and the second group of switches are closed when the second capacitive load is driven; in the first load, the output end of the operational amplifier is coupled to the output end of the buffer through at least one switch in the first group of switches, and the second end of the voltage-voltage feedback network is coupled to the output end of the buffer through at least one switch in the first group of switches. In the second load, the output end of the operational amplifier is coupled to the second end of the isolation resistor through at least one switch in the second group of switches, and the second end of the voltage-voltage feedback network is coupled to the output end of the operational amplifier through at least one switch in the second group of switches.

Each of stages of a gate driver includes a first pull-up control circuit applying a previous carry signal to a first control node, a buffer circuit outputting a gate clock signal, and a pull-down circuit outputting a second low voltage. The first pull-up control circuit includes a fourth-first transistor including a control electrode connected to a previous carry input node, a first electrode connected to the previous carry input node, and a second electrode connected to a second control node, a fourth-second transistor including a control electrode connected to the previous carry input node, a first electrode connected to the second control node, and a second electrode connected to the first control node, a first inter-node capacitor connected between the previous carry input node and the second control node, and a second inter-node capacitor connected between the second control node and the first control node.

A current measurement system, comprising a plurality of parallel sensing circuits, each sensing circuit configured to measure a respective range of voltage corresponding to a current through a load, wherein each sensing circuit is triggered to initiate measurement of a voltage across the load in response to a buffer current through a common buffer reaching a respective threshold, a buffer circuit for inputting a virtual ground voltage or a virtual ground current to the load and to the plurality of parallel sensing circuits, the virtual ground voltage corresponding to the voltage across the load or the current through the load, and a processor coupled to the plurality of parallel sensing circuits, wherein the processor is configured to combine data representing voltage measurements from the plurality of parallel sensing circuits to determine the current through the load.

According to the buffer output control circuit, the buffer output control method and the LDO circuit applying the buffer output control circuit, the second control signal generation circuit and the second transistor are arranged, and in the dropout state, the second control signal generation circuit generates the high-level second control signal based on the error amplification signal to control the second transistor to be switched on; the potential of the control end of the power tube is pulled down to the ground, the problem of voltage loss on the control end of the power tube in the prior art is avoided, the power tube can be completely conducted in the state, the output voltage changes along with the input voltage, the voltage difference between the output voltage and the input voltage is small, and then the system loss can be reduced; and compared with the prior art, the power tube with a smaller area can be adopted to realize the same technical index. When the output voltage is in a voltage stabilization state, the second control signal generation circuit generates a low-level second control signal based on the error amplification signal to control the second transistor to be turned off, namely, in the state, the buffer output control circuit does not affect the work of the power tube.

The application discloses a kind of electrical equipment performance comprehensive test device, including comprehensive test box and walking base, the top of the walking base is fixedly connected with support, the top of the support is rotatably connected with suspension frame, and the rotating axis of the suspension frame and comprehensive test box is horizontal.The application is provided with support, suspension frame, top protection trigger frame and side protection trigger frame, wherein the comprehensive test box is hung at the free end of the suspension frame, the top of the support is rotatably connected with the suspension frame, the side protection trigger frame is arranged on the two sides of the comprehensive test box, and the top protection trigger frame is arranged on the top, then the clutch control group and the winding buffer are arranged on the support, when the left and right sides or the top of the comprehensive test box is impacted, the suspension frame will swing down to drive the comprehensive test box to buffer subsidence, away from the impact area, the setting has impact displacement self-protection function, which greatly improves the self-protection performance of the comprehensive test box.

In certain aspects, a voltage buffer includes a first source follower having an input and an output, and a second source follower having an input and an output. The voltage buffer also includes a first transistor, wherein a drain of the first transistor is coupled to the output of the first source follower, and a first coupling capacitor coupled between a gate of the first transistor and the input of the second source follower. The voltage buffer also includes a second transistor, wherein a drain of the second transistor is coupled to the output of the second source follower, and a second coupling capacitor coupled between a gate of the second transistor and the input of the first source follower. The voltage buffer further includes a current source coupled to a source of the first transistor and a source of the second transistor.

According to one embodiment, an oscillation circuit includes: a ring oscillator; a first transistor having a gate terminal coupled to an output port of the ring oscillator and a drain terminal coupled to a first node; a second transistor having a drain terminal and a gate terminal that are both coupled to the first node; a third transistor having a gate terminal coupled to the first node and a drain terminal coupled to a second node; a fourth transistor having a gate terminal coupled to the first node and a drain terminal coupled to a third node; a fifth transistor having a drain terminal coupled to the second node and a source terminal coupled to the third node; and a voltage buffer having an input port coupled to the second node.

The utility model discloses a clutch detection tool comprising an installation clamp used for fixing a clutch to be detected, an overturning mechanism which is connected with the installation clamp and can drive the installation clamp to rotate, a driving mechanism, and a limiting mechanism which ensures that the center position of the clutch to be detected does not deviate after overturning. In a standby state, the mounting clamp is kept horizontal; the positioning mechanism is selected according to the model of the clutch to be tested, the clutch is fixed on the mounting fixture and vertically inserted into the mounting fixture, the clamping cylinder performs automatic clamping, quick positioning is facilitated, and the mounting fixture and the turnover mechanism are integrated together, so that the mounting time is shortened; the first limiting block in the limiting part can prevent the overturning mechanism from overturning excessively, and when the overturning mechanism collides with the first limiting block, the first buffer can reduce impact force and cooperate with the concentric bearing on the support, so that the clutch to be detected is prevented from deviating to the maximum extent, follow-up butt joint with the load shaft is ensured, the adjustment time is shortened, and the detection precision is ensured.

The invention belongs to the technical field of hoisting equipment, and particularly relates to an intelligent hoisting structure of mechanical electrical automation equipment, which comprises a chassis frame, a rotation driving mechanism, a translation assembly and a sling assembly, the chassis frame is connected with an arranged lower stand column through the rotation driving mechanism, the translation assembly is arranged between the lower stand column and an upper stand column, and the sling assembly is connected with the chassis frame through the rotation driving mechanism. A lifting adjusting mechanism matched with the lifting appliance assembly is arranged on the upper side of the upper stand column. According to the invention, a passive gravity center self-adaptive mechanism in which an inclined slide rail is matched with an inclined slide block is designed in the lifting appliance assembly. After the lifting appliance is connected with lifted equipment, the inclined sliding block automatically slides to the gravity center position of the system under the driving of a gravity component, so that a lifting point is accurately overlapped with the gravity center, and sliding impact is absorbed by the hydraulic buffer. The structure does not need complex transmission parts such as a motor lead screw and closed-loop control, and has the remarkable advantages of being simple in structure, high in reliability and low in maintenance cost.

The invention discloses a starting circuit capable of being automatically turned off for a phase-locked loop oscillator, and belongs to the field of integrated circuits. The starting circuit comprises a reference current source and a starting current source; the starting current source enables a voltage-controlled oscillator in the phase-locked loop to start oscillation from an initial state, and mirror image processing is carried out on the working current of the voltage-controlled oscillator; and after the voltage-controlled oscillator reaches the preset oscillation frequency, the reference current source is used for comparison, so that the starting circuit is automatically closed, and the normal working performance of the phase-locked loop is not influenced. The circuit structure provided by the invention can ensure that the voltage-controlled oscillator starts to oscillate from the initial state of the circuit through the starting current source, and after the phase-locked loop starts to work normally, the starting circuit is automatically closed by utilizing comparison of the reference current source without influencing the normal working performance of the phase-locked loop; the problem that the phase-locked loop enters deadlock and cannot be started due to the fact that the alternating-current coupling buffer is interfered by power supply noise in the starting process of the phase-locked loop is solved.

The invention relates to a W-band low-noise voltage-controlled oscillator based on a transformer resonant cavity and harmonic extraction. The W-band low-noise voltage-controlled oscillator comprises a dual-core in-phase coupled oscillator core, a two-bit switched capacitor bank, a linear variable capacitor bank and an output buffer, the dual-core in-phase coupled oscillator core comprises a transformer resonant cavity and a harmonic extraction network, a fundamental wave oscillation signal is generated in the transformer resonant cavity and is coupled and output to the output buffer, and a high-power second harmonic oscillation signal is generated in the harmonic extraction network and is output as a target oscillation signal; the two-bit switched capacitor bank adopts an HBT switch with excellent high-frequency performance, the tuning range of the oscillator is divided into four sub-bands, and the tuning gain is reduced; the capacitance value of the linearized variable capacitor bank is linearly changed along with the tuning voltage height, and a conversion mechanism of flicker noise is inhibited; and the output buffer realizes load isolation and buffering of the fundamental wave oscillation signal. The voltage-controlled oscillator has low tuning gain and high output power in the W wave band, and excellent phase noise is achieved.

The invention discloses a DC micro-grid power buffer safety control method and device aiming at FDI attack, and relates to the technical field of power electronics and power system control. The method comprises the steps of obtaining a block matrix of a DCmGs system node current equation according to the Kirchhoff's current law; adopting Kron simplification to eliminate internal node voltage, obtaining a relation between a port current vector and a voltage vector, and constructing a small signal model of the port voltage vector; based on a small signal model, a linear mapping relation about disturbance of bus voltage to equivalent input impedance of each power buffer is constructed, modeling and linearization are carried out on energy and adjustable input impedance of each power buffer, a network coupling small signal model is constructed, and a second-order high-gain observer is designed; and if the FDI attack exists in the DCmGs system, an anti-FDI attack elastic control law is designed, so that the closed-loop voltage in the DCmGs system and the energy of a power buffer are quickly converged, and buffeting is inhibited. By adopting the method, the DCmGs system can be prevented from buffeting in an unknown FDI attack scene.

A frequency synthesis circuit includes a first inductor coupled to receive a first input signal at an input frequency, and a second inductor coupled to receive second input signal at the input frequency and out-of-phase relative to the first input signal. The circuit has first and second transistors with control terminals coupled to the first and second inductors, respectively. A first resonant tank of an inductor in parallel with a capacitor is coupled between a power supply terminal and the first transistor. A second resonant tank of an inductor in parallel with a capacitor is coupled between the power supply terminal and the second transistor. The first and second resonant tanks are tuned to a selected harmonic of the input frequency. An injection-locked oscillator has inputs coupled to the first and second transistors.

vibration damper (2) comprising - a damper tube at least partially filled with damping fluid, in which a piston rod is movable back and forth, wherein a working piston is movable along with the piston rod, by which the interior of the damper tube is divided into a working space on the piston rod side and a working space away from the piston rod, - at least one pressure stop buffer (1), wherein the at least one pressure stop buffer (1) comprises an outer contour (4) for at least partial inclusion in a dome bearing housing (3) and a hollow cylindrical basic structure with an inner contour (6) for coaxial arrangement on a piston rod (5) of the vibration damper (2), characterized by the fact that the outer contour (4) of the pressure stop buffer (1) has at least in an area relating to the at least partial reception in the strut bearing housing (3) a three-dimensionally structured surface (7) with several protrusions (8, 8', 8'', 8''') and / or several depressions (9, 9', 9'', 9'''), wherein the multiple protrusions (8, 8', 8'', 8''') and / or depressions (9, 9', 9'', 9''') are at least partially homogeneously distributed, at least in the area of ​​at least partial reception in the strut bearing housing (3), wherein more than 5% of the multiple protrusions (8, 8', 8'', 8''') at least in the area of ​​at least partial reception in the strut bearing housing (3) have a height in the range of 0.2 to 0.3 mm relative to the zero plane of a forming tool with which the pressure stop buffer (1) was manufactured.

The invention relates to a linearity detection system for an input buffer, and the system comprises a main buffer, a terminating resistor unit, an auxiliary buffer, a switched capacitor unit, an observation comparator, and a judgment unit. The input end of the main buffer and the first input end of the terminating resistor unit receive input signals respectively; the second input end of the terminating resistor unit is connected to a first common-mode voltage, the output end of the terminating resistor unit is connected to the input end of the auxiliary buffer, and the output end of the auxiliary buffer and the output end of the main buffer are connected to the input end of the observation comparator through the switched capacitor unit. The output end of the observation comparator is connected to the input end of the judgment unit, and the output end of the judgment unit is connected to the output end of the main buffer; the determination unit is used for determining a determination result for the main buffer and determining a compensation mode. The current linearity state of the main buffer can be rapidly detected in real time and a corresponding compensation mode can be obtained on the premise that a main signal chain is not interfered.

This invention discloses a control circuit based on a hybrid switching timing of relays and thyristors. By connecting the thyristor in parallel with the relay, the thyristor bears the load current before and after the relay is closed, thus avoiding contact arcing. The control unit triggers the thyristor at the AC zero-crossing point, reducing switching losses and electromagnetic interference, and combines an RC snubber circuit with optocoupler isolation to improve reliability. This device can increase the relay lifespan from 20,000 cycles to 500,000 cycles, and its cost is only 1 / 3 that of a solid-state relay, making it particularly suitable for soft-start control of high-current inductive loads.

Solid-state circuit breakers (SSCBs) have been witnessing an impressive progress with the aid of wide bandgap (WBG) devices such as silicon carbide (SiC) MOSFETs. Along with obtaining high efficiency as the result of low on-state resistance, response times have been gaining remarkable achievements in microseconds range. Not only that, the reported successes in control and gate drivers design and incorporating fault detection / location techniques in SSCBs are promising. A MOV-resistive capacitive switch (MOV-RCS) snubber for solid state circuit breakers addresses the following: 1) the MOV degradation issue in DCCBs is solved, 2) the maximum allowable DC bus voltage on DCCBs is extended. The solid state circuit breaker and an active clamping snubber includes a first circuit including a fault current bypass based solid state breaker for low voltage direct current systems.

Solid-state switch array apparatus and methods for digitized plasma magneto-inertial fusion are disclosed herein. A solid-state switch array apparatus for enabling discharge of direct current includes multiple solid-state switches arranged in series and parallel configurations. The apparatus includes corresponding series resistor circuits connected in parallel with each solid-state switch to distribute voltage across the switches and receive constant current flow from a power supply during charging. Snubber circuits including capacitors configured in parallel with each solid-state switch protect against transient back electromotive force during discharge. A ferrite core assembly includes wire fed through ferrite cores wound and connected to gates and cathodes of the solid-state switches. The ferrite core assembly delivers voltage pulses to simultaneously transition all switches to a conducting state in response to discharge from a discharge circuit capacitor, enabling control for plasma generation applications.

Discussed is converter that may include a first inductor connected to a power source at a first node, a second inductor connected to the first inductor at a second node, a third inductor connected to the first inductor at the first node and the second node, a switch connected in series to the second inductor at a third node, a first diode connected to the second inductor and the switch at the third node, a first capacitor connected to the first inductor and the second inductor at the second node and connected to the first diode at a fourth node, a fourth inductor connected to the first diode and the first capacitor at the fourth node, a second diode connected to the fourth inductor at a fifth node, and a resistor connected to the second diode at a sixth node.

The embodiment of the invention discloses a buffer circuit. The buffer circuit comprises a capacitor module and a follower module, wherein one end of the capacitor module inputs a first voltage, the other end of the capacitor module is electrically connected with a first input end of the follower module, a second input end of the follower module inputs a target signal, a power supply end of the follower module inputs a second voltage, and a first output end and a second output end of the follower module respectively output two signals; the capacitor module comprises a capacitor and a switch unit, and the capacitance value of the capacitor module is adjustable. According to the buffer circuit provided by the embodiment of the invention, the power supply rejection ratio of the buffer circuit and the input common-mode rejection ratio can be improved.

An apparatus includes a power converter having a first voltage terminal and a second voltage terminal and including a voltage divider coupled between the second voltage terminal and a voltage supply terminal. The voltage divider has an output. A transconductance amplifier has a first input, a second input, and an output. The first input is coupled to the output of the voltage divider. The second input is coupled to a reference voltage circuit. A first capacitor is coupled between the output of the transconductance amplifier and the voltage supply terminal. A buffer has an input coupled to the output of the transconductance amplifier and has an output. A second capacitor is coupled between the output of the buffer and the second voltage terminal.

Systems, devices, and methods are provided for an improved voltage buffer. Improved voltage buffers may include an output circuit operating in a first voltage domain, and an input circuit operating in a second voltage domain and receiving a reference voltage and feedback signal. The second voltage domain may have a lower voltage than the first voltage domain. A bias circuit coupled between the input and output circuits may bias operation of the output circuit. An error signal from the input circuit may adjust the bias of the output circuit. A level shifting circuit may translate the adjusted bias signal from the second to the first voltage domain. The bias circuit may be controlled according to transistors having opposite VGS temperature curves. Advantageously, a reduced portion of the voltage buffer may be exposed to over-voltage stress, and the voltage buffer may be more resistant to temperature-based fluctuations in output voltage.

The present disclosure relates to voltage-controlled inverters. A voltage-controlled delay buffer includes a number of inverters configured in a cascade structure to receive an input signal from a source circuit and to output an output signal to an output circuit. The inverters include voltage-controlled inverters controlled by a control signal having a first voltage and a second voltage. The voltage-controlled inverters include a PMOS transistor to assist a low-to-high transition of the output signal and an NMOS transistor to assist a high-to-low transition of the output signal. Two variable capacitors, one connected in a forward direction and the other connected in a reverse direction, are used to adjust a delay of a transition of the input signal. Two other variable capacitors, one connected in a forward direction and the other connected in a reverse direction, are used to adjust a delay of a transition of the output signal according to the first voltage and the second voltage.

The application provides a transient enhancement buffer and a gamma voltage generation system, wherein the transient enhancement buffer comprises an input module, an output module and a transient enhancement module connected in sequence; the input module is used for acquiring an amplified signal; the transient enhancement module generates a pull-up coupling signal and a pull-down coupling signal based on a wave of an output signal; and the output module performs coupling enhancement on the amplified signal through the pull-up coupling signal and the pull-down coupling signal, thereby improving the stability of the output signal. Meanwhile, the gamma voltage generation system comprises an amplitude adjustment device, a region division device, a linear output device, a high nonlinearity output device and a low nonlinearity output device; the maximum value of the voltage is determined through the amplitude adjustment device, and the voltage values of three regions are output through the linear output device, the high nonlinearity output device and the low nonlinearity output device, so that the output voltage value is highly coincident with the actual voltage value distribution of the gamma voltage, thereby improving the accuracy.

This invention relates to the field of power electronics technology and discloses a simulation-optimized thyristor RC snubber method and circuit. The method includes: building a precise physical model containing stray parameters in a simulation environment; first, simulating and obtaining turn-off voltage spikes and dv / dt data without the snubber circuit connected; then, connecting an RC network and performing simulation comparisons with multiple sets of parameters for the resistor and capacitor; selecting the optimal RC parameters based on voltage suppression effect, dv / dt limitation, and resistor power consumption, and finally determining the device model. This invention overcomes the coarseness of traditional empirical formulas and the inefficiency of trial and error methods, offering advantages such as high design accuracy, intuitive process, and outstanding efficiency. It effectively avoids problems of conservative parameters or insufficient protection, achieving the best balance between cost, size, and performance while ensuring the safe operation of the thyristor. It is applicable to thyristor protection design in various power electronic systems; it quickly selects the optimal parameter combination that meets the requirements of voltage suppression and dv / dt limitation, shortening the product development cycle.

The purpose of the technology of the present disclosure is to provide a technology for preventing cracks from occurring in a projectile or in a projectile target. This sliding structure comprises: a housing that contains a housing space extending in one direction; an igniter that is provided to the housing; a projectile that is disposed in the housing space, that is launched from one end side of the housing space by means of energy received from the igniter, and that slides along the extension direction of the housing space; and a buffer material that is provided to a terminal end regulation part for regulating the sliding terminus position of the projectile.