398 results about "Snubber" patented technology

A control device (100) for controlling a number N, with N ≥ 1, of actuators (200) for actuating N optical elements of an optical system, comprising a control node (K2) coupling to the actuator (200) for providing a control voltage (V2) for the actuator (200), an amplifier (110) configured to receive a supply voltage (V1) provided at an input node (K1) and to provide an output voltage (V3) at an output node (K3), wherein the amplifier (110) comprises a plurality M, with M ≥ 2, of current sources (111, 112) comprising at least one charge-controlled current source (112) and a holding capacitor (113) for maintaining the level of the provided output voltage (V3), and a buffer coupled between the output node (K3) and the control node (K2). (120), which is designed to,to decouple the control node (K2) from the output node (K3) and to provide the control voltage (V2) for the actuator (200) based on the level of the output voltage (V3) of the holding capacitor (113).

A two-transistor flyback topology in which a portion of leakage inductance energy in the transformer is extracted and used to obtain zero voltage switching on both switching elements in any operating conditions, and in which a third low power switch eliminates parasitic oscillations and allows an operation at a determined frequency. In this topology, there are no switching losses and there are no spikes or glitches in any switching node, eliminating the need for snubbers. This topology is an “ideal two transistor flyback topology.”

The invention relates to the technical field of transformers, in particular to a power electronic transformer with a shielding structure, which mainly comprises a transformer body, a radiator is fixedly mounted on the side surface of the transformer body, a cooling fan is fixedly mounted at the end part of the radiator, and a weak current box is fixedly mounted at the end part of the transformer body. Double oil mist separation is achieved through the deoiler, one is that spiral ascending airflow is formed through guiding of the jet pipe, oil mist in gas is removed according to the centrifugal demisting principle, and the other is that residual oil mist in the gas is secondarily intercepted through the filter element pipe, so that the oil mist in respiratory airflow can be effectively removed, the oil mist interception efficiency is remarkably improved, and the oil mist separation efficiency is greatly improved. Meanwhile, the elastic membrane of the buffer can absorb sudden pressure change of the oil conservator through elastic deformation, so that the pressure fluctuation amplitude is reduced when the load changes suddenly, pulverization or structural damage of the drying agent caused by strong airflow impact is avoided, it is ensured that the moisture absorption drying agent is always in a clean and stable working environment, and the efficient dehumidification capacity is maintained.

The invention discloses a low-power-consumption small-area on-chip temperature sensor based on an MOS tube and a method thereof. Comprising a temperature sensing circuit and an analog-to-digital conversion circuit which are connected with each other, the temperature sensing circuit is used for generating a voltage signal related to the temperature and outputting the voltage signal to the analog-to-digital conversion circuit to achieve digital quantization of the temperature, and the output end of a CTAT branch is connected to the input end of a switched capacitor amplifier through a buffer. The output end of the switched capacitor amplifier is connected to the non-inverting input end of the comparator, the output end of the PTAT branch is connected to the inverting input end of the comparator, the output end of the comparator is connected with the input end of the successive approximation logic unit, and the output end of the successive approximation logic unit is connected to the switched capacitor amplifier. According to the temperature sensing circuit structure, the problem of power supply sensitivity existing when voltage is generated is effectively solved, reference signals do not need to be additionally generated in the quantization process, and the problem of error accumulation is avoided.

A triple-active bridge (TAB) converter and methods to optimize the same is disclosed. The TAB converter includes a high-frequency three-winding transformer and three active full bridges, each coupled to the high-frequency transformer through a different passive network. The converter also includes a centralized controller providing gating pulses to semiconductor switches within the active full bridges, a power pulsating buffer (PPB) configured to reduce capacitor requirements on the DC port, and an unfolder stage to convert rectified AC voltage to a pure sine wave. The centralized controller may optimize performance by varying at least one of a switching frequency, a duty cycle of bridge voltages, and a phase shift between bridge voltages. The PPB may include a buck active power decoupler with a half-bridge, inductor, and capacitors, and also a primary full bridge and a power transfer impedance block.

Circuits and methods are provided for an input hysteresis buffer that includes a voltage limiting unit, a voltage detecting unit connected to the voltage limiting unit, and a supply tracking bias unit connected to the voltage detecting unit. The voltage liming unit comprises a first voltage limiting unit and a second voltage limiting unit. The voltage detecting unit comprises a first voltage detecting unit configured to detect the presence of a first threshold voltage in an input signal, and a second voltage detecting unit configured to detect the presence of a second threshold voltage in the input signal. The supply tracking bias unit is configured to supply a control signal to the voltage detecting unit.

The invention discloses a bidirectional power electronic switch, a hybrid DC circuit breaker and a control method. The bidirectional power electronic switch comprises a diode bridge module, a buffer circuit, a voltage limiting circuit and an impedance adjusting circuit. The impedance adjusting circuit is connected in parallel with two ends of the diode bridge module; the buffer circuit is connected in parallel with a breaking electronic switch in the diode bridge module; the voltage limiting circuit is connected in parallel with two ends of the breaking electronic switch; the diode bridge module controls the breaking electronic switch to switch current according to a breaking instruction of the power system; when the breaking electronic switch is locked, the buffer circuit suppresses the voltage and current changes of the breaking electronic switch in the switching process, the voltage limiting circuit limits the overvoltage level of the breaking electronic switch, and the impedance adjusting circuit reduces the oscillation frequency. The impedance adjusting circuit reduces the oscillation frequency, reduces the requirement for the reverse recovery speed of the diode, reduces the stress of the diode bridge type module, and enables a conventional common diode to be not liable to be damaged.

A power semiconductor circuit is provided for clamping the voltage across the circuit during a fault. The circuit may include a power semiconductor switch, a clamping branch coupled in parallel with the power semiconductor switch, a snubber branch coupled in parallel with the power semiconductor switch and the clamping branch, and an isolation switch coupled in series with the power semiconductor switch. The clamping branch may include a first capacitor and a surge arrester coupled in parallel with a first resistor. The first capacitor may be coupled in series with the surge arrester and the first resistor. The snubber branch may include a second capacitor, a plurality of resistors, and a diode.

The invention relates to a buffer and an integrated circuit. The buffer includes: an operational amplifier; the first end of the voltage-voltage feedback network is coupled to the positive phase / negative phase input end of the operational amplifier; the first end of the isolation resistor is coupled to the output end of the buffer; the first group of switches and the second group of switches are controlled to be closed when the first capacitive load is driven, the second group of switches are disconnected when the second capacitive load is driven, and the first group of switches are disconnected and the second group of switches are closed when the second capacitive load is driven; in the first load, the output end of the operational amplifier is coupled to the output end of the buffer through at least one switch in the first group of switches, and the second end of the voltage-voltage feedback network is coupled to the output end of the buffer through at least one switch in the first group of switches. In the second load, the output end of the operational amplifier is coupled to the second end of the isolation resistor through at least one switch in the second group of switches, and the second end of the voltage-voltage feedback network is coupled to the output end of the operational amplifier through at least one switch in the second group of switches.

Each of stages of a gate driver includes a first pull-up control circuit applying a previous carry signal to a first control node, a buffer circuit outputting a gate clock signal, and a pull-down circuit outputting a second low voltage. The first pull-up control circuit includes a fourth-first transistor including a control electrode connected to a previous carry input node, a first electrode connected to the previous carry input node, and a second electrode connected to a second control node, a fourth-second transistor including a control electrode connected to the previous carry input node, a first electrode connected to the second control node, and a second electrode connected to the first control node, a first inter-node capacitor connected between the previous carry input node and the second control node, and a second inter-node capacitor connected between the second control node and the first control node.

The invention relates to the technical field of emergency protection circuits, and provides an EEG pre-amplification circuit and brain-computer interface equipment. The buffers are connected in parallel, and the corresponding input ends of the buffers are connected with the electrode sensors; the buffer is a four-channel unity gain buffer; the input end of the electrostatic protection diode array is connected with the positive electrode and the negative electrode of a preset power supply, and the input end is further connected between the corresponding input ends of the buffers and the electrode sensor; the first filtering capacitor is connected with the first voltage stabilizing capacitor in parallel, the second filtering capacitor is connected with the second voltage stabilizing capacitor in parallel, the input ends of the first filtering capacitor and the first voltage stabilizing capacitor are connected with the positive electrode of a preset power supply, and the input ends of the first filtering capacitor and the first voltage stabilizing capacitor are connected with a preset grounding end; the input ends of the first filtering capacitor and the first voltage stabilizing capacitor are connected with the negative electrode of the preset power supply, and the input ends are connected with the preset grounding end, so that the power supply noise corresponding to the preset power supply is minimized.

A current measurement system, comprising a plurality of parallel sensing circuits, each sensing circuit configured to measure a respective range of voltage corresponding to a current through a load, wherein each sensing circuit is triggered to initiate measurement of a voltage across the load in response to a buffer current through a common buffer reaching a respective threshold, a buffer circuit for inputting a virtual ground voltage or a virtual ground current to the load and to the plurality of parallel sensing circuits, the virtual ground voltage corresponding to the voltage across the load or the current through the load, and a processor coupled to the plurality of parallel sensing circuits, wherein the processor is configured to combine data representing voltage measurements from the plurality of parallel sensing circuits to determine the current through the load.

A micro-electrical-mechanical system (MEMS) piezoelectric autofocus actuator includes: a fixed stage that is stationary; a moving stage that is movable along a travel direction (Z-axis); a motion control system coupling the fixed stage to the moving stage and including motion control springs; piezoelectric bending elements configured to deform the motion control system and thereby control a precise position of the moving stage relative to the fixed stage; and integrated piezoelectric motion stops that are actuatable to restrict out-of-plane motion of the moving stage along the travel direction (Z-axis). In another example, a MEMS piezoelectric autofocus actuator includes integrated motion limiting snubbers configured to limit in-plane motion of the moving stage; integrated motion stoppers configured to restrict out-of-plane motion of the moving stage along the travel direction (Z-axis); and assembled motion stoppers disposed in assembly slots and configured to restrict out-of-plane motion of the moving stage along the travel direction (Z-axis).

According to the buffer output control circuit, the buffer output control method and the LDO circuit applying the buffer output control circuit, the second control signal generation circuit and the second transistor are arranged, and in the dropout state, the second control signal generation circuit generates the high-level second control signal based on the error amplification signal to control the second transistor to be switched on; the potential of the control end of the power tube is pulled down to the ground, the problem of voltage loss on the control end of the power tube in the prior art is avoided, the power tube can be completely conducted in the state, the output voltage changes along with the input voltage, the voltage difference between the output voltage and the input voltage is small, and then the system loss can be reduced; and compared with the prior art, the power tube with a smaller area can be adopted to realize the same technical index. When the output voltage is in a voltage stabilization state, the second control signal generation circuit generates a low-level second control signal based on the error amplification signal to control the second transistor to be turned off, namely, in the state, the buffer output control circuit does not affect the work of the power tube.

The invention relates to a load capacitance optimization method and system based on dichotomy and dynamic variable control. When load capacitance reduction processing is carried out on each load capacitance violation signal line, the method comprises the following steps: extracting load capacitance basic characteristics of the load capacitance violation signal line, and determining load capacitance formation characteristics of the load capacitance violation signal line based on the extracted load capacitance basic characteristics, and selecting a buffer insertion state corresponding to a load capacitance forming characteristic based on the load capacitance forming characteristic of the current load capacitance violation signal line, and performing buffer insertion processing on the current load capacitance violation signal line based on the selected buffer insertion state. According to the method, the forming state of the heavy-load capacitor can be accurately positioned, the buffer is inserted and arranged according to the forming state of the heavy-load capacitor, and the risks of time sequence violation, wiring congestion and power consumption exceeding are avoided while the load capacitance is reduced.

The invention discloses an LDO (Low Dropout Regulator) with a load transient response enhancement circuit and electronic equipment, and belongs to the technical field of integrated circuits. The circuit comprises an error amplifier, a buffer, a power tube, a feedback circuit, a compensation circuit and an LTRE module. The output end EAO of the error amplifier is connected with the grid electrode of the power tube through the buffer, the error amplifier compares reference voltage with feedback voltage, an EAO signal adjusts the conduction degree of the power tube, and the output voltage of the LDO is kept stable; the compensation circuit comprises an NMOS tube and a capacitor. The grid of the NMOS tube is connected with the input end of the buffer, the drain is connected with one end of the capacitor, and the source is grounded; the other end of the capacitor is connected with the EAO; one end of a delay circuit in the LTRE module is connected with the input end of the buffer, and the other end of the delay circuit is connected with the grid electrode of the NMOS tube, so that the grid electrode voltage is delayed to rise when the buffer voltage rises. The circuit has the advantages of low working voltage, low voltage drop and low static power consumption, and the transient response can be enhanced when the load current is increased or decreased.

The application discloses a kind of electrical equipment performance comprehensive test device, including comprehensive test box and walking base, the top of the walking base is fixedly connected with support, the top of the support is rotatably connected with suspension frame, and the rotating axis of the suspension frame and comprehensive test box is horizontal.The application is provided with support, suspension frame, top protection trigger frame and side protection trigger frame, wherein the comprehensive test box is hung at the free end of the suspension frame, the top of the support is rotatably connected with the suspension frame, the side protection trigger frame is arranged on the two sides of the comprehensive test box, and the top protection trigger frame is arranged on the top, then the clutch control group and the winding buffer are arranged on the support, when the left and right sides or the top of the comprehensive test box is impacted, the suspension frame will swing down to drive the comprehensive test box to buffer subsidence, away from the impact area, the setting has impact displacement self-protection function, which greatly improves the self-protection performance of the comprehensive test box.

A signal transmission circuitry is a circuitry that transmits a signal from a first system on a transmission side to a second system on a reception side. The first system includes an inductor, a first current source controlled by a first switch, a second current source connected in series with the first current source via the inductor and controlled by a second switch, a third switch connected in parallel with the first current source and controlling connection with a ground point, and a fourth switch connected in parallel with the second current source and controlling connection with the ground point.

In certain aspects, a voltage buffer includes a first source follower having an input and an output, and a second source follower having an input and an output. The voltage buffer also includes a first transistor, wherein a drain of the first transistor is coupled to the output of the first source follower, and a first coupling capacitor coupled between a gate of the first transistor and the input of the second source follower. The voltage buffer also includes a second transistor, wherein a drain of the second transistor is coupled to the output of the second source follower, and a second coupling capacitor coupled between a gate of the second transistor and the input of the first source follower. The voltage buffer further includes a current source coupled to a source of the first transistor and a source of the second transistor.

According to one embodiment, an oscillation circuit includes: a ring oscillator; a first transistor having a gate terminal coupled to an output port of the ring oscillator and a drain terminal coupled to a first node; a second transistor having a drain terminal and a gate terminal that are both coupled to the first node; a third transistor having a gate terminal coupled to the first node and a drain terminal coupled to a second node; a fourth transistor having a gate terminal coupled to the first node and a drain terminal coupled to a third node; a fifth transistor having a drain terminal coupled to the second node and a source terminal coupled to the third node; and a voltage buffer having an input port coupled to the second node.

The utility model discloses a clutch detection tool comprising an installation clamp used for fixing a clutch to be detected, an overturning mechanism which is connected with the installation clamp and can drive the installation clamp to rotate, a driving mechanism, and a limiting mechanism which ensures that the center position of the clutch to be detected does not deviate after overturning. In a standby state, the mounting clamp is kept horizontal; the positioning mechanism is selected according to the model of the clutch to be tested, the clutch is fixed on the mounting fixture and vertically inserted into the mounting fixture, the clamping cylinder performs automatic clamping, quick positioning is facilitated, and the mounting fixture and the turnover mechanism are integrated together, so that the mounting time is shortened; the first limiting block in the limiting part can prevent the overturning mechanism from overturning excessively, and when the overturning mechanism collides with the first limiting block, the first buffer can reduce impact force and cooperate with the concentric bearing on the support, so that the clutch to be detected is prevented from deviating to the maximum extent, follow-up butt joint with the load shaft is ensured, the adjustment time is shortened, and the detection precision is ensured.

The invention belongs to the technical field of hoisting equipment, and particularly relates to an intelligent hoisting structure of mechanical electrical automation equipment, which comprises a chassis frame, a rotation driving mechanism, a translation assembly and a sling assembly, the chassis frame is connected with an arranged lower stand column through the rotation driving mechanism, the translation assembly is arranged between the lower stand column and an upper stand column, and the sling assembly is connected with the chassis frame through the rotation driving mechanism. A lifting adjusting mechanism matched with the lifting appliance assembly is arranged on the upper side of the upper stand column. According to the invention, a passive gravity center self-adaptive mechanism in which an inclined slide rail is matched with an inclined slide block is designed in the lifting appliance assembly. After the lifting appliance is connected with lifted equipment, the inclined sliding block automatically slides to the gravity center position of the system under the driving of a gravity component, so that a lifting point is accurately overlapped with the gravity center, and sliding impact is absorbed by the hydraulic buffer. The structure does not need complex transmission parts such as a motor lead screw and closed-loop control, and has the remarkable advantages of being simple in structure, high in reliability and low in maintenance cost.

The invention discloses a starting circuit capable of being automatically turned off for a phase-locked loop oscillator, and belongs to the field of integrated circuits. The starting circuit comprises a reference current source and a starting current source; the starting current source enables a voltage-controlled oscillator in the phase-locked loop to start oscillation from an initial state, and mirror image processing is carried out on the working current of the voltage-controlled oscillator; and after the voltage-controlled oscillator reaches the preset oscillation frequency, the reference current source is used for comparison, so that the starting circuit is automatically closed, and the normal working performance of the phase-locked loop is not influenced. The circuit structure provided by the invention can ensure that the voltage-controlled oscillator starts to oscillate from the initial state of the circuit through the starting current source, and after the phase-locked loop starts to work normally, the starting circuit is automatically closed by utilizing comparison of the reference current source without influencing the normal working performance of the phase-locked loop; the problem that the phase-locked loop enters deadlock and cannot be started due to the fact that the alternating-current coupling buffer is interfered by power supply noise in the starting process of the phase-locked loop is solved.

The utility model discloses a flyback switching power supply control circuit, which comprises a PFC (Power Factor Correction) circuit, the primary side alternating current filtering and rectifying circuit is connected in series with the PFC circuit; a secondary side filtering and rectifying circuit; the common mode inductor TF1 is connected to the secondary side filtering and rectifying circuit; the circuit further comprises at least two transformers and RCD absorption circuits connected with the transformers respectively, the input ends of the transformers and the RCD absorption circuits are connected with the PFC circuit, the RCD absorption circuits are connected in series, and the output ends of the transformers are connected to the secondary side filtering and rectifying circuit. According to the high-power flyback circuit, heating of a single transformer can be greatly reduced, heat treatment is easier, the problems that a high-power flyback circuit transformer is high in leakage inductance and the voltage stress of an MOS tube is not easy to solve are solved, meanwhile, the manufacturing cost of a 200-600W switching power supply can be reduced, and the circuit structure is simpler and more convenient.

The invention relates to a W-band low-noise voltage-controlled oscillator based on a transformer resonant cavity and harmonic extraction. The W-band low-noise voltage-controlled oscillator comprises a dual-core in-phase coupled oscillator core, a two-bit switched capacitor bank, a linear variable capacitor bank and an output buffer, the dual-core in-phase coupled oscillator core comprises a transformer resonant cavity and a harmonic extraction network, a fundamental wave oscillation signal is generated in the transformer resonant cavity and is coupled and output to the output buffer, and a high-power second harmonic oscillation signal is generated in the harmonic extraction network and is output as a target oscillation signal; the two-bit switched capacitor bank adopts an HBT switch with excellent high-frequency performance, the tuning range of the oscillator is divided into four sub-bands, and the tuning gain is reduced; the capacitance value of the linearized variable capacitor bank is linearly changed along with the tuning voltage height, and a conversion mechanism of flicker noise is inhibited; and the output buffer realizes load isolation and buffering of the fundamental wave oscillation signal. The voltage-controlled oscillator has low tuning gain and high output power in the W wave band, and excellent phase noise is achieved.

The invention discloses a DC micro-grid power buffer safety control method and device aiming at FDI attack, and relates to the technical field of power electronics and power system control. The method comprises the steps of obtaining a block matrix of a DCmGs system node current equation according to the Kirchhoff's current law; adopting Kron simplification to eliminate internal node voltage, obtaining a relation between a port current vector and a voltage vector, and constructing a small signal model of the port voltage vector; based on a small signal model, a linear mapping relation about disturbance of bus voltage to equivalent input impedance of each power buffer is constructed, modeling and linearization are carried out on energy and adjustable input impedance of each power buffer, a network coupling small signal model is constructed, and a second-order high-gain observer is designed; and if the FDI attack exists in the DCmGs system, an anti-FDI attack elastic control law is designed, so that the closed-loop voltage in the DCmGs system and the energy of a power buffer are quickly converged, and buffeting is inhibited. By adopting the method, the DCmGs system can be prevented from buffeting in an unknown FDI attack scene.

A frequency synthesis circuit includes a first inductor coupled to receive a first input signal at an input frequency, and a second inductor coupled to receive second input signal at the input frequency and out-of-phase relative to the first input signal. The circuit has first and second transistors with control terminals coupled to the first and second inductors, respectively. A first resonant tank of an inductor in parallel with a capacitor is coupled between a power supply terminal and the first transistor. A second resonant tank of an inductor in parallel with a capacitor is coupled between the power supply terminal and the second transistor. The first and second resonant tanks are tuned to a selected harmonic of the input frequency. An injection-locked oscillator has inputs coupled to the first and second transistors.

The utility model discloses a switching power supply and a power converter. The switching power supply comprises a transformer, a controller and a switching circuit, the switching circuit comprises at least two switching tubes which are connected in series; the first end of the primary winding of the transformer is connected with a direct-current source; the second end of the primary winding of the transformer is grounded through at least two switching tubes which are connected in series; a secondary winding of the transformer is used for supplying power to a load; the control end of the switching circuit is connected with the controller; the switching circuit further comprises absorption circuits corresponding to the switching tubes; the first end of the absorption circuit is connected with the drain electrode of the corresponding switch tube, and the second end of the absorption circuit is connected with the source electrode of the corresponding switch tube; the controller controls the on-off state of the at least two series-connected switch tubes. The plurality of switch tubes connected in series can divide the voltage, and the overheating and breakdown of the switch tubes caused by the reflection voltage and the peak voltage are avoided. And each switch tube adopts a switch tube with a common voltage-withstanding grade. And the absorption circuit balances the voltage of each switching tube and absorbs the voltage peak, thereby achieving a voltage-sharing effect.

vibration damper (2) comprising - a damper tube at least partially filled with damping fluid, in which a piston rod is movable back and forth, wherein a working piston is movable along with the piston rod, by which the interior of the damper tube is divided into a working space on the piston rod side and a working space away from the piston rod, - at least one pressure stop buffer (1), wherein the at least one pressure stop buffer (1) comprises an outer contour (4) for at least partial inclusion in a dome bearing housing (3) and a hollow cylindrical basic structure with an inner contour (6) for coaxial arrangement on a piston rod (5) of the vibration damper (2), characterized by the fact that the outer contour (4) of the pressure stop buffer (1) has at least in an area relating to the at least partial reception in the strut bearing housing (3) a three-dimensionally structured surface (7) with several protrusions (8, 8', 8'', 8''') and / or several depressions (9, 9', 9'', 9'''), wherein the multiple protrusions (8, 8', 8'', 8''') and / or depressions (9, 9', 9'', 9''') are at least partially homogeneously distributed, at least in the area of ​​at least partial reception in the strut bearing housing (3), wherein more than 5% of the multiple protrusions (8, 8', 8'', 8''') at least in the area of ​​at least partial reception in the strut bearing housing (3) have a height in the range of 0.2 to 0.3 mm relative to the zero plane of a forming tool with which the pressure stop buffer (1) was manufactured.

The invention relates to a linearity detection system for an input buffer, and the system comprises a main buffer, a terminating resistor unit, an auxiliary buffer, a switched capacitor unit, an observation comparator, and a judgment unit. The input end of the main buffer and the first input end of the terminating resistor unit receive input signals respectively; the second input end of the terminating resistor unit is connected to a first common-mode voltage, the output end of the terminating resistor unit is connected to the input end of the auxiliary buffer, and the output end of the auxiliary buffer and the output end of the main buffer are connected to the input end of the observation comparator through the switched capacitor unit. The output end of the observation comparator is connected to the input end of the judgment unit, and the output end of the judgment unit is connected to the output end of the main buffer; the determination unit is used for determining a determination result for the main buffer and determining a compensation mode. The current linearity state of the main buffer can be rapidly detected in real time and a corresponding compensation mode can be obtained on the premise that a main signal chain is not interfered.