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29643 results about "Bus" patented technology
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In computer architecture, a bus (a contraction of the Latin omnibus) is a communication system that transfers data between components inside a computer, or between computers. This expression covers all related hardware components (wire, optical fiber, etc.) and software, including communication protocols.
Method and apparatus for managing server load
InactiveUS6922724B1Resource allocationMultiple digital computer combinationsBalancing networkTime information
The present invention relates to a method and apparatus for managing and balancing the load of each of the servers in the network. In one aspect, the invention relates to an apparatus for managing server load in a networked system of servers. The apparatus includes a dynamic store storing run-time information associated with a plurality of servers in a server farm. The apparatus also includes an event bus. The apparatus also includes a load management subsystem in communication with the dynamic store via the event bus. The load management subsystem receives a request from the event bus to identify a server and transmits a message to the event bus that includes an address of an identified server based on information from the dynamic store.
Owner:CITRIX SYST INC
User interface for managing storage in a storage system coupled to a network
Owner:EMC IP HLDG CO LLC
Method and apparatus for operating the internet protocol over a high-speed serial bus
InactiveUS6219697B1Efficiently and correctly determineDigital computer detailsTransmissionInternet protocol suiteTransport layer
A method and apparatus of integrating the IEEE 1394 protocol with the IP protocol in which the IEEE 1394 high speed serial bus operates as the physical and link layer medium and the IP operates as the transport layer. There are differences in the protocols which require special consideration when integrating the two protocols. The IEEE 1394 configures packets with memory information and the IP operates under channel based I / O thereby necessitating a modification of the data transfer scheme to accomplish IP transfers over the IEEE 1394. Further, due to differences in packet headers, the IEEE 1394 packet header is modified to encapsulate IP packets. Moreover, in order to determine network packets quickly and efficiently, an identifier is inserted in each network packet header indicating that the packet should be processed by the network. Finally, in order to support the ability to insert or remove nodes on the network without a loss of data, the IP interface must not be disturbed. This is accomplished by maintaining constant IP addresses across bus resets which are caused by insertion or removal of nodes from the network.
Owner:HEWLETT-PACKARD ENTERPRISE DEV LP
Malicious attack detection and analysis
A system for characterizing malicious activity in an intelligent utility grid system includes a system storage in which to store a database including a plurality of rules. A collector is operable to collect and store in the system storage information-technology (IT) data including IT-related activity from the intelligent grid system. A complex event processing (CEP) bus is operable to receive non-IT data including location-specific event data from a plurality of electronic sources, the CEP bus further operable to disregard the non-IT data failing to meet a predetermined level of relevance to one of a plurality of risk-related events. A processor is operable to apply the plurality of rules to the relevant non-IT data to: associate an undesired event with reference to the IT-related activity; and determine a probability that the undesired event is indicative of malicious activity. The processor further applies a risk characterization to the undesired event based on the probability and the IT-related activity.
Owner:ACCENTURE GLOBAL SERVICES LTD
Configurable Modular Networking System and Method Thereof
InactiveUS20070168499A1Digital computer detailsComputer security arrangementsModularityNetwork module
In one embodiment according to the principle of this present invention, a communication IC embeds a plurality of network function modules; at least one hardware module interface provides a plurality of interfaces where a plurality of hardware modules can be coupled, said hardware modules comprise secret keys corresponding to their functionalities: a second memory device stores a plurality of software modules and at least one software key, said software key corresponds to at least one function of said software modules: a general network module couples to said bus and comprises general module key corresponding to their functionalities in the system: and / or a first memory device stores at least one hardware key, said hardware key corresponds to at least one of said network function modules. By varying the combination of said hardware modules, network function modules, general module key, and software modules that are configured and enabled or disabled by said secret keys, hardware key, general module and software key, the network may expand or contract according to the need of a networking environment on a single platform.
Owner:ACENET TECH
Error control coding for orthogonal differential vector signaling
ActiveUS20110299555A1Error preventionTime-division multiplexForward error correctionComputer science
Using a transformation based, at least in part, on a non-simple orthogonal matrix, data may be transmitted over a data bus in a manner that is resilient to one or more types of signal noise, that does not require a common reference at the transmission and acquisition points, and / or that has a pin-efficiency that is greater than 50% and may approach that of single-ended signaling. Such transformations may be implemented in hardware in an efficient manner. The transformation may be combined with methods from forward error correction to lower the required transmission power.
Owner:ECOLE POLYTECHNIQUE FEDERALE DE LAUSANNE (EPFL)
Enabling separate chat and selective enablement of microphone
Two different and separate audio data streams are processed through a personal computer (PC) system or other computing device so that the separate and distinct audio data streams are heard through separate sound transducers. In a preferred embodiment, chat messages received over a network during execution of a multiplayer game are processed separately from sounds produced by the multiplayer game, enabling a user to hear the game sounds from speakers, separate and distinct from verbal chat messages, which are heard through earphone(s). The earphone(s) are included in a headset, as well as a microphone that enables the user to produce verbal data that are conveyed to a hardware control unit that is connected to the PC system through a universal serial bus (USB) port. The chat audio data are converted into an analog audio signal that is heard by the user in the headphone(s) and is spatially separate and distinct from the game audio data heard through the speakers. Included on the control unit are switches that enable the user to selectively direct verbal data either to the chat session or to a voice recognition engine that converts the verbal data into commands used for controlling the game.
Owner:MICROSOFT TECH LICENSING LLC
Ring bus structure and its use in flash memory systems
ActiveUS8375146B2Reduce capacitanceIncrease working frequencyMultiple digital computer combinationsElectric digital data processingSystem controllerBus
A system and integrated circuit chips used in the system utilize a bus in the form of a ring to interconnect nodes of individual components for transfer of data and commands therebetween. An example system described is a memory having one or more re-programmable non-volatile memory cell arrays connected to each other and to a system controller by a ring bus.
Owner:SANDISK TECH LLC
Computer system with storage device mapping input/output processor
InactiveUS6195730B1Memory adressing/allocation/relocationUnauthorized memory use protectionVirtualizationData transmission
An input / output processor provides device virtualization "on-board" through the use of a dedicated IO cache memory. A computer system includes at least one host processor and associated main memory each with access to a system bus. Each input / output processor is also connected to the system bus through an expansion bus. IO adapters within the input / output processor each connect at least one storage device to the expansion bus. Also connected to the expansion bus is the cache memory and a control logic. The control logic receives a data transfer request from a requesting host processor. The data transfer request is mapped to a cache device object. The cache device object has associated data maintained in the cache memory. If any storage device is required for the data transfer, the data transfer request is mapped to the storage device capable of servicing the request. A location in cache memory is determined based on the mapped cache device object. The data transfer is performed based on the location and, if needed, the determined storage devices. This provides the host computer with a virtual view of the storage devices.
Owner:ORACLE INT CORP
Memory buffers for merging local data from memory modules
InactiveUS20060195631A1Input/output for user-computer interactionDigital data processing detailsShift registerMultiplexing
An integrated circuit to serialize local data and selectively merge it with serialized feed-through data into a serial data stream output that includes a parallel-in-serial-out (PISO) shift register, a multiplexer, and a transmitter. The PISO shift register serializes parallel data on a local data bus into serialized local data. The multiplexer selectively merges serialized local data and feed-through data into a serial data stream. The transmitter drives the serial data stream onto a serial data link. In another embodiment of the invention, a method for a memory module includes receiving an input serial data stream; merging local frames of data and feed-through frames of data together into an output serial data stream in response to a merge enable signal; and transmitting the output serial data stream on a northbound data output to a next memory module or a memory controller. Other embodiments of the invention are disclosed and claimed.
Owner:INTEL CORP
Game talk service bus
InactiveUS20080032801A1Overcomes rapid obsolescenceMultiple digital computer combinationsApparatus for meter-controlled dispensingThird partyPrivate network
A service-oriented bus for distributed gaming systems allowing gaming machines, servers, workstations, mobile PCs, handheld devices and automatic telling machines to talk together over a network. The game service bus provides a publish-and-subscribe message bus over a private network within a gaming property and / or over the public Internet across several properties. The service bus framework allows participating communicating end points to publish services or subscribe to services in a simple and standardized high level fashion, thereby enabling the devices to understand one-another, thus“talk” together. The “talking together” paradigm is rather appropriate, as it emphasizes the value that the service bus brings to a complex distributed casino gaming system that may include thousands of devices manufactured by dozens of vendors. Gaming machines may talk together in a peer-fashion over the service bus, which is well suited for multiplayer gaming. The service-oriented bus allows third party ultra-specialized vendors to offer dazzling plug-in services directly on the casino floor, such as automated geo-localized logistic support and other geo-localized services.
Owner:IGT
Method and apparatus for interfacing multiple peripheral devices to a host computer
InactiveUS6263392B1Discourage and prevent useUnauthorized useProgram loading/initiatingVideo gamesCredit cardJoystick
A method and an apparatus to interface multiple peripheral devices to a host computer is provided. An interface control module located in a multi-user computer game arcade system interfaces a host computer via a Universal Serial Bus (USB) to one or more joysticks, steering wheels, trackballs, coin op / bill counters, credit card readers and / or optical guns. A set of connectors allows the game builder or player to interface a variety of input peripherals to the interface control module. The interface control module recognizes the HID type of the input peripheral by the type of the selected connector, and then provides HD reports that describe each input device to the HID compliant software system of the host computer. The interface control module may support 127 HID peripherals. A watchdog function of the interface control module detects host computer malfunctions and crashes, and boots the host computer while retaining coin credit input data received proximate to and during the malfunction and recovery.
Owner:ACTIVISION PUBLISHING
High bandwidth data transport system
InactiveUS7376191B2High bandwidthIncrease data rateModulated carrier system with waveletsColor television with pulse code modulationComputer hardwareHigh bandwidth
The present invention provides for a methods, system, and apparatus relating to data transmission. One method of the present invention includes representing data using at least one pulse based on a Gaussian wave form, sending the at least one pulse over an electrically conductive guided media, and recovering the data from the at least one pulse. The present invention can be used in conjunction with telephony applications, cable tv applications, and data bus applications.
Owner:LIGHTWAVES SYST
Methods and systems for the industrial internet of things
ActiveUS20180188704A1Improve signal-to-noise ratioLow sampling rateVibration measurement in solidsMachine part testingData streamData acquisition
The system generally includes a crosspoint switch in the local data collection system having multiple inputs and multiple outputs including a first input connected to the first sensor and a second input connected to the second sensor. The multiple outputs include a first output and a second output configured to be switchable between a condition in which the first output is configured to switch between delivery of the first sensor signal and the second sensor signal and a condition in which there is simultaneous delivery of the first sensor signal from the first output and the second sensor signal from the second output. Each of multiple inputs is configured to be individually assigned to any of the multiple outputs. Unassigned outputs are configured to be switched off producing a high-impedance state. The local data collection system includes multiple multiplexing units and multiple data acquisition units receiving multiple data streams from multiple machines in the industrial environment. The local data collection system includes distributed complex programmable hardware device (CPLD) chips each dedicated to a data bus for logic control of the multiple multiplexing units and the multiple data acquisition units that receive the multiple data streams from the multiple machines in the industrial environment. The local data collection system is configured to manage data collection bands.
Owner:STRONG FORCE IOT
Control of access to a memory by a device
ActiveUS20040177261A1Prevent unauthorized accessAvoid it happening againMemory adressing/allocation/relocationDigital computer detailsComputer hardwareSecurity domain
The present invention provides a data processing apparatus and method for controlling access to a memory. The data processing apparatus has a secure domain and a non-secure domain, in the secure domain the data processing apparatus having access to secure data which is not accessible in the non-secure domain. The data processing apparatus comprises a device coupled to a memory via a device bus, and operable, when an item of data in the memory is required by the device, to issue onto the device bus a memory access request pertaining to either the secure domain or the non-secure domain. The memory is operable to store data required by the device, and contains secure memory for storing secure data and non-secure memory for storing non-secure data. In accordance with the present invention, the data processing apparatus further comprises partition checking logic coupled to the device bus and operable whenever the memory access request as issued by the device pertains to the non-secure domain, to detect if the memory access request is seeking to access the secure memory and upon such detection to prevent the access specified by that memory request. This approach significantly improves the security of data contained within a secure portion of memory.
Owner:ARM LTD
Methods for Discovery, Configuration, and Coordinating Data Communications Between Master and Slave Devices in a Communication System
ActiveUS20130124763A1Energy efficient ICTEfficient power electronics conversionCommunications systemControl bus
Various embodiments of the present invention methods for discovery, configuration, and coordinating data communications between master and slave devices in a communication system. Exemplary embodiments are described with reference to a two-wire point-to-point bus system, although the method can be used in other communication systems. Provisions are included for controlling the sequential powering of the bus and slave devices.
Owner:ANALOG DEVICES INC
I/O and memory bus system for DFPs and units with two- or multi-dimensional programmable cell architectures
InactiveUS6119181ADigital storageArchitecture with single central processing unitComputer architectureMemory bus
A uniform bus system is provided which operates without any special consideration by a programmer. Memories and peripheral may be connected to this bus system without any special measures. Likewise, units may be cascaded with the help of the bus system. The bus system combines a number of internal lines, and leads them as a bundle to terminals. The bus system control is predefined and does not require any influence by the programmer. Any number of memories, peripherals or other units can be connected to the bus system.
Owner:SCIENTIA SOL MENTIS AG
System and method for control for regenerative energy generators
ActiveUS20100262308A1Safe and efficient chargingSupply energyAuxillary drivesLevel controlArea networkOn board
A device and system that can dynamically provide variable load on a generator and intelligently distribute generated power to loads and energy storage devices is disclosed. One system includes load profile controllers that employ a switching strategy to dynamically vary the load the generator induces while producing regenerative energy. This switching strategy may allow for a wide dynamic range of configurable damping characteristics, as well as decouple generator damping and the system output power. Multiple load profile controllers can be used together via a communications network, such as a vehicle controller area network (CAN) bus. A central regeneration controller or existing electronic control unit (ECU) can issue commands to change damping performance in different load profile controllers. By networking multiple load profile controllers together in either a distributed or centralized manner, the system may allow for intelligent power routing, coordination of multiple energy-generating devices (such as regenerative shocks and brakes), and improved utilization of on-board energy storage devices.
Owner:CLEARMOTION INC
Reversible universal serial bus (USB) device and connector
ActiveUS7094086B2Substation/switching arrangement detailsCoupling contact membersCouplingEngineering
Owner:WESTERN DIGITAL ISRAEL LTD
Service-oriented architecture
InactiveUS20070011126A1ModificationEasy to adaptData processing applicationsKnowledge representationService implementationReusability
A Service-oriented architecture (SOA) and accompanying method. In one embodiment, the SOA includes one or more service requesters coupled to one or more service providers via a bus. The bus includes runtime-binding functionality to facilitate interaction between the one or more service requesters and the one or more service providers. A registry, which stores information pertaining to a service provided by the one or more service providers, communicates with one or more service providers and / or requesters and the bus. In a more specific embodiment, bus includes a Service-Integration Bus (SIB) that includes a Service-Factory (SF) module for facilitating implementing the runtime binding functionality and for selectively invoking the service. Functionality of the SOA is strategically organized into various tiers and layers, including a requester tier, a provider tier, a business-process services tier, an infrastructure-services tier, an SIB layer, a persistence layer, and so on, to optimize system reusability, adaptability, and other desirable properties. A service interface pattern is described whereby a change in service implementation does not require modification to the manner in which the service is invoked by a requester
Owner:PRIMITIVE LOGIC
Method and apparatus for controlling scanning of mosaic sensor array
InactiveUS7313053B2Quick configurationMinimize powerUltrasonic/sonic/infrasonic diagnosticsWave based measurement systemsComputer hardwareSensor array
A scanning architecture that makes it possible to update only those ultrasonic transducer subelements of a mosaic transducer array that change from view to view. The configuration of the switch matrix is fully programmable. The switch matrix includes access switches that connect subelements to bus lines and matrix switches that connect subelements to subelements. Each subelement has a unit switch cell associated therewith, each unit switch cell comprising at least one access switch, at least one matrix switch, and addressing and control logic. Optionally, each unit switch cell also includes latches for storing the future switch states of the switches to be programmed. The switches themselves have memory for storing their current switch states.
Owner:GENERAL ELECTRIC CO
Battery managing system testing platform
InactiveCN101762800AHigh precisionSimple structureElectrical testingElectrical batteryData acquisition
The invention discloses a battery managing system (BMS) testing platform comprising a testing platform main control computer, a high-precision cell voltage simulator, a high-precision large-current constant-current source, a high-precision thermotank, a battery managing system to be tested, a whole vehicle controller simulator and the like which are connected by CAN buses. The battery managing system is connected with a cell box air cooling device, a vehicle relay assembly and the like. The battery managing system testing platform can truly simulate the output state of a battery, comprising single cell voltage, total voltage, charging and discharging current, temperature and the like of the battery, can complete various communication and command functions, protection functions, battery heavy current applying process between the battery managing system and the whole vehicle, and the test and the verification on the functions of overhead protection and the like of the battery. The invention can carry out testing evaluation on the data collection precision of the battery managing system, the evaluation precision of the charge state of the battery and the like.
Owner:BEIHANG UNIV
Methods and Systems for Power Management in a Data Processing System
ActiveUS20080168285A1Lower latencyReduce total powerEnergy efficient ICTVolume/mass flow measurementData processing systemGeneral purpose
Methods and systems for managing power consumption in data processing systems are described. In one embodiment, a data processing system includes a general purpose processing unit, a graphics processing unit (GPU), at least one peripheral interface controller, at least one bus coupled to the general purpose processing unit, and a power controller coupled to at least the general purpose processing unit and the GPU. The power controller is configured to turn power off for the general purpose processing unit in response to a first state of an instruction queue of the general purpose processing unit and is configured to turn power off for the GPU in response to a second state of an instruction queue of the GPU. The first state and the second state represent an instruction queue having either no instructions or instructions for only future events or actions.
Owner:APPLE INC
Method and system for controlling transmission of USB messages over a data network between a USB device and a plurality of host computers
Disclosed are methods, computer program products, apparatus, and systems for controlling sending and receiving of universal serial bus (“USB”) messages between a plurality of host computers and a USB device over a data network. A first USB server is in communication with a first one of the host computers and the data network. A second USB server is in communication with a second one of the host computers and the data network. A USB client is in communication with the data network and the USB device. A first control path is established between the USB client and the first USB server, and a second control path is established between the USB client and the second USB server. A data transfer path is established between the USB client and the first USB server. The data transfer path enables sending of data between the USB client and the first USB server over the data network. A busy message is sent from the USB client to the second USB server over the second control path when the data transfer path is established with the first USB server.
Owner:CISCO TECH INC
Method and protocol for diagnostics of arbitrarily complex networks of devices
InactiveUS20050251604A1Removal costPreserving abilityNetworks interconnectionNetwork connectionsAbstraction layerCommunications software
The present invention includes a network having a plurality of communication buses, at least two of the plurality of buses utilizing different communication bus protocols; a plurality of computer devices, at least one of the plurality of computer devices coupled to at least one of the plurality of communication buses and containing computer device software having an architecture including bus communication software for communicating with at least one of the plurality of communication buses; and an abstraction layer in communication with the bus communication software and capable of abstracting messages from the communication bus protocols, the plurality of computer devices including at least one gateway computer device coupled to multiple of the plurality of communication buses and containing computer device software having an architecture further including a gateway in communication with the abstraction layer and capable of routing the abstracted messages between computer devices coupled to the multiple communication buses to which the at least one gateway computer device is coupled.
Owner:APTIV TECH LTD
Sensor probe and related systems and methods
ActiveUS20150151960A1Television system detailsTelemetry/telecontrol selection arrangementsTelecommunicationsDigital storage
The invention provides a sensor probe which has: one or more microelectromechanical systems (MEMS) sensors configured to sense one or more parameters and a communication bus in electrical communication therewith. The one or more sensors and communication bus are disposed on a substrate. The sensor probe includes a digital storage module in which a unique probe identifier is stored and which is in electrical communication with the communication bus. The probe includes, a cable, a first end of which is in electrical communication with the communication bus and a second end of which is in electrical communication with a remote monitoring unit. The cable is configured to provide electrical power received from the remote monitoring unit to the one or more sensors, via the communication bus, and to communicate data received from the one or more sensors, via the communication bus, to the remote monitoring unit.
Owner:MCCLELAND BARRY JOHN +1
Port interface modules (PIMs) in a multi-port memory controller (MPMC)
ActiveUS7913022B1High bandwidthEfficient implementationMemory systemsLogic circuits using elementary logic circuit componentsMemory controllerMulti port
Port Interface Modules (PIMs) are provided for ports of a Multi-Port Memory Controller. The PIMs include logic that is programmable to be compatible with different types of devices, processors or buses that can be connected to the ports. The PIMs can further include protocol bridges to enable one port PIM to connect to a device or another port PIM in a master / slave fashion.
Owner:XILINX INC
Bus arriving time prediction method and system based on floating data of the bus
InactiveCN101388143ARelatively small errorSimple methodBeacon systems using radio wavesDetection of traffic movementArrival timeEngineering
The invention relates to a bus arrival time prediction technique based on bus GPS data, which comprises sending out from the existing bus GPS data, making full use of auxiliary information such as pulling in, door opening and the like of a bus GPS apparatus, adopting a space dividing method to divide zones for bus lines, accounting the history arrival time of partitioned areas to each station in front according to the actual arrival time of a bus, and leading the bus arrival time to continuously do self-adapting update as the accumulation of history data, and meanwhile, predicating the bus arrival time by means of road traffic status which is calculated by GPS information of a taxi or road traffic status calculated by other systems, and improving the predicating accuracy.
Owner:TONGJI UNIV
Electrical connection system
InactiveUS7160147B1Electrically conductive connectionsCouplings bases/casesElectricitySystems design
An electrical connection system designed to connect electrical conductors to a junction box containing a receptacle. The system incorporates a junction box, a supply connector, a distribution connector, and a receptacle. The junction box includes a line bus, a ground bus, and a neutral bus. The supply connector adapts the incoming electrical wire having a line conductor, a ground conductor, and a neutral conductor for connection to the line bus, the ground bus, and the neutral bus. The electrical receptacle is formed with a line blade, a ground blade, and a neutral blade which, respectively, electrically connect to the line bus, the ground bus, and the neutral bus. Electrical energy may be supplied through the electrical conductors to the electrical receptacle. A distribution connector may be incorporated to supply electrical energy to downstream receptacles.
Owner:STEPHAN GERARD D
Irrigation controller
An irrigation controller for selectively turning on and off a set of sprinkler valve stations. The irrigation controller is programmable by a user. The irrigation controller includes an irrigation control processor. The irrigation control processor includes an input port, an output port, a memory element for storing an irrigation control program and irrigation control parameters, the irrigation control program implementing a plurality of functionalities that are selectively enabled, a processing unit for executing the irrigation control program, and a bus connecting said processing unit to said memory element and to said input and output ports. An input device is interfaced with the input port. The output port is provided with interface with the sprinkler valve stations for controlling the turning on and off of the sprinkler valve stations. The input device cooperates with the control program to enable at least one specific functionality from the functionalities in response to a predetermined input being received from the user through the input device.
Owner:MILLER ROBERT
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