25 results about "Power routing" patented technology

This invention relates to the field of power Internet of Things and smart distribution network monitoring technology, and discloses a smart scheduling system for highway charging resources. The system includes: a dual-end source-side three-level rectification and busbar construction module, which constructs a bipolar three-wire DC transmission busbar between two service areas; a cross-regional transmission line impedance identification and status sensing module, which calculates the distributed inductance and capacitance parameters of long cables in real time; a terminal multi-port adaptive power routing module, which physically selects the voltage level to suit vehicle demand through a switch matrix; and a distributed parameter resonance locking and drive control module, which locks the operating frequency to the line's intrinsic resonant frequency and uses distributed parameters to achieve soft switching. This invention achieves long-distance energy exchange and voltage adaptive matching through cross-regional interconnection and multi-level routing, and transforms line parasitic parameters into resonant elements, reducing transmission losses.

This invention discloses a boundary computing power routing scheduling method and system based on OAM information publishing. The method includes: acquiring a computing request to be processed and node awareness data sent by multiple computing power routes; the computing power routes are communicatively connected to multiple computing power nodes and determine the node awareness data based on communication interaction; determining the scheduling route corresponding to the computing request from the multiple computing power routes based on the node awareness data; determining the node scheduling strategy corresponding to the scheduling route based on the computing request and the node awareness data corresponding to the scheduling route; generating an OAM information message based on the computing request and the node scheduling strategy, and sending the OAM information message to the corresponding computing power node through the scheduling route. Therefore, this invention can achieve accurate task scheduling based on real-time awareness data, thereby effectively improving the processing efficiency and response speed of computing requests among multiple computing power nodes.

A method includes forming a package component, the package component comprising: an interposer comprising a first redistribution structure; integrated circuit dies attached to the first redistribution structure; forming a package substrate, forming the package substrate comprising: forming a second redistribution structure and a third redistribution structure over opposite sides of a substrate core; singulating the substrate core to form component substrates; attaching a first component substrate and a second component substrate to a carrier, the first component substrate and the second component substrate being laterally displaced by a gap; and forming a bonding layer over the first component substrate and the second component substrate; attaching the package component to the package substrate; and forming external connectors over the package substrate, the external connectors being configured to electrically couple a signal routing, a power routing, or a ground routing of the integrated circuit dies to an another package component.

The application provides a computing power routing method for AGI reasoning network, relates to the field of AGI computing power routing, and comprises the following steps: collecting physical operation state parameters of different types of nodes in the AGI reasoning network, constructing a hot area distribution, and establishing an association with a reasoning stage; outputting a physical bearing state set and a hot drift association result; statistically analyzing resource occupation characteristics of the reasoning stage and matching the resource occupation characteristics with the hot area distribution; reconstructing physical pressure and generating a bearing decay mark; outputting a physical constraint reasoning set and a bearing change result; identifying a reasoning stage to be released, matching a migration target node, completing context migration, and generating a reasoning release constraint; outputting a physical constraint routing result and a reasoning stage release mapping set; determining whether the node is out of a hot accumulation state and restores bearing capacity; executing a reasoning stage backflow and updating a physical constraint routing; and outputting an AGI reasoning computing power routing result, so that the AGI reasoning efficiency and stability are improved, and the computing power resource utilization rate is significantly improved.

Embodiments of the present disclosure provide a packet forwarding method and apparatus. The method comprises: receiving a service identification table generated on the basis of service forwarding types and service identifiers and sent by a control plane; receiving a computing power request packet sent by a terminal; on the basis of a service identifier in the computing power request packet, matching a service identifier in the service identification table; and on the basis of the matching result, performing general routing and forwarding or computing power routing and forwarding on the computing power request packet. By means of the present disclosure, the problems of the high intrusiveness and high resource overhead of computing power routing systems in the related art is solved.

This invention discloses an elevator energy management method considering device lifespan and energy saving optimization in the field of power supply, distribution, and energy storage technology, comprising the following steps: S1, establishing an elevator energy management system, including a voltage regulator G. V (s), voltage regulator G V (s) and PWM controller G d (s) connected, PWM controller G d (s) and isolated bidirectional DC / DC converter G p (s) connected, isolated bidirectional DC / DC converter G p (s) output voltage reference value U * With voltage regulator G V (s) Connected; S2, Calculate and select the parameters of the components and output filters of the elevator energy management system; S3, Establish a peak-transient dual-mode prediction method; S4, Establish a power routing collaborative optimization method; S5, Establish an elevator operating condition identification method; S6, Establish a joint scheduling method based on grid time-of-use pricing information. Applicable to urban high-rise buildings and universities with frequent start-stop operations, this method optimizes charging and discharging control strategies to achieve efficient recovery and utilization of elevator operating energy, while simultaneously improving the reliability of the elevator system.

The standard cell includes: an active region (2P1); an active region (2N1) formed above the active region (2P1) and overlapping the active region (2P1) when viewed from above; and power wiring (11) formed on the back wiring layer. One side of the nanosheets (21), (22) in the second direction, i.e., the first side, is exposed from the gate wiring (31). The power wiring (11) is arranged at the end of the first side of the standard cell.

This invention provides a flexible control method for a DC58.4V low-voltage DC power routing flexible control system. Specifically, after the system is powered on, the bus current and voltage are collected by a dedicated metering sampling sub-board, filtered, and processed by a metering chip before being transmitted to the main control CPU. The HPLC carrier main module couples signals through the bus and distributes them independently to each branch via a signal isolator. The HPLC slave module transmits equipment data back, achieving bidirectional communication and full-domain monitoring. The main control CPU generates instructions, which are used to achieve orderly load startup via a snap-on expansion interface. The flexible control execution module collects branch data and adjusts the conduction level of the MOSFETs via PWM to achieve flexible adjustment of photovoltaic and mains power, while simultaneously controlling the balanced charging and discharging of the battery pack and initiating auxiliary charging when energy storage and photovoltaic power are insufficient. This method achieves flexible energy management across the entire DC58.4V system, with stable and reliable communication.

The present disclosure is directed to techniques of fabricating hybrid transistors that combine both TFETs and MOSFETs. The techniques may be commonly integrated such that TFET regions are formed in the same fabrication stages used to fabricate CMOS regions. The TFET and MOSFET may be stacked vertically to reduce the footprint area of the hybrid transistor, which may lead to further semiconductor IC device scaling. The hybrid transistor may utilize a backside power distribution network (BSPDN). The utilization of the BSPDN may reduce resistances, which may result in performance increases. Further, the utilization of the BSPDN may further reduce the footprint area of the hybrid transistor, which may provide for continued scaling. Further, the utilization of the BSPDN may further reduce signal and power potential routing complexities.

The present invention is a translucent member comprising a translucent insulating base material, a plurality of power supply wiring patterns, and a metal antenna pattern, wherein: the power supply wiring patterns have a first power supply wiring pattern that is constituted by an external connection pad which is formed on the outer edge side of the insulating base material, a first connection pad, and connection wiring which connects the external connection pad and the first connection pad; the connection wiring includes a juxtaposition part that has a plurality of metal wires which are spaced apart from each other; in the juxtaposition part, a gap between two adjacent metal wires is wider than the width of the metal wires; and the metal antenna pattern has a plurality of metal thin wires that extend in the same direction as the plurality of metal wires of the juxtaposition part and that are spaced apart from each other. Since a floating dummy metal wiring pattern extending in the same direction as the extension direction is formed between the first power supply wiring pattern and the metal antenna pattern, it is possible to achieve both improvement in invisibility of an antenna provided on the translucent base material and prevention of sensitivity deterioration.

This invention discloses a dynamic computing power routing calculation method and system oriented towards business needs, relating to the field of computing power network technology. The method includes: receiving user business requests and extracting computing power type requirements, computing power size requirements, memory requirements, maximum tolerable latency, and minimum bandwidth requirements as business demand information; at the central controller, based on the computing power status information and computing power prediction information of the computing power scheduling area, combined with the business demand information, performing area adaptation evaluation to determine the suitable computing power scheduling area and suitable edge processor; at the adapted edge processor, based on the node status information of multiple computing power nodes within the adapted computing power scheduling area, performing computing power node matching analysis to determine the optimal computing power node; and scheduling the business request to the optimal computing power node for processing. This invention achieves precise matching and load balancing of computing power resources through two-level collaborative scheduling at the area and node levels, improving the overall resource utilization of the computing power network.

This invention relates to the field of power system operation and maintenance technology, specifically disclosing a self-healing edge network intelligent control system and method for new energy power grids. The system includes: a physical grid layer, simulating the power generation characteristics, transmission line status, load time-varying characteristics, and frequency response characteristics of the new energy power grid; an edge intelligence layer, employing a distributed architecture to collect various power operation data in real time within each jurisdiction of the physical grid layer, simultaneously using ant colony optimization to find the optimal power routing path, and using particle swarm optimization to perform load allocation on the optimal power routing path; and an inference layer, selecting the current control intention action for the physical grid layer from the action space based on the power operation data collected by each edge gateway node, and performing security constraint evaluation and rule filtering on the current control intention action to output the optimal execution action. This invention can achieve low-latency, high-precision, and highly secure management of power grid congestion in complex operating environments.

The standard cell includes: an active region (2N1) that overlaps with the active region (2P1) when viewed from above; a power wiring (11) formed on the back wiring layer; and a via (61) formed in the region of the active region (2P1) where the source of the transistor (P1) overlaps with the power wiring (11), connecting the source of the active region (2P1) to the power wiring (11). One side of the nanosheets (21) and (22) in the second direction, i.e., the first side, is exposed from the gate wiring (31) and is positioned near the end of the first side of the standard cell.

A semiconductor device includes a memory block, a second power supply wiring, a third power supply wiring, and a short-circuit switch, the memory block has a plurality of memory cells, a sense amplifier connected to a memory cell selected from the plurality of memory cells, a first power supply wiring, a first switch connected between the sense amplifier and the first power supply wiring and in an on state when the sense amplifier operates, and a second switch connected to the sense amplifier and in an on state when the sense amplifier operates, the second power supply wiring is arranged outside the memory block and connected to the first power supply wiring, the third power supply wiring is arranged outside the memory block and connected to the sense amplifier via the second switch, and the short-circuit switch is arranged outside the memory block and connected between the second power supply wiring and the third power supply wiring. Here, the short-circuit switch is in an on state when the sense amplifier operates.

The standard cell has a power supply wiring (11, 12) formed in a back surface wiring layer and a via (61) formed in a region of the active region (2P1) that becomes a source of the transistor (P1) and that overlaps with the power supply wiring (11) and connects the source in the active region (2P1) and the power supply wiring (11). A face on one side in the Y direction of the nanosheet (21) is exposed from the gate wiring (31). A face on the other side in the Y direction of the nanosheet (22) is exposed from the gate wiring (32). The via (61) is arranged in a central portion in the Y direction of the active region (2P1) when viewed from above.

The present disclosure relates to a complementary field effect transistor (CFET) structure and a method of manufacturing such a CFET structure. The CFET structure comprises a dielectric wall (25) and a first CFET element, a first power rail (13) and a power wiring (16), the first CFET element comprising a first transistor structure (21) and a second transistor structure (22). Both the first and the second transistor structure are arranged on a first side of the dielectric wall, and the second transistor structure is arranged above the first transistor structure. The first power rail is arranged below the first transistor structure and electrically connected from the bottom to a source and / or drain structure of the first transistor structure, and the power wiring is arranged above the second transistor structure.

Exemplary methods of the present disclosure are directed to: growing a diamond layer by using a mold that is used to structure the diamond layer so that it conforms to a circuit device. The circuit device has a heat-sink side and another side to connect with a signal and power routing redistribution region, and the method further includes: planarizing one or two surfaces of the diamond layer to realize a surface roughness (on one or both sides) that is sufficient to set a thermal boundary resistance (e.g., less than 20 m2K / GW and / or less than 50 nm RMS); applying a gap-filling thermal interface material (TIM) layer to fill gaps along the surface(s); and positioning a heat sink on the heat-sink side of the circuit device, wherein the surface roughness of the diamond layer and the gap-filling TIM layer are cooperatively arranged to facilitate transfer of heat from the circuit device into the heat sink.

A method of forming a semiconductor device includes forming a package assembly including: an interposer including a first redistribution structure; an integrated circuit die attached to the first redistribution structure; forming a package substrate including: forming a second redistribution structure and a third redistribution structure over opposing sides of a substrate core; singulating the substrate core to form assembly substrates; attaching the first assembly substrate and the second assembly substrate to a carrier, the first assembly substrate and the second assembly substrate laterally offset by a gap; and forming a bonding layer over the first assembly substrate and the second assembly substrate; attaching the package assembly to the package substrate; and forming external connections over the package substrate, the external connections configured to electrically couple signal routing, power routing, or ground routing of the integrated circuit die to another package assembly. Embodiments of the present disclosure also provide semiconductor devices.

The application discloses a kind of delay constraint multi-path computing power routing methods in computing power network, comprising the following steps: constructing the virtual network model of computing power network, by increasing virtual node as terminal, computing power is mapped as the link capability between computing power node and virtual node.The maximum delay constraint of multi-path computing power routing problem in virtual network model is approximated into total delay constraint, and the approximate optimization result under total delay constraint is obtained.Under the condition of guaranteeing maximum delay constraint, data volume transfer is carried out between maximum unit data volume cost path and minimum unit data volume cost path.The multi-path computing power routing algorithm proposed can solve the common selection problem of computing power resources for computing and network path for transmission, obtain approximate optimal total cost and meet maximum delay limit.The application can be used for multi-path computing power routing of delay-sensitive computing tasks in computing power network.

Embodiments of the present application provide a computing power routing method and device, a computing power network device and a storage medium. The method is applied to any computing power network device and includes the following steps: in response to a first message corresponding to any computing power network service, determining node information of a previous node sending the first message based on identification information of the first message; wherein the node information represents an entry computing power network node or a non-entry computing power network node; determining a target routing table from a candidate routing table of the computing power network device based on the node information, and routing based on the target routing table; wherein the candidate routing table includes a global routing table and a local routing table, the global routing table includes remote routing information and local routing information, and the local routing table includes local routing information. The above scheme realizes flexible change of computing power information through two routing tables, and the computing power network device can accurately identify its own attributes, thereby selectively querying the routing table and improving routing efficiency.

The present application provides a driving substrate capable of improving the discharge performance of a liquid while reducing manufacturing costs. The driving substrate according to an embodiment of the present disclosure is applied to a liquid ejection head and outputs a driving signal to an ejection section, and includes: a first wiring layer and a second wiring layer that face each other in a direction orthogonal to a substrate surface; one or more driving devices mounted on the first wiring layer and configured to generate the driving signal; a first power supply wiring provided on the first wiring layer and configured to supply a driving power supply wiring to the driving device; a differential line provided on the first wiring layer and configured to transmit a differential signal to the driving device; and a second power supply wiring provided on the second wiring layer, the second power supply wiring being electrically connected to the first power supply wiring via a first through-hole and facing a first region in the differential line. A wiring width of the second power supply wiring is greater than a line width of the first region in the differential line.

A signal transmission device has a signal-side electrode, a first signal line connected to one side of the signal-side electrode, a second signal line connected to the other side of the signal-side electrode, a power supply-side electrode connected to the signal-side electrode via an electronic component including at least an inductive component, and a capacitive coupling portion that capacitively couples the power supply-side electrode and a ground wiring or a power supply wiring, the first signal line, the signal-side electrode, and the second signal line forming a transmission path that transmits an electric signal, and the first signal line and the second signal line transmitting electric power via the signal-side electrode, the electronic component, and the power supply-side electrode.

The embodiment of the invention provides a message forwarding method and device, and the method comprises the steps: receiving a service recognition table which is transmitted by a control plane and is generated based on a service forwarding type and a service identifier, receiving a computing power request message transmitted by a terminal, and matching the service identifier in the service recognition table according to the service identifier in the computing power request message, and performing universal routing forwarding or computing power routing forwarding on the computing power request message according to a matching result. Through the method and the device, the problems of high invasiveness and relatively large resource overhead of a computing power routing system in the related technology are solved, and the effects of reducing the invasiveness to a traditional router and reducing the resource overhead are achieved.

A vehicle fuel pump power management circuit that replaces traditional relay and fuse-based power routing with a MOSFET-based circuit controlled by the Automatic Shutdown Relay (ASD) and Engine Control Unit (ECU). The MOSFET circuit allows direct current flow from the vehicle's power supply to the fuel pump, enhancing reliability by reducing mechanical failures associated with conventional relays. A multi-layered PCB design minimizes electromagnetic interference, enhances heat dissipation, and prevents component overheating, while isolating circuits for optimized performance. The ECU provides real-time adjustments based on sensor feedback, ensuring efficient fuel injection timing.