66 results about "Ladder network" patented technology

Autoencoder-based, semi-supervised approaches are used for anomaly detection. Defects on semiconductor wafers can be discovered using these approaches. The model can include a variational autoencoder, such as a one that includes ladder networks. Defect-free or clean images can be used to train the model that is later used to discover defects or other anomalies.

A high-pass two-dimensional ladder network has been described for high-field MRI and credential applications. The next-to-highest eigenvalue of the network corresponds to a normal mode giving rise to B₁ fields with good spatial homogeneity above the resonator plane. Other eigenvalues may also be used for specific imaging applications. In its most basic form, the ladder network is a collection of inductively coupled resonators where each element of the array is represented by at least one conducting strip having a self-inductance L, joined by a capacitor C at one or more points along each resonator. In the strong coupling limit of the inductively coupled high-pass two-dimensional ladder network resonator array, the array produces a high-frequency resonant mode that can be used to generate the traditional quadrature B₁ field used in magnetic resonance imaging, and in the limit of weak or zero coupling reduces to a phased array suitable for parallel imaging applications.

A computer-aided design method of an integrated circuit includes: calculating current dissipation consumed by logic elements, in a ladder network embracing a plurality of current paths connected between subject first- and second-potential-level power supply wiring; analyzing a tolerable electro-migration current of the subject first-potential-level power supply wiring; analyzing an interval voltage drop between a control point and a specific position on the subject first-potential-level power supply wiring; and comparing a summation of through-currents flowing the logic elements from the control point to the specific point, with the tolerable electro-migration current, and comparing the interval voltage drop with a tolerable voltage drop to determine an optimum location of a via configured to supply power from the subject first-potential-level power supply wiring to the logic elements.

A Z/2Z ladder network includes an R/2R ladder network having capacitors coupled across series resistors within the R/2R ladder network, wherein the capacitors are sized to substantially match delays from nodes within the ladder network to an output node. The Z/2Z ladder network can be implemented within a digital to analog controller (“DAC”), including higher resolution DACs, and high data rate DACs. In higher resolution DACs, and high data rate DACs, the Z/2Z ladder network is coupled through switches to corresponding current sources. The Z/2Z ladder is optionally implemented differentially.

A resistor tuning network is disclosed that comprises a first resistor connected in parallel with a second variable resistor and a third resistor coupled in series with the first resistor and the second variable resistor. The second variable resistor comprises an R-2R ladder network having an input and first and second output terminals, with a first line having a plurality of first arms connected in series with the input and first output terminal and nodes between each pair of arms, each arm having an identical resistor R. A series of shunt arms, each with a 2R resistor and a switch, are selectively connected between the respective nodes and the first or second output terminal. The resistance of the resistor tuning network is tuned by varying the switch positions in the shunt arms in the R-2R ladder network.

A semiconductor device for transmitting-signal amplification which has a fine resolution, a high dynamic range, a small occupied area, and low power consumption, is realized. An input signal amplitude is reduced every one half by a ladder network, and a transconductance amplifier stage is arranged corresponding to each node of the ladder network. An output of the transconductance amplifier stage is coupled to an output signal line in common. According to a control word WC<21:0>, the transconductance amplifier stage is enabled selectively, and the output current which appears in the output signal line is added.

There is provided an LED driving circuit including: at least one ladder network circuit including: (n+1) number of first branches connected in parallel with one another by n number of first middle junction points between a first junction point and a second junction point, where n denotes an integer satisfying n≧2, (n+1) number of second branches connected in parallel with one another by n number of second middle junction points between the first junction point and the second junction point, the (n+1) number of second branches connected in parallel with the first branches; and n number of middle branches connecting the first and second middle junction points of an identical m sequence to each other, respectively, wherein each of the first and second, and middle branches comprises at least one LED device.

A system and method for determining a change in a thickness and temperature of a surface of a material are disclosed herein. The system and the method are usable in a thermal protection system of a space vehicle, such as an aeroshell of a space vehicle. The system and method may incorporate micro electric sensors arranged in a ladder network and capacitor strip sensors. Corrosion or ablation causes a change in an electrical property of the sensors. An amount of or rate of the corrosion or the ablation and a temperature of the material is determined based on the change of the electrical property of the sensors.

A Z/2Z ladder network includes an R/2R ladder network having capacitors coupled across series resistors within the R/2R ladder network, wherein the capacitors are sized to substantially match delays from nodes within the ladder network to an output node. The Z/2Z ladder network can be implemented within a digital to analog controller (“DAC”), including higher resolution DACs, and high data rate DACs. In higher resolution DACs, and high data rate DACs, the Z/2Z ladder network is coupled through switches to corresponding current sources. The Z/2Z ladder is optionally implemented differentially. The invention can be implemented as a Z/kZ ladder network, where k is a real number.

The invention discloses a high-resolution SAR image classification method based on a depth ladder network, mainly to solve the problem that the high-resolution SAR image has few data with class identifiers and a network can not be trained effectively. The method comprises steps: a to-be-classified high-resolution SAR image and identifier information thereof are inputted; a training data set D1 and a test data set D2 are constructed; features of the data sets D1 and D2 are normalized to obtain data sets D3 and D4; a classifier model based on the depth ladder network is constructed; the training data set D3 is used for training the network; and the well-trained classifier model is used for classifying the test data set D4. The few training samples with class identifiers can be made full use of, and the high classification precision can be acquired.

Write enhancement circuitry on the head carrier of a magnetic recording disk drive provides additional write current overshoot beyond that provided by the write driver circuitry. The write enhancement circuitry is formed on the head carrier as ladder network blocks. A first ladder network block is a first capacitor C1 located in parallel with the write coil. The second ladder network block includes a second capacitor C2 having substantially the same inductance L2. The compensation circuitry is referred to as a ladder network because additional ladder blocks, like the second block but with different values of capacitance and inductance, may be located on the head carrier.

An integrated digitally controlled linear-in-decibels attenuator circuit in which one or more sets of selection switches establish a desired attenuation by selectively connecting the input signal electrode to one or more corresponding resistive ladder networks connected in series, thereby providing a substantially more constant signal attenuation value over a wider frequency bandwidth. With a single resistive ladder network, attenuation control is achieved using a thermometer switching code. With multiple resistive ladder networks, coarse and fine attenuation control can be achieved using thermometer and bubble switching codes, respectively.

The invention provides an attitude estimation method based on a decoupling step network in the technical field of human body attitude estimation. The attitude estimation method comprises the followingsteps of S10, building the decoupling step network based on a decoupling residual module and a waterfall module; S20, acquiring a large number of human body sample images, and training a decoupling step network by using the human body sample images; and S30, inputting a to-be-tested image into the trained decoupling step network, calculating the position of each joint point in the to-be-tested image, and forming a complete human body posture based on the position of each joint point. The method has the advantage that the speed and precision of human body posture estimation are greatly improved.

The invention relates to a filter based on Chebyshev impedance transformer network technology. The filter comprises the following design steps: giving pass band and stop band insertion attenuation values of the filter to be designed, and obtaining the number N of elements of a low-pass filter and normalized element values according to the corresponding technical formulas, charts and parameters; according to the cut-off frequency and signal source internal resistance of the filter, selecting structure style (capacitor input type or inductor input type) of a ladder network, and calculating true value of each element; calculating and selecting characteristic impedance values of high/low impedance of transmission line section, and calculating lateral dimension of each transmission line; and calculating the length of each high/low impedance line section according to actual element values of the filter. The filter has the advantages of small structure dimension, easy processing and manufacturing, easy element matching and the like, has good linearity, has adjustable parameters, and finally, gives a computer simulation result; and the integratedly-design microwave filter needs the minimum elements.

Ladder network circuits for controlling operation of a string of light emitting diodes (LEDS). The circuits include a number of sections connected in series. Each section includes one or more LED junctions, a variable resistive element coupled to the LED section, and a switch coupled to the variable resistive element and the LED section for controlling activation of the LED. The sections can include a transistor coupled between the switch and variable resistive element. The series of sections are connected to an AC power source, rectifier, and dimmer circuit. When receiving power from the power source, the sections activate the LEDs in sequence throughout the series of the sections. The dimmer circuit controls activation of a selection of one or more of the sections in order to activate in sequence the LEDs in only the selected sections, providing for both dimming and color control of the LEDs.

A gain-controllable stage (CLN, A1, A2 . . . , A7, ACC) comprises a reactive signal divider (CLN) followed by an amplifier arrangement (A1, A2 . . . , A7, ACC). The reactive signal divider (CLN) may be in the form of, for example, a capacitive ladder network. The gain-controllable stage (CLN, A1, A2 ..., A7, ACC) has a gain factor that depends on a signal division factor that the reactive signal divider (CLN) provides. The reactive signal divider (CLN) forms part of a filter (LC). The signal division factor is adjusted on the basis of a frequency (F) to which the receiver is tuned and a signal-strength indication (RS).

A system for providing a first signal to a flip circuit and receiving a second signal from the flip circuit over an electrical path adapted for use with a keypad having a keypad lighting circuit. The system includes a first circuit for providing the first signal to the flip circuit via a first electrical path, the first signal having alternating first and second states. A second circuit generates a second signal. A third circuit receives the second signal via the first electrical path. The second signal is received during the second state of the first signal. In a more specific embodiment, the first and second states are continuously alternating states. The first signal provides power to the flip circuit when the first signal is in the first state. The first circuit further includes a signal generator for adjusting a duty cycle of the first signal. The signal generator includes a voltage source, a switching circuit connected to the voltage source, and a control circuit connected to the switching circuit. The control circuit causes the switching circuit to output the first signal having first and second states at the duty cycle. The switching circuit includes a transistor having a control terminal connected to the control circuit. One terminal is connected to the voltage source and another terminal is connected to the electrical path. The second circuit includes a keypad. The flip circuit includes at least one light source to illuminate the keypad. The light source is powered by the first signal during the first state thereof. The second signal is generated by the keypad during the second state of the first signal. The keypad includes a plurality of resistive elements connected in a resistive ladder network. Each resistive element corresponds to a respective key of the keypad. A computer processes the second signal to ascertain which key is depressed.