97 results about "Digital analog converter" patented technology

The invention provides a temperature drift compensation method, device and equipment for laser ranging in a low-temperature scene and a medium, and the method comprises the steps: building a temperature-drift model through the fine calibration of a laboratory; laser temperature measured by the double temperature sensors is obtained, the laser chip temperature is obtained through Kalman filtering, and a temperature-drift model is called to calculate the wavelength drift distance and the power drift distance at the current temperature; calculating a TEC target temperature compensation amount according to the wavelength drift amount, and calculating a driving current compensation amount according to the power drift amount; and based on the driving current compensation amount, a digital-to-analog converter is adopted to update laser driving current compensation power drift, so that the problem of low track detection precision by adopting laser ranging in a severe low-temperature environment is solved.

The invention discloses a system reference clock frequency accuracy automatic calibration circuit and a calibration method thereof, and belongs to the technical field of frequency sources, the calibration circuit comprises a first crystal oscillator, a first power divider, a second power divider, a second crystal oscillator, an analog switch, a radio frequency switch, a detector, a comparator, an FPGA controller, a digital analog converter, an operational amplifier and a temperature sensor. When an external high-precision reference clock is accessed, the FPGA controller automatically switches a frequency measurement reference, performs high-precision frequency measurement on a 100MHz signal output by the first crystal oscillator, and judges whether calibration is needed or not according to frequency offset; if calibration is needed, the output voltage of the digital-to-analog converter is adjusted, the Vc end of the first crystal oscillator is controlled after operational amplification, and frequency closed-loop adjustment is achieved. According to the method, the crystal oscillator does not need to be disassembled, calibration is rapidly completed on site, and system availability and long-term frequency stability are remarkably improved.

The invention discloses a capacitor mismatch error shaping circuit and method suitable for a multi-bit quantization Sigma-Delta ADC, and belongs to the technical field of integrated circuits, and the capacitor mismatch error shaping circuit comprises a data weight averaging module which is used for adopting a data weight averaging technology for high-bit quantization code words, and correcting the high-bit quantization code words according to the data weight averaging technology; averaging the mismatch error of the capacitor corresponding to the high-order quantization code word to obtain an averaged high-order capacitor; and the mismatch error shaping module is used for taking the averaged high-order capacitance as a reference, adopting a mismatch error shaping technology, keeping low-order feedback of the current low-order quantization code word of the lower polar plate of the capacitive digital-to-analog converter during Sigma-Delta ADC sampling, and realizing subtraction operation between two adjacent low-order quantization code words. According to the invention, the error caused by the mismatch of the CDAC capacitor fed back by the multi-bit quantization Sigma-Delta ADC can be effectively suppressed, the linearity of the system is improved, and the circuit overhead is remarkably reduced.

A system for scalable two-dimensional surface code comprises four sub-lattices of qubits, each selectively controlled by a set of analog lines. Eight sets of analog lines selectively control eight sets of inter-qubit couplers. The qubits and couplers have response homogenization devices comprising control structures to apply analog signals and DACs to apply static bias to qubits and couplers. A second surface code layer compensates for defective qubits. A quantum processor and a method of moving data within a quantum processor are described. The quantum processor has quantum logic units with a plurality of physical qubits and couplers. The logic unit has a plurality of logical qubit blocks making up 2-local interaction registers. A shift register block with one or more logical qubit blocks and merge blocks connecting adjacent logical qubit blocks are provided. The shift register block is selectively communicatively coupled to 2-local interaction registers by a merge block.

A dual tank LC-tuned Voltage Controller Oscillator (LC VCO) comprising a differential pair of cross-coupled transistors (M1, M2, M3, M4) produces a negative impedance by keeping a lower drain swing and a sufficient gate swing. The gate terminals of first and second transistors M1, M2 and third and fourth transistors M3, M4 are separated through a series of two inductors L1, L2 and two cross-coupled capacitors are connected between the drain and gate terminals of cross-coupled transistors to attenuate the output swing. The VCO tank further comprises two R2R Digital to Analog Converters (DAC) to bias both NMOS and PMOS cross-coupled pairs of transistors, to produce a common mode noise.

Display device (10) with a substrate (12) and a display area (30) arranged on the substrate (12), wherein the display area (30) comprises a plurality of pixels (32) arranged in a two-dimensional array, wherein the display device (10) comprises the following: a first control loop (40) arranged on the substrate (12), wherein the first control loop (40) comprises a plurality of first input signal lines (XSR control signal, 42, 44, 45), (Idata, 46), (Yck, 48), a plurality of first electronic components (XSR(1), XSR(2), ..., 52), (Latch(R1), Latch(G1), ..., 62), (S1, S2) and a plurality of data lines (DR1, DG1, ..., 64), wherein the data lines (DR1, DG1, ..., 64) are arranged to provide image data for the pixels (32), wherein the first electronic components (XSR(1), XSR(2), ..., 52), (Latch(R1), Latch(G1), ..., 62), (S1, S2) are configured to receive data signals from the first input signal lines specifying the image data; a second control loop arranged on the substrate (12), wherein the second control loop (70) comprises a plurality of second input signal lines (YSR control signal), a plurality of second electronic components (YSR(1), YSR(2), ..., 82) and a plurality of sampling lines (P1, P2, ...), wherein the sampling lines (P1, P2, ...) are arranged to provide timing control signals for the pixels (32), and wherein the second electronic components (YSR(1), YSR(2), ..., 82) are configured to receive timing pulses from the second input signal lines specifying the timing control signals; and a connecting cable (20) comprising a plurality of first connecting lines (24) and a plurality of second connecting lines (24), wherein the first input signal lines (42, 44, 45), (Idata, 46), (Yck, 48) are electrically connected to the first connecting lines (24) to receive the data signals, and the second input signal lines (YSR control signal) are electrically connected to the second connecting lines (24) to receive the time pulses, and wherein the data signals are digital signals, wherein the digital signals have an amplitude range, wherein the connecting cable (20) is further configured to provide reference signals for controlling the image data in the first control circuit (40) and for controlling the timing control signals in the second control circuit (70), wherein the reference signals have a signal voltage range, wherein the amplitude range of the digital signals is greater than the signal voltage range of the reference signals.

The utility model provides a light compensating circuit and a pulse blood oxygen simulation system, which relates to the technical field of blood oxygen detection and comprises an ambient light detection circuit, an ambient light simulation generation circuit and a compensation superposition circuit. The ambient light detection circuit comprises a light sensor, a first operational amplifier, a first resistor and a microprocessor; the optical sensor is connected with the inverted input end of the first operational amplifier, the inverted input end of the first operational amplifier is connected with the output end of the first operational amplifier through the first resistor, and the output end of the first operational amplifier is connected with the input end of a digital analog converter port of the microprocessor. The output end of the digital analog converter port of the microprocessor is connected with the first input end of the compensation superposed circuit, and the output end of the ambient light analog generation circuit is connected with the second input end of the compensation superposed circuit. Therefore, the resistance of the system to ambient light interference is effectively improved.

A potentiostat architecture includes one or more feedback loops configured to regulate and maintain electrode potentials while measuring a sensing current. At least one of the feedback loops include a comparator configured to sense a voltage difference and output a signal based on the voltage difference, a digital loop filter configured to receive the signal from the comparator and output feedback digital bits related to a control, and a digital to analog convertor configured to receive the signal from the comparator and output feedback digital bits related to a control.

The invention discloses a transposition bias system for closed-loop control, and relates to the technical field of rotary table control, the transposition bias system comprises a transposition bias unit and a stable closed-loop system, the transposition bias unit is used for processing electric lock large impact caused by an interference source, machine shake and bias angle change caused by abnormal out-of-tolerance; the offset angle of the transposition offset unit is subjected to real-time and prediction processing according to actual angle measurement calculation and different states such as large impact, machine shake and abnormal out-of-tolerance of the electric lock, external and self interference source signals are received through sensing current closed-loop adjustment and the transposition offset unit, stabilization processing is carried out through offset angle changes, and offset closed-loop stability is achieved. The stable closed-loop system collects a high-precision digital-to-analog converter signal, a frictional resistance signal and a wiring harness torque signal, stable bias algorithm resolving is carried out through the circuit system, and finally state processing of the bias system is carried out; according to the invention, the control precision of the rotary table can be improved.

The utility model discloses a signal generator circuit with multiple residual current waveform generation capabilities, a microcontroller and an external crystal oscillator circuit comprise a microcontroller U7, the microcontroller U7 generates a B-type residual current waveform through a residual current waveform generation program specified by a running command, and the B-type residual current waveform is converted into a B-type residual current waveform. And the waveform meeting the detection requirement of the new national standard GB / T18487.1-2023 on the residual current sensor can be generated. Secondly, a high-performance digital-to-analog converter (DAC) is built in the microcontroller U7, and high-sampling-rate conversion is supported; in the circuit, the 20KHz high-sampling-rate DAC can ensure high smoothness of output waveforms, and the DAC can output sine waves or other waveforms close to an ideal state by accurately controlling conversion of digital signals into analog voltage signals, so that various application requirements are met.

The application discloses an R-2R digital-analog converter with an auxiliary calibration structure and relates to the technical field of high-precision digital-analog conversion. The converter comprises a main DAC, a calibration quantity calculation module, a compensation code generation module, an auxiliary DAC and an operational amplifier circuit. The main DAC converts a digital input into an analog current. The calibration quantity calculation module generates a 15-bit compensation code containing a 1-bit sign bit and a 14-bit data bit through a 24-bit ADC, a comparator and successive approximation logic, and only calibrates the high 12 bits of the main DAC bit by bit, and the low 4 bits do not need to be calibrated. The compensation code generation module generates a total compensation code through gating by a multiplexer and superposition by an adder. The auxiliary DAC is a 14-bit binary current type structure, and realizes bidirectional compensation in cooperation with a positive and negative reference voltage source. The application has the advantages of short calibration period, small storage consumption, no need for additional bias calibration, excellent linearity, and suitability for application in the fields of wireless communication, biological medicine and the like, and meets the application requirements of high resolution and high precision.

The application discloses a direct digital frequency synthesizer based on RBF neural network of phased optimization, which comprises a phase accumulator responsible for generating a phase signal, an RBF neural network module responsible for converting the phase signal into a digital amplitude signal, a digital-analog converter responsible for converting the digital amplitude signal into a low-frequency sawtooth signal and a low-pass filter responsible for converting the sawtooth signal into a smooth analog signal. The RBF neural network module comprises a hidden layer and an output layer, each node in the hidden layer has a corresponding radial basis function, so as to map a corresponding characteristic value for each input phase information, multiply the corresponding characteristic value of each node with the corresponding weight in the output layer, and then sum up to obtain an amplitude value corresponding to the phase information. Compared with the prior art, the application introduces the RBF neural network, so that the direct digital frequency synthesizer has stronger scalability and adaptability when processing complex and nonlinear frequency synthesis tasks.

Vehicle battery control system, including: a battery unit (208), comprising: a first and a second pole (210, 212, 214, 220); a third and a fourth pole (216); a large number of individually stored batteries (224); and a plurality of switches (232) configured to connect one of the batteries (224) to and from one of the first, second, third and fourth poles (210, 212, 214, 220, 216); a mode module (604) configured to set an operating mode based on at least one of a plurality of available operating parameters; and a switch control module (240) configured to control the plurality of switches (232) based on the operating mode, a pre-charge circuit (404) comprising a comparator (412), an output (420), a digital-to-analog converter DAC (424), a pre-charge switch (428) and a pre-charge capacitor (448), wherein the pre-charge capacitor (448) is connected in parallel to the first and second poles (210, 212, 214, 220), wherein the pre-charge circuit (404) is configured to connect a first battery (224-1) to the pre-charge capacitor (448), wherein the pre-charge circuit (404) is further configured to connect a second battery (224-2) to the pre-charge capacitor (448) in response to a determination that the pre-charge capacitor (448) has been charged to a predetermined voltage, wherein the DAC (424) is configured to adjust the output (420) so that the comparator (412) opens the pre-charge switch (428), wherein the switch control module (240) is configured to open a first switch (232-1) and to close a second switch (232-2) and a third switch (232-3), wherein the first battery (224-1) and the second battery (224-2) are configured to charge the pre-charge capacitor (448) when the pre-charge switch (428) is closed.

The present invention provides a DA conversion device and the like that use the range of low voltage dependency of a MOS capacitor to make it possible to reduce nonlinearity of an output voltage. A charge scaling type DA conversion device comprising a high-order bit side capacitor array and a low-order bit side capacitor array that are connected via an attenuation capacitor comprises a control circuit that applies a voltage, to a plurality of capacitors of the high-order bit side capacitor array and a plurality of capacitors of the low-order bit side capacitor array, so that all of the capacitors have a positive bias voltage or a negative bias voltage at the times of reset and conversion of the DA conversion device, wherein at least one of a reference voltage of the low-order bit side capacitor array and a reset voltage is set to a value different from a reference voltage of the high-order bit side capacitor array.

The present disclosure provides for crossbar circuits with minimized write disturbance. A crossbar circuit may include a plurality of bit lines intersecting with a plurality of word lines, a plurality of select lines, a plurality of cross-point devices, and a ramp-rate adjustable DAC that comprises a control circuit and an operational amplifier. An input of the operational amplifier is connected to a capacitor. The control circuit may generate, based on a digital input, a control signal. To program a cross-point device of the crossbar circuit, the capacitor may be charged using a reference current. As the charging rate of the capacitor is limited by the reference current, and the charging duration is controlled by the control signal, thus the output of the operational amplifier corresponds to the digital input and may be applied to the cross-point device as a programming signal with limited slew-rate adjustable by the reference current.

The invention relates to an LED constant-current lighting system of an industrial endoscope and the industrial endoscope. The LED constant-current lighting system comprises a microcontroller unit, a digital-to-analog converter, an LED lamp, a switch type constant-current driving module, a low-dropout linear voltage regulator, a differential sampling operation unit and a charge pump converter, wherein the switch type constant-current driving module, the low-dropout linear voltage regulator, the differential sampling operation unit and the charge pump converter are respectively connected with a power supply; the microcontroller unit is connected with the digital-to-analog converter through an I2C communication bus; the digital-to-analog converter is connected with the constant-current driving module; the constant current driving module is connected with the anode of the LED lamp, and the cathode of the LED lamp is directly grounded; the low dropout regulator is respectively connected with the microcontroller unit and the digital-to-analog converter, and the differential sampling operation unit is connected in series between the constant current output end and the LED lamp; the charge pump converter provides a negative power supply for the differential sampling operation unit; meanwhile, the invention discloses an endoscope adopting the system. According to the invention, stable, stroboflash-free, color-fidelity and intelligently adjustable illumination can be provided for the industrial endoscope.

The invention relates to a system suitable for a signal source to realize mirror image signal and local oscillator leakage suppression, which comprises a baseband digital-to-analog converter, an I-path mixer, a Q-path mixer, a filter and a power amplifier, the baseband digital-to-analog converter respectively outputs an I-path signal and a Q-path signal, the I-path mixer receives the I-path signal, the Q-path mixer receives the Q-path signal, and the power amplifier outputs the Q-path signal. And the filter filters output signals of the I-path mixer and the Q-path mixer and outputs the filtered output signals to the power amplifier. The invention further relates to a method for suppressing the signal source mirror image signal and the local oscillator leakage condition. By adopting the system and the method suitable for the signal source to suppress the leakage of the mirror image signal and the local oscillator, the transmission of the signal is optimized when a circuit is designed, and the leakage and the mirror image of the local oscillator signal are suppressed by using a complex frequency mixing architecture, so that the cost can be reduced when a post-stage filter is selected, and the selection becomes easy.

The novel blind guiding stick comprises a stick body, a cavity is formed in the stick body, the inner bottom wall of the cavity is fixedly connected with a storage battery, the inner wall of the cavity is fixedly connected with a fixing frame, the inner side wall of the fixing frame is fixedly connected with an STM single-chip microcomputer, a digital-to-analog converter and a Bluetooth module, and the STM single-chip microcomputer, the digital-to-analog converter and the Bluetooth module are connected with the storage battery. Three light induction lamps are fixedly connected to the outer surface of the stick body, two small ultrasonic radars are fixedly connected to the lower portion of the outer surface of the stick body, the two small ultrasonic radars are arranged in a fan shape, a positioning sleeve is fixedly connected to the top end of the stick body, and a sliding ring is slidably connected to the interior of the positioning sleeve; and two rubber plates are clamped in the sliding ring. According to the tactile feedback-based blind guide stick, the tactile feedback-based navigation function is realized, the blind can be better guided to go to a destination according to a route and accurately and clearly guided to turn left and right, and the guide effect of the tactile feedback-based blind guide stick is effectively improved.

The application discloses an anti-radiation reinforced digital controlled oscillator, a clock data recovery circuit and equipment. The anti-radiation reinforced digital controlled oscillator is connected with an anti-radiation reinforced circuit unit between a digital-analog converter (DAC) and a voltage controlled oscillator (VCO). The anti-radiation reinforced circuit unit comprises a voltage replication unit and a multiplexer. The voltage replication unit is used for replicating a control voltage signal output by the digital-analog converter (DAC) and generating a replication voltage signal to be sent to the multiplexer. When the digital-analog converter (DAC) is subjected to single particle bombardment, the output of the multiplexer is switched from the control voltage signal to the replication voltage signal. The application aims to solve the problem that the traditional DCO type clock data recovery circuit is easily affected by single particles when running in a radiation environment, resulting in single particle function interruption and causing space task failure. The anti-radiation reinforced ability of the DCO type clock data recovery circuit when running in a radiation environment is improved.

A source driving circuit and an adjusting method therefor, and a display panel are provided. The source driving circuit includes: a DAC configured to obtain a grayscale value and convert the grayscale value into a grayscale voltage; a differential amplifier having a first input terminal connected to the DAC to obtain the grayscale voltage; a first bias circuit configured to apply a first bias tail current to the differential amplifier; a flip-flop connected to the DAC to obtain the grayscale value and a variation range of the grayscale value; and a second bias circuit connected to the flip-flop and configured to apply a second bias tail current to the differential amplifier in response to the variation range of the grayscale value satisfying a trigger condition.

This invention discloses a unidirectional anti-overlap control circuit and method based on a capacitor splitting architecture. The circuit includes a differential positive-terminal capacitive digital-to-analog converter (DAC), a differential negative-terminal capacitive digital-to-analog converter (DAC), a comparator, and a successive approximation control logic circuit. The differential positive-terminal capacitive digital-to-analog converter is connected to the positive input terminal of the comparator, the differential negative-terminal capacitive digital-to-analog converter is connected to the negative input terminal of the comparator, and the output terminal of the comparator is connected to the successive approximation control logic circuit. Both the differential positive-terminal capacitive digital-to-analog converter and the differential negative-terminal capacitive digital-to-analog converter include a first capacitor subarray and a second capacitor subarray. The successive approximation control logic circuit controls the unidirectional switching of the bottom plate of the first capacitor subarray from the reference voltage to the reference ground voltage, and the unidirectional switching of the bottom plate of the second capacitor subarray from the reference ground voltage to the reference voltage, by adjusting the input voltage. This invention avoids leakage current and improves the sampling rate and conversion accuracy by controlling the switching of the two sets of capacitor arrays.

The utility model discloses an intelligent sofa control system and an intelligent sofa, the system comprises an intelligent control terminal, a sensor unit, an interaction unit and a communication unit, the sensor unit and the interaction unit are installed on the intelligent sofa, and the intelligent control terminal is respectively connected with the sensor unit, the interaction unit and the communication unit; the sensor unit comprises a position sensor, a health state sensor and an environment sensor; the interaction unit comprises a display touch screen and a voice interaction device, a first digital-to-analog converter and a delay comparison circuit are arranged between the display touch screen and the intelligent control terminal, and a second digital-to-analog converter is arranged between the voice interaction device and the intelligent control terminal. According to the utility model, two modes of click operation and voice operation are provided, and the delay comparison circuit is arranged to compare and confirm the control instruction, so that the misoperation of the elderly user can be effectively avoided, the health of the elderly user can be monitored in real time, and the multi-aspect use requirements of the elderly group can be met.

The application relates to a method for adjusting the interrupt timing of arc detection, an arc detection method and a photovoltaic system. The method for adjusting the interrupt timing of arc detection comprises the following steps: determining the timing of a first number of analog-digital converter (ADC) interrupts to be started at a first frequency, wherein the ADC interrupts are used to obtain sampling data after ADC conversion of the arc parameter; determining the timing of a timer interrupt to be started at a second frequency, wherein the first frequency is at least twice the second frequency; based on the relative relationship between the timing of the timer interrupt and the timing of the ADC interrupts, at least one task performed in the timer interrupt is arranged to be performed in at least one ADC interrupt after the timer interrupt ends, so as to avoid the ADC interrupt immediately after the timer interrupt being triggered being delayed. The timing adjustment method can optimize the detection value exception in the arc detection process.

The application discloses a digital loudspeaker volume control method, device, equipment and medium, relates to the loudspeaker technical field, and is used for solving the problems of quality reduction and complex manufacturing process in the prior art. The method comprises the following steps: receiving a volume adjustment instruction; determining an electric energy signal loaded to a loudspeaker unit in each quantized audio digital stream based on the volume adjustment instruction; the electric energy signal at least comprises an electric energy amplitude signal or an electric energy action time signal; adjusting sound pulse energy output by the loudspeaker unit based on the electric energy amplitude or the electric energy action time, and completing volume adjustment. The scheme realizes volume control of digital sound production based on the electric energy amplitude or the electric energy action time, does not need a digital-analog converter, and does not need multiple transducing element hardware supports. On the basis of not increasing the number of rows of transducing elements, the electric signal energy loaded to the loudspeaker unit is controlled, so that the sound pulse energy output is controlled, and digital volume adjustment is realized.

Disclosed herein is a successive approximation register (SAR) analog-to-digital converter (ADC). The ADC includes a capacitive digital-to-analog converter (DAC) including a binary-weighted capacitor array, and a bridge capacitor separating the binary-weighted capacitor array into a first switched capacitor array connected to a first node and a second switched capacitor array connected to a second node, with a first terminal of the bridge capacitor being connected to the first node and a second terminal of the bridge capacitor being connected to the second node. A multipurpose capacitor is connected to the first node, with the multipurpose capacitor serving as both a termination capacitor for the first switched capacitor array and a shield between the first node and the bridge capacitor. A dummy is capacitor connected to the second node and serving as a shield between the second node and the bridge capacitor.

The utility model discloses a current compensation circuit and a chip, which are used for compensating the output current of a current type digital-to-analog converter, the current compensation circuit comprises a negative resistance unit connected with the output end of the current type digital-to-analog converter, and the negative resistance unit comprises a detection unit and a compensation unit, the detection unit generates a detection current based on an output voltage of the current-mode digital-to-analog converter. The compensation unit generates, based on the detection current, a compensation current opposite to the detection current in flow direction and for the injection node. According to the current compensation circuit and the chip, the detection unit shunts the output current of the current type digital-to-analog converter, the compensation unit generates the compensation current based on the detection current generated by shunting, the magnitude of the compensation current is adjustable, and the direction of the compensation current is opposite to that of the detection current. The output current of the current type digital-to-analog converter is compensated through the compensation current, so that the precision of the output current of the current type digital-to-analog converter under different loading conditions is improved.

The FMCW LiDAR system includes an optical drive electronic circuit to receive a reference frequency signal and a beat frequency signal to generate a drive signal. The optical drive electronic circuit includes a TDC to calculate a phase difference between the reference frequency signal and the beat frequency signal and a digital ramp control to: provided the phase difference is a positive value, produce a ramp down control signal to increase a current chirp rate to an increased chirp rate; provided the phase difference is a negative value, produce a ramp up control signal to decrease the current chirp rate to a decreased chirp rate. The optical drive electronic circuit includes a digital integrator to generate a digital output based on at least one of the ramp down control signal or the ramp up control signal and a DAC to convert the digital output to an analog output.

The application discloses a digital source single-reception network vector analysis system, which comprises a real-time signal processor, a digital-analog converter, a transmitting mixer, a local oscillator, a directional coupler, a test transmitting port, a test receiving port, a coupler and a receiving port selection switch, a receiving mixer and an analog-digital converter; the real-time signal processor transmits a data signal to the transmitting mixer through the digital-analog converter, and then transmits the data signal to the test transmitting port through the directional coupler; the test receiving port transmits a received data signal through the coupler and the receiving port selection switch, and the coupler and the receiving port selection switch transmit the data signal to the real-time signal processor through the receiving mixer and the analog-digital converter. The application provides a digital source single-reception network vector analysis system which has the advantages of good stability, accurate test frequency, simple structure, convenient use and high practicability.

A compensation circuit includes a computing processor, a DAC, and an amplifier circuit. The computing processor averages first digital codes to generate a first average digital code and averages second digital codes to generate a second average digital code. The second digital codes correspond to grayscale voltages provided from a source driver to pixels connected to a currently driven gate line. The first digital codes correspond to grayscale voltages provided from the source driver to pixels connected to a previously driven gate line. The DAC converts the first average digital code into a first voltage and converts the second average digital code into a second voltage, thereby generating a compensation signal transiting from the second voltage to the first voltage. The amplifier circuit generates an inverse noise signal according to the compensation signal and applies the inverse noise signal to an input terminal of the touch sensing circuit.

An audio D / A converter includes: a first segment D / A converter including N elements; a second segment D / A converter including N elements; a first oversampling filter configured to process a PCM signal; a second oversampling filter configured to process a PCM signal; a first multilevel ΔΣ modulator configured to process an output of the first oversampling filter; a second multilevel ΔΣ modulator configured to process an output of the second oversampling filter; a first switching controller configured to control the first segment D / A converter according to an input to the first switching controller; and a second switching controller configured to control the second segment D / A converter according to an input to the second switching controller.