4425 results about "Digital-to-analog converter" patented technology

A novel apparatus and method for a fully digital quadrature architecture for a complex modulator. The complex modulator can substitute for existing prior art analog quadrature modulator structures and those based on a digital polar architecture (r, θ). The modulator effectively operates as a complex digital-to-analog converter where the digital inputs are given in Cartesian form, namely I and Q representing the complex number I+jQ, while the output is a modulated RF signal having a corresponding amplitude and phase shift. The phase shift being with respect to a reference phase dictated by the local oscillator, which is also input to the converter / modulator. Several embodiments are provided including modulators incorporating dual I and Q transistor arrays, a single shared I / Q transistor array, modulators with single ended and differential outputs and modulators with single and dual polarity clock and I / Q data signals.

A processor operates on samples of a digital output signal to determine samples of a digital correction signal. The output signal samples are directed to an output channel for transmission from a speaker. The digital correction signal samples are supplied to a first digital-to-analog converter for conversion into an analog correction signal. The subtraction circuit generates a difference between a first analog signal provided by a microphone and the analog correction signal. The analog correction signal is an estimate of a contribution to the first analog signal due to a direct path transmission between the speaker and the microphone. The processor also receives a digital input signal derived from the difference signal, and, performs acoustic echo cancellation on the digital input signal to obtain a resultant signal. The acoustic echo cancellation is configured to remove contributions to the digital input signal due to reflected path transmissions.

A method for transmitting digital beamformed signals in a transmit array antenna apparatus utilizing a single transceiver with one power amplifier, one up-frequency converter and one digital-to-analog converter for said array transmit antenna apparatus comprising the steps of: generating a first set of direct-sequence spread spectrum codes; generating a plurality of weights, each weight being a beamforming amplitude and phase or delay for each element; generating a direct-sequence spread spectrum multiplexed signal containing such weights while using one of such first-set codes per element; converting such an multiplexed signal to a convenient radio frequency; amplifying and transmitting such a multiplexed radio frequency signal to the elements; generating a second set of direct-sequence spread spectrum codes; extracting a radio frequency signal with direction-bearing weight information at each element while using a subset of codes from the second set; generating a third set of direct-sequence spread spectrum codes at each element; transmitting a signal with array gain beamformed towards a specific direction while using a transmit array apparatus composed of spaced elements, such a transmit beamformed signal being a radio frequency signal, a direct-sequence spread spectrum radio frequency signal containing a subset of codes from the third set, or a sequence of radio frequency pulses that have short duration and high power.

A power supply provides digital data coupling for power-line networking. The power supply includes a power supply side digital interface to transmit and receive a digital data passed through a digital coupler to and from a power-line network access circuitry side digital interface of power-line network access circuitry. The power supply further includes a digital-to-analog converter to process digital data into a high-frequency analog data carrier to provide to a power line of a power-line network. An analog-to-digital converter of the power supply converts a high-frequency analog data carrier from the power line into digital data for the power-line network access circuitry. A power-line analog front end of the power supply transmits and receives the high-frequency analog data carrier to and from the power line. Digital data exchanged between the power supply and the network access circuitry may include control signals for a control circuitry of the power supply. Control circuitry of the power supply may handle control of the digital-to-analog converter, the analog-to-digital converter and the analog front end.

The invention is a switched-matrix output for a multi-channel stimulator. The switch-matrix output system uses groups of switches connectively placed between N number of digital-to-analog convertors (DACs) and M electrode contacts to permit fewer, space-consuming DACs to be used in an implantable stimulator, thereby saving internal stimulator space. One embodiment of the switched matrix output uses switches to activate only one active-electrode subset of M electrode contacts at any one time, so that the total number of DACs contained in the stimulator can be less than the M total number of electrode contacts.

A digital audio player, including a casing, a memory within said casing for storing digital audio including songs and a commercial, a digital-to-analog converter within said casing and operatively connected to said memory for converting digital audio to analog audio, an analog audio player within said casing and operatively coupled to said digital-to-analog converter, for playing the songs in response to manual user commands, and for automatically playing the commercial, and a processor for stopping the automatic playing of the commercial after a specific event has occurred. A method and a computer-readable storage medium are also described.

An embodiment of the invention uses a predistortion correction signal to combination the modulated RF signal by an analog multiplier for linearization of power amplifiers having nonlinear characteristics such as those used in wireless RF transmitters. A predistortion controller comprises a plurality of down converters for retrieving both the ideal non-distorted information and the feedback distorted information, together with pre-stored digitally-indexed predistortion information stored, for example, in a look-up table. The digitally-indexed information models nonlinear characteristics of the high power amplifier, and is stored prior to processing of pre-compensation in the power amplifier. When the predistortion information is combined with the modulated RF signal in the analog multiplier, the result is a substantially linear information transmission from the power amplifier. In an embodiment of the system, the modulated RF input signal and the feedback signal from PA output are down-converted, respectively, by analog devices, such as mixers, after which the analog intermediate frequency (IF) signals are digitized by analog-to-digital converters for digital predistortion correction processing, followed by predistortion processing performed by, for example, a DSP or FPGA chip to generate a digital correction control signal, which is then converted to an analog signal by a digital-to-analog converter, followed by combining the analog correction signal with the RF modulated input signal to yield the input to the power amplifier.

Our invention is an apparatus and method to identify and simultaneously visualize and hear musical notes contained in an analog or digital sound wave. Musical notes are expanded into a language for the eye as well as the ear. An analog-to-digital converter processes an analog sound wave to provide a digital sound wave. Component frequencies of the digital sound waves are identified, filtered and translated to their corresponding musical note and volume. As the original digital sound wave is sent through a digital-to-analog converter and output to an audio device, the identified musical notes are synchronously output to a display device. User-specified parameters, adjustable at any time before, during or after the music-playing process, control frequency filtering, the graphic display of the identified musical notes and the graphical background on which the musical notes are displayed. Users may also utilize existing, or create their own, computer programming code software modules, known as plug-ins, or hardware components, to interface with the invention to extend and control the invention's functionality. Because the synchronous musical note identification and visualization process occurs extremely quickly, the method applies and works in real-time for live music.

A method of and system for monitoring condition of a large capacitor connected across an output of a rectifier circuit in an operating electrical power transmission circuit in order to anticipate capacitor failure and facilitate appropriate corrective action is disclosed. The method includes measuring a ripple voltage on the capacitor and ripple current through the capacitor, determining from a representative signal whether the signal exceeds a predetermined threshold; and sending an output to a controller on a system operator if the signal exceeds the predetermined threshold. The ripple current and ripple voltage measurements may be provided as inputs to a digital to analog converter which produces and sends the representative signal to a microprocessor to generate the output to the controller.

A touchscreen system for increasing the dynamic range of the system comprising a touchscreen coupled to an offset cancellation element and a capacitance measuring element. The offset cancellation element is configured to be dynamically changed in capacitance such that it offsets parasitic and sensor capacitances of the touchscreen sensors thereby leaving only touch event capacitance to be measured by the measuring element. The offset cancellation element is able to adjust to the initial unwanted capacitances of each sensor as well as dynamically adjust to changes in the unwanted capacitance due to the environment. In some embodiments, the offset cancellation element is a capacitance digital-to-analog converter that is controlled by a controller for offsetting the unwanted capacitance. As a result, the touchscreen system is able to utilize a small integrating capacitor thereby lowering cost and improving the dynamic range of the system.

Gas detection or monitoring apparatus mainly comprising, an optical source unit including a tunable diode laser, an optical detection unit including a light sensitive detector, the source and the detector being arranged so that light from the source propagates through a gas measurement volume prior to being received by the detector, and the source being adapted to scan the light wavelength across one or more expected absorption lines of gases in the measurement volume, a control and processing unit for control and modulation of the source and processing of the detected signal and for calculating at least one digital value representing (a) gas concentrations in the gas measurement volume, wherein said control and processing unit is coupled to the source via a digital-to-analogue (D / A) converter, and the detector output signal is coupled to the input of an analogue-to-digital (A / D) converter, and the output of the A / D converter is coupled to the processing unit.

A method and apparatus for providing a substantially real-time representation of an analog representation of a physiological signal. The waveform signal from the sensor is converted into digital form. A delta-sigma modulator is used as a simple Digital-to-analog Converter (ADC). The output can then be provided through a simple hardware filter to give an analog output signal in nearly real-time, which can be used for other instruments, synchronization, display, etc.

A digital predistortion amplifier design compensates for non-linear amplification of an input signal using predistortion techniques. The design provides a reduced noise floor by using separate digital to analog converters (DAC) to separately convert the input signal and an error correction signal. Furthermore, the input signal can be separated into two or more subbands of narrower bandwidth. Each of the subbands are converted to analog using a separate DAC. By reducing the power and / or bandwidth to be handled by any one DAC, the available levels of quantization of the DAC are applied to a lower power signal and therefore the signal to noise ratio resulting from the conversion process is improved. In addition, each digital subband is passed through a correction filter, which is driven by an adaptive control processing and compensation estimator to compensate for relative gain, phase, and delay inconsistencies between the different subbands.

An apparatus and method for amplifying a Transmit (Tx) signal according to an Envelope Tacking (ET) scheme in a wireless communication system are provided. A transmitting end apparatus includes an envelope gain controller for controlling a gain of a digital baseband Tx signal in accordance with power control, a detector for detecting an envelope signal from the digital baseband Tx signal whose gain is controlled, and for shaping on the envelope signal, a first Digital to Analog Converter (DAC) for converting the shaped envelope signal into an analog signal, and an envelope modulator for generating a drain bias of a power amplifier that amplifies a Radio Frequency (RF) Tx signal by using the analog envelope signal. Accordingly, a digital-based ET scheme is implemented, and by using a plurality of shaping tables, efficiency of the ET scheme can be maximized in a transmitting end that uses power control.

An analog-to-digital converter system [50D] processing an input signal, g, which can be either a discrete-time or a continuous-time signal. A first quantizer [154] generates a first digital signal, d0(k), representing the sum of the input signal, g, and a dithering signal, y0. A digital-to-analog converter [156] generates an analog feedback signal, alpha, representing accurately the first digital signal, d0(k). The DAC [156] may be linearized by the use of mismatch-shaping techniques. A filter [158] generates the dithering signal, y0, by selectively amplifying in the signal band the residue signal, r0, defined as the difference of the input signal, g, and the analog feedback signal, alpha. Optional signal paths [166][168] are used to minimize the closed-loop signal transfer function from g to y0, which ideally will be zero. An analog compensation signal, m0, which is described by a well-controlled relationship to the residue signal, r0, is extracted from the filter [158]. Ideally, the closed-loop signal transfer function from g to m0 will be zero, or at least small in the signal band. A second quantizer [160] converts the analog compensation signal, m0, into a second digital signal, dm0(k). The two digital signals, d0(k) and dm0(k), are filtered individually and then added to form the overall output signal, dg(k). The second digital filter [164] has a low signal-band gain, which implies that the sensitivity to signal-band errors caused by the second quantizer [160] will be low. The output signal, dg(k), is a highly-accurate high-resolution representation of the input signal, g. Circuit imperfections, such as mismatch, gain errors, and nonlinearities, will cause only noise-like errors having a very low spectral power density in the signal band.The invention facilitates the implementation of uncalibrated highly-linear high-resolution wide-bandwidth A / D converters [50D], e.g., for use in digital communication systems, such as xDSL modems and other demanding consumer-market products for which low cost is of the essence.

In one embodiment, the present invention includes a test signal generator capable of producing an impedance test signal comprising of a sine wave having a known frequency. The test signal generator may include a crystal oscillator, a counter, and a lookup table. The lookup table output is applied to a digital to analog converter and is then low pass filtered using a conventional analog filter to produce a sine wave of a known frequency and voltage amplitude. The test signal flows through the electrode and combines with an electrophysiological signal to form a combined signal. A signal processor is used to isolate the combined signal into the test signal component and the electrophysiological component. The signal processor digitally low pass filters the combined signal and the output of the low pass filter is the electrophysiological signal. The signal processor then digitally bandpass filters the combined signal using a filter with a center frequency which is the same as the test frequency. The output of this filter is then used to calculate the electrode impedance.

An architecture is described for digital multi-phase modulators (MPM) that leads to an efficient, high performance hardware realization. The combined modulator, switching phases and output filter can be viewed as a multi-level digital to analog converter with high power output, or a power D / A, and concepts used in D / A converters are leveraged to achieve high performance and hardware efficiency. The modulator can be split into three functional blocks including a decoder that determines how many phases are on at any time, a selector that determines which phases are on at any time, and a single high resolution module that is time shared among all phases. The resulting architecture scales favorably with a large number of phases, fs, facilitates fast update rates of the input command well above the single phase switching frequency and is compatible with a wide range of known DPWM techniques for the LSB module and resolution-enhancement techniques such as dithering or Σ-Δ modulation.

A low-delay signal processing system and method are provided which includes a delta-sigma analog-to-digital converter, an oversampling processor, and a delta-sigma digital-to-analog converter. The delta-sigma analog-to-digital converter receives an input or audio signal and generates a digital sample signal at a high oversampling rate. The oversampling processor is connected to the analog-to-digital converter for processing the digital sample signal at the high oversampling rate with low-delay. The delta-sigma digital-to-analog converter is connected to the oversampling processor for receiving the digital sample signal at the high oversampling rate with low-delay for generating an analog signal. The oversampling processor includes a low-delay filter and a programmable delay element. In this manner, the analog signal is produced with a low delay and high accuracy.

The present invention is a correction system applying in an analog front end(AFE). The correction system comprises a correction module, a first digital to analog converter(DAC1) and a second digital to analog converter(DAC2). The correction is used to generate a gain error correction and black pixel signal error correction when the black pixel signal is inputted into the AFE. The correction module corrects the digital output signals generated by the AFE according to the gain error correction. The correction module input the black pixel signal error correction to the DAC1 to generate a first analog correction signal to correct the signal inputted into the AFE. The present invention effectively corrects the signal error generated by the AFE to make the AFE output the corrected digital output signal.

An integrated audio transducer with associated signal processing electronics is disclosed. A silicon audio transducer, such as a MEMS microphone or speaker, can be integrated with audio processing electronics in a single package. The audio processing electronics can be configured using control signals. The audio processing electronics can provide a single line serial data interface and a single line control interface. The audio transducers can be integrated with associated processing electronics. A silicon microphone can be integrated with an Analog to Digital Converter (ADC). The ADC output can be a single line serial interface. The ADC can be configured using a single line serial control interface. A speaker may be integrated with a Digital to Analog Converter (DAC). Audio transducers can also be integrated with more complex processing electronics. Audio processing parameters such as gain, dynamic range, and filter characteristics may be configured using the serial interface.

An intelligent electronic device for monitoring and determining an amount of electrical power usage by a consumer, or end user, and for providing broadband Internet access to the consumer. The intelligent electronic device includes at least one sensor coupled to an electric circuit configured for measuring at least one power parameter of the electrical circuit and generating at least one analog signal indicative of the at least one power parameter; at least one digital to analog converter coupled to the at least one sensor configured for receiving the at least one analog signal and converting the at least one analog signal to at least one digital signal; a processor configured for receiving the at least one digital signal and calculating energy consumption in the electrical circuit; and a gateway configured for receiving data transmissions imposed on the electrical circuit and for demodulating the imposed data transmission for providing data communications.

An apparatus for generating an image of touch on or about a touch-sensitive surface comprising a touch panel is disclosed. The touch panel can include a plurality of touch sensors configured for detecting one or more touch events occurring at distinct locations at about the same time. Each touch event can comprise a touching of an object against the touch-sensitive surface. A plurality of receive channels can be coupled to the touch panel for generating values representative of detected touch events. The receive channels can include a charge redistribution successive approximation register digital-to-analog converter (SAR ADC) configured to convert an analog waveform into a digital representation via a binary search and outputting the digital representation to an output register. The SAR ADC architecture can be such that it the dynamic input range can be scaled and offset adjusted.

A wireless transmitter (300) communicates with a wireless earphone (100) to obtain remote communications. The wireless earphone includes: a wireless network card (30′) complying with the 802.11a / b / g standard, for receiving data packets and unpacking them to release digital audio signals; a control processor (20′) connected with the wireless network card, for dealing with the digital audio signals; and a digital-to-analog converter (50) connected with the control processor, for converting the digital audio signals to analog audio signals. The wireless transmitter has a structure similar to that of the wireless earphone, except that the wireless transmitter has an analog-to-digital converter (10) instead of the digital-to-analog converter.

The present invention is a network speaker 100 for an audio network distribution system 20. The present invention includes a network interface 110 that couples the network controller 120 to the audio network distribution system 20. The present invention additionally includes an audio format converter 121, a digital to analog converter (DAC) 122, a pre-amplifier 123, an amplifier 125, and may also include an analog to digital converter (ADC) 128. Additionally, the present invention includes speaker sensors 124 and a speaker / microphone driver 126.

A digital predistortion amplifier design compensates for non-linear amplification of an input signal using predistortion techniques. The design provides a reduced noise floor by using separate digital to analog converters (DAC) to separately convert the input signal and an error correction signal. Furthermore, the input signal can be separated into two or more subbands of narrower bandwidth. Each of the subbands are converted to analog using a separate DAC. By reducing the power and / or bandwidth to be handled by any one DAC, the available levels of quantization of the DAC are applied to a lower power signal and therefore the signal to noise ratio resulting from the conversion process is improved. In addition, each digital subband is passed through a correction filter, which is driven by an adaptive control processing and compensation estimator to compensate for relative gain, phase, and delay inconsistencies between the different subbands.

A method and apparatus for processing a composite acoustic signal to reconstruct an acoustic signal that substantially matches a selected one of a plurality of sources. A plurality of microphones positioned at different spatial locations detect. variations in sound pressure level resulting from the activity of a plurality of acoustic sources at different locations. The outputs of the microphones are sampled and digitized, and the resulting digital waveform from each microphone is provided as an input to a corresponding filter bank. The outputs of the filter banks are input to a comparison unit. A comparison control unit generates "signature" information that characterizes each source with respect to the microphones. The comparison unit receives "signature" information of a selected source from the comparison control unit and provides an output to a synthesizer unit which produces a synthesized digital waveform for the selected source. Optionally, the synthesized digital waveform is input to a digital-to-analog (D / A) converter to generate an analog signal of the reconstructed source.

D / A converter of this invention including n+1 capacitors in total consisting of one terminating capacitor (C0) and n binary-weighted capacitors (C1-4) that are subjected to binary weighting ratio of 1:2:4: . . . :2(n−1), and, an inverting amplifier (INV1), further comprising: a feedback switching means (SWR5) provided between the input and output of the inverting amplifier (INV1); a switching means for terminating operation (SWR0) supplies one of two main reference voltages (VB,VT) to the terminating capacitor (C0), and then, makes connection of the terminating capacitor (C0) to the output of the inverting amplifier (INV1); a plurality of switching means for input operation (SWD1-4,SWR1-4) makes selection of one of the two main reference voltages (VB,VT) to be provided for the n binary-weighted capacitors (C1-4) depending on digital data (D1-4), and then, makes connection of the second terminal side of the n binary-weighted capacitors (C1-4) to the output of the inverting amplifier (INV1).

A digital to analog converter includes a digital processor having an input port adapted to receive an input signal and an output port coupled to an input port of an analog filter wherein the digital processor includes a digital feedback loop which compares a reference digital voltage with a digital voltage provided by a digital model of the analog filter. Using a completely digital feedback loop which compares an input digital voltage with the digital voltage from the digital model of the analog filter results in a single bit digital to analog converter having improved accuracy for a given clock rate and filter. The next digital state of the converter (i.e. ‘0’ or ‘1’) is selected based upon a comparison of the input (or reference) voltage with the digital voltage provided by the digital feedback loop. The digital converter output is then fed to the analog filter. If the analog filter matches the digital model, then the analog voltage will match the digital voltage, and therefore the reference voltage.

The invention discloses a simultaneous common-frequency full duplex self-interference offset method in a multi-path environment. The method comprises the steps that in the transmission end, a digital signal to be transmitted is sent to a signal pre-correction module and a digital interference offset module, and a radio frequency signal to be transmitted is sent to a radio frequency interference reconstruction unit. The signal outputted by the signal pre-correction module passes through a DAC (digital-to-analog converter) and a transmission radio frequency channel to form a pre-corrected radio frequency signal. In the receiving end, the outputted self-interference signal subtracts the pre-corrected radio frequency signal and the radio frequency signal processed by the radio frequency interference reconstruction unit, the radio frequency self-interference offset is finished, and the offset signal, the pre-corrected radio frequency signal and the converted digital signal are sent to the digital interference offset module to finish the digital interference offset, together with the digital signal to be transmitted and the pre-corrected digital signal. The simultaneous common-frequency full duplex self-interference offset method under the multi-path environment is applicable to a simultaneous common-frequency system, the utilization rate of spectrum is doubled, the radio frequency self-interference offset performance is improved, the communication quality of the system is improved, and the working stability of communication equipment in a simultaneous common-frequency multi-path environment is improved.

The present invention provides for a system and method for improvement of radio transmitter and receiver frequency accuracy for a local radio communication unit that communicates digital data with a remote communication unit. In the local unit the received radio signal is down-converted, and converted to complex baseband digital samples by an analog-to-digital converter. A downlink digital phase rotator applies a fine frequency shift to the samples in accordance with a receiver frequency offset command. The resultant baseband signal is used by the data demodulator and by a receiver frequency error estimator to obtain receiver frequency errors. A data modulator generates baseband complex samples which are shifted in carrier frequency by an integrated uplink digital phase rotator in accordance with a transmitter frequency offset command. The modulated samples are then converted by a digital-to-analog converter and upconverted in frequency for radio transmission to the remote unit. The local oscillator signals for both upconverter and downconverter are phase locked to a reference frequency generated by a VCXO. An automatic frequency control (AFC) function nulls the transmitter and receiver frequency error by the frequency adjustment commands to the uplink and downlink phase rotators or to the VCXO digital-to-analog converter (VCXO DAC) by feedback control principals based on measured receiver frequency error. During frequency track mode when communications between local and remote units are possible, the AFC only adjusts radio frequency via phase rotator commands and the VCXO command remains fixed, thereby avoiding communications performance degradation by VCXO frequency quantization error due to the VCXO DAC. The AFC adjusts VCXO frequency only during a preliminary acquisition mode prior to data communications, or to back out excessively large frequency offsets accumulated in the downlink and uplink phase rotators during track mode. When a VCXO adjustment is made in track mode, phase rotator adjustments are simultaneously applied to cancel the errors in transmitter and receiver radio frequencies caused by the step change due to VCXO frequency quantization thereby mitigating VCXO frequency quantization noise.