4379 results about "Digital-to-analog converter" patented technology

A novel apparatus and method for a fully digital quadrature architecture for a complex modulator. The complex modulator can substitute for existing prior art analog quadrature modulator structures and those based on a digital polar architecture (r, θ). The modulator effectively operates as a complex digital-to-analog converter where the digital inputs are given in Cartesian form, namely I and Q representing the complex number I+jQ, while the output is a modulated RF signal having a corresponding amplitude and phase shift. The phase shift being with respect to a reference phase dictated by the local oscillator, which is also input to the converter / modulator. Several embodiments are provided including modulators incorporating dual I and Q transistor arrays, a single shared I / Q transistor array, modulators with single ended and differential outputs and modulators with single and dual polarity clock and I / Q data signals.

A method for transmitting digital beamformed signals in a transmit array antenna apparatus utilizing a single transceiver with one power amplifier, one up-frequency converter and one digital-to-analog converter for said array transmit antenna apparatus comprising the steps of: generating a first set of direct-sequence spread spectrum codes; generating a plurality of weights, each weight being a beamforming amplitude and phase or delay for each element; generating a direct-sequence spread spectrum multiplexed signal containing such weights while using one of such first-set codes per element; converting such an multiplexed signal to a convenient radio frequency; amplifying and transmitting such a multiplexed radio frequency signal to the elements; generating a second set of direct-sequence spread spectrum codes; extracting a radio frequency signal with direction-bearing weight information at each element while using a subset of codes from the second set; generating a third set of direct-sequence spread spectrum codes at each element; transmitting a signal with array gain beamformed towards a specific direction while using a transmit array apparatus composed of spaced elements, such a transmit beamformed signal being a radio frequency signal, a direct-sequence spread spectrum radio frequency signal containing a subset of codes from the third set, or a sequence of radio frequency pulses that have short duration and high power.

A digital audio player, including a casing, a memory within said casing for storing digital audio including songs and a commercial, a digital-to-analog converter within said casing and operatively connected to said memory for converting digital audio to analog audio, an analog audio player within said casing and operatively coupled to said digital-to-analog converter, for playing the songs in response to manual user commands, and for automatically playing the commercial, and a processor for stopping the automatic playing of the commercial after a specific event has occurred. A method and a computer-readable storage medium are also described.

An embodiment of the invention uses a predistortion correction signal to combination the modulated RF signal by an analog multiplier for linearization of power amplifiers having nonlinear characteristics such as those used in wireless RF transmitters. A predistortion controller comprises a plurality of down converters for retrieving both the ideal non-distorted information and the feedback distorted information, together with pre-stored digitally-indexed predistortion information stored, for example, in a look-up table. The digitally-indexed information models nonlinear characteristics of the high power amplifier, and is stored prior to processing of pre-compensation in the power amplifier. When the predistortion information is combined with the modulated RF signal in the analog multiplier, the result is a substantially linear information transmission from the power amplifier. In an embodiment of the system, the modulated RF input signal and the feedback signal from PA output are down-converted, respectively, by analog devices, such as mixers, after which the analog intermediate frequency (IF) signals are digitized by analog-to-digital converters for digital predistortion correction processing, followed by predistortion processing performed by, for example, a DSP or FPGA chip to generate a digital correction control signal, which is then converted to an analog signal by a digital-to-analog converter, followed by combining the analog correction signal with the RF modulated input signal to yield the input to the power amplifier.

A digital predistortion amplifier design compensates for non-linear amplification of an input signal using predistortion techniques. The design provides a reduced noise floor by using separate digital to analog converters (DAC) to separately convert the input signal and an error correction signal. Furthermore, the input signal can be separated into two or more subbands of narrower bandwidth. Each of the subbands are converted to analog using a separate DAC. By reducing the power and / or bandwidth to be handled by any one DAC, the available levels of quantization of the DAC are applied to a lower power signal and therefore the signal to noise ratio resulting from the conversion process is improved. In addition, each digital subband is passed through a correction filter, which is driven by an adaptive control processing and compensation estimator to compensate for relative gain, phase, and delay inconsistencies between the different subbands.

An architecture is described for digital multi-phase modulators (MPM) that leads to an efficient, high performance hardware realization. The combined modulator, switching phases and output filter can be viewed as a multi-level digital to analog converter with high power output, or a power D / A, and concepts used in D / A converters are leveraged to achieve high performance and hardware efficiency. The modulator can be split into three functional blocks including a decoder that determines how many phases are on at any time, a selector that determines which phases are on at any time, and a single high resolution module that is time shared among all phases. The resulting architecture scales favorably with a large number of phases, fs, facilitates fast update rates of the input command well above the single phase switching frequency and is compatible with a wide range of known DPWM techniques for the LSB module and resolution-enhancement techniques such as dithering or Σ-Δ modulation.

An intelligent electronic device for monitoring and determining an amount of electrical power usage by a consumer, or end user, and for providing broadband Internet access to the consumer. The intelligent electronic device includes at least one sensor coupled to an electric circuit configured for measuring at least one power parameter of the electrical circuit and generating at least one analog signal indicative of the at least one power parameter; at least one digital to analog converter coupled to the at least one sensor configured for receiving the at least one analog signal and converting the at least one analog signal to at least one digital signal; a processor configured for receiving the at least one digital signal and calculating energy consumption in the electrical circuit; and a gateway configured for receiving data transmissions imposed on the electrical circuit and for demodulating the imposed data transmission for providing data communications.

The present invention is a network speaker 100 for an audio network distribution system 20. The present invention includes a network interface 110 that couples the network controller 120 to the audio network distribution system 20. The present invention additionally includes an audio format converter 121, a digital to analog converter (DAC) 122, a pre-amplifier 123, an amplifier 125, and may also include an analog to digital converter (ADC) 128. Additionally, the present invention includes speaker sensors 124 and a speaker / microphone driver 126.

A digital predistortion amplifier design compensates for non-linear amplification of an input signal using predistortion techniques. The design provides a reduced noise floor by using separate digital to analog converters (DAC) to separately convert the input signal and an error correction signal. Furthermore, the input signal can be separated into two or more subbands of narrower bandwidth. Each of the subbands are converted to analog using a separate DAC. By reducing the power and / or bandwidth to be handled by any one DAC, the available levels of quantization of the DAC are applied to a lower power signal and therefore the signal to noise ratio resulting from the conversion process is improved. In addition, each digital subband is passed through a correction filter, which is driven by an adaptive control processing and compensation estimator to compensate for relative gain, phase, and delay inconsistencies between the different subbands.

The present invention provides for a system and method for improvement of radio transmitter and receiver frequency accuracy for a local radio communication unit that communicates digital data with a remote communication unit. In the local unit the received radio signal is down-converted, and converted to complex baseband digital samples by an analog-to-digital converter. A downlink digital phase rotator applies a fine frequency shift to the samples in accordance with a receiver frequency offset command. The resultant baseband signal is used by the data demodulator and by a receiver frequency error estimator to obtain receiver frequency errors. A data modulator generates baseband complex samples which are shifted in carrier frequency by an integrated uplink digital phase rotator in accordance with a transmitter frequency offset command. The modulated samples are then converted by a digital-to-analog converter and upconverted in frequency for radio transmission to the remote unit. The local oscillator signals for both upconverter and downconverter are phase locked to a reference frequency generated by a VCXO. An automatic frequency control (AFC) function nulls the transmitter and receiver frequency error by the frequency adjustment commands to the uplink and downlink phase rotators or to the VCXO digital-to-analog converter (VCXO DAC) by feedback control principals based on measured receiver frequency error. During frequency track mode when communications between local and remote units are possible, the AFC only adjusts radio frequency via phase rotator commands and the VCXO command remains fixed, thereby avoiding communications performance degradation by VCXO frequency quantization error due to the VCXO DAC. The AFC adjusts VCXO frequency only during a preliminary acquisition mode prior to data communications, or to back out excessively large frequency offsets accumulated in the downlink and uplink phase rotators during track mode. When a VCXO adjustment is made in track mode, phase rotator adjustments are simultaneously applied to cancel the errors in transmitter and receiver radio frequencies caused by the step change due to VCXO frequency quantization thereby mitigating VCXO frequency quantization noise.

The present invention relates to a liquid crystal display, a driving device thereof, a digital to analog converter, and an output voltage amplifying circuit. The present invention provides a liquid crystal display driving device including a reference gray voltage generator for generating a plurality of reference gray voltages, and a data driver for generating a plurality of gray voltages based on the plurality of reference gray voltages and applying a data signal that is generated by selecting a gray voltage corresponding to m-bit video signals applied from the outside from among the plurality of gray voltages to the pixel The data driver includes: a voltage generator for selecting a first gray voltage and a second gray voltage corresponding to bit values of (m−k) bits from among the video signal from among the plurality of gray voltages, and outputting the first and second gray voltages; an output voltage generator for outputting 2k voltages determined as one of the first and second gray voltages corresponding to bit values of k bits from among the video signal; and an output voltage amplifier for generating the data signal by combining the 2k voltages, and applying the data signal to a plurality of pixels. According to the present invention, a liquid crystal display having a small cost and area can be realized.

A low power (and lower cost) implementation for amplifier used in delivering a stimulation pulse is provided according to embodiments through use of a pre-charge period for each pulse. For example, a voltage at a variable output terminal of a digital-to-analog converter is increased on the leading edge of PULSE and INVERTCLK signals to result in an output of an operational amplifier increasing to a predetermined voltage prior to output of a stimulation pulse, according to an embodiment. A shunt path may be implemented to shunt current away from a load during the pre-charge period.