Patents
Literature
Patsnap Copilot is an intelligent assistant for R&D personnel, combined with Patent DNA, to facilitate innovative research.
Patsnap Copilot

1590 results about "Low delay" patented technology

Announced dynamic access probability protocol for shared bandwidth networks

A system and a method for a dynamic probability access protocol for determining access to shared channels. Some networks have a common channel which is shared by many users. A key issue in such networks is the allocation of the shared channel among many competing users. The system and method of the present invention enable media access control in shared bandwidth networks. When the user wishes to send a message, the user transmits with a probability p, which depends on the load on the channel. The probability p is announced by the network, and transmitted to the users as a broadcast message. Under conditions of low load, the probability p approaches 1, while at high load p is relatively low. This media access control protocol guarantees high channel utilization at high load, as well as low delay at low load periods. The proposed method is applicable on wireless networks, such as cellular networks and satellite-based networks. In addition, the method and system of the present invention can be used in wired networks, for other applications such as local area networks (LAN), client / server networks, and accessing a Web site through the Internet. The method and system of the present invention are able to reduce the likelihood of collisions, without increasing the access delay at low load periods.
Owner:RAMOT UNIV AUTHORITY FOR APPLIED RES & INDAL DEVMENT

Method and apparatus for a parallel data storage and processing server

The present invention concerns a parallel multiprocessor-multidisk storage server which offers low delays and high throughputs when accessing and processing one-dimensional and multi-dimensional file data such as pixmap images, text, sound or graphics. The invented parallel multiprocessor-multidisk storage server may be used as a server offering its services to computer, to client stations residing on a network or to a parallel host system to which it is connected. The parallel storage server comprises (a) a server interface processor interfacing the storage system with a host computer, with a network or with a parallel computing system; (b) an array of disk nodes, each disk node being composed by one processor electrically connected to at least one disk and (c) an interconnection network for connecting the server interface processor with the array of disk nodes. Multi-dimensional data files such as 3-d images (for example tomographic images), respectively 2-d images (for example scanned aerial photographs) are segmented into 3-d, respectively 2-d file extents, extents being striped onto different disks. One-dimensional files are segmented into 1-d file extents. File extents of a given file may have a fixed or a variable size. The storage server is based on a parallel image and multiple media file storage system. This file storage system includes a file server process which receives from the high level storage server process file creation, file opening, file closing and file deleting commands. It further includes extent serving processes running on disk node processors, which receive from the file server process commands to update directory entries and to open existing files and from the storage interface server process commands to read data from a file or to write data into a file. It also includes operation processes responsible for applying in parallel geometric transformations and image processing operations to data read from the disks and a redundancy file creation process responsible for creating redundant parity extent files for selected data files.
Owner:AXS TECH

Multi-core DSP (digital signal processor) system-on-chip and data transmission method

InactiveCN102521201ASimplified Access to ArbitrationReduce synchronization operationsMemory adressing/allocation/relocationDigital computer detailsStreaming dataDigital signal processing
The embodiment of the invention provides a multi-core DSP (digital signal processor) system-on-chip and a data transmission method. The system comprises a main processor, multiple slave processors and an external memorizer, wherein each main processor and slave processor respectively comprise a processor core, a memorizer-on-chip and a direct memory access (DMA) controller, the main processor controls and accesses the external memorizer through an I/O (input/output) controller, data exchange can be realized among processors through an internet-on-chip, wherein the internet-on-chip is composed of a star network, a loop network and a serial network. The internet-on-chip provided by the embodiment of the invention combines the star network, the loop network and the serial network, so that the internet-on-chip can not only provide streaming data transmission with high bandwidth, but also provide short message transfer with low delay. Besides, the embodiment of the invention simplifies the access arbitration of the external memorizer through the software control of the main processor, reduces the synchronous operations among the multi-core processors through the network data buffer and lowers the complexity of the program design of the multi-core processors.
Owner:刘大可

System and method for supporting mixed service based on integrated open network

ActiveCN101826987AFlexible and diverse mix of servicesReduce secondary development workloadProgram controlData switching networksThird generationThe Internet
The invention relates to a system and a method for supporting a mixed service based on an integrated open network. The system is provided with a template multiplexing-based service generation subsystem, a mixed service-oriented multitask concurrent execution subsystem, a service resource access subsystem and a service management subsystem. The system provides template multiplexing-based service generation and multitask concurrent execution in the integrated open network environment by integrating an IP network with a PSTN, a 2G mobile network, a 2.5G mobile network and a 3G mobile network, and Wi-Fi, Wi-MAX and all kinds of heterogeneous networks of packet data network. In the system, the quick service generation is realized due to the adoption of a service system structure-oriented SOA and on the basis of the template multiplexing thought; and operation environment of an integrated network service is provided on the basis of a service bus integrated with a dynamic flow performance engine and a low delay event service engine, so the service capacity of integrating the internet with the telecommunication field is realized, and the aim of providing flexible and various personalized services and supporting multitask concurrent execution is fulfilled.
Owner:BEIJING UNIV OF POSTS & TELECOMM
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products