113 results about "Binary neural network" patented technology

A system for accelerating binary convolution operations of a neural network includes a set of destination registers, binary convolution circuitry, a decoder coupled to the binary convolution circuitry, and instruction fetch circuitry coupled to the decoder and configured to fetch a binary convolution instruction from an associated memory. The binary convolution instruction specifies input data, weight data, and the set of destination registers for performing a binary convolution operation. The decoder receives the binary convolution instruction from the instruction fetch circuitry and causes the input data and the weight data to be provided to the binary convolution circuitry. In response, the binary convolution circuitry performs the binary convolution operation on the input data and the weight data to produce output data and stores the output data in the set of destination registers.

The present disclosure relates to a binarized neural network circuitry using silicon-gated diodes. The binarized neural network circuitry according to one embodiment of the present disclosure includes a plurality of silicon-gated diodes in which a diode structure as a channel area is located between an anode terminal and a cathode terminal, a gate terminal is located on the diode structure to implement unidirectional switching through potential barrier control in the channel area based on different voltages applied to each of the anode terminal and the gate terminal, and memory characteristics are realized as holes or electrons accumulate in the potential well due to a positive feedback loop. In addition, in the binarized neural network circuitry, the silicon-gated diodes operate as synaptic elements in a memory array connected in parallel, and the results of a multiply-accumulate (MAC) operation are output based on an input signal applied from an input line processor connected to the memory array and a weight update signal applied from a synapse line processor connected to the memory array.

The invention provides a battery management method and a vehicle, and relates to the technical field of electric energy management, and the method comprises the steps: obtaining an original signal of the driving data of the vehicle; extracting a feature representation of the driving data from the original signal based on a first sampling rate; the first sampling rate is smaller than the sampling rate of the original signal; inputting the feature representation into a binary neural network BNN to obtain probability values of multiple driving modes; a current driving mode of the vehicle is determined based on the probability value, and a rated output current of a battery of the vehicle is adjusted. According to the method, the features are extracted from the original signals in a dimensionality reduction mode, the BNN is adopted for reasoning to obtain the probability value of the driving mode, the driving mode can be rapidly recognized, the rated output current of the battery is adjusted, the real-time performance of battery management is guaranteed, and the service life of the battery is prolonged.

The invention provides a face image privacy protection recognition method based on optical coding and reverse feature enhancement, and relates to the technical field of computer vision recognition, and the method comprises the steps: S1, obtaining a face data set, carrying out the data enhancement, and constructing a face enhancement data set; s2, constructing a binary neural network convolutional coding layer based on straight-through estimator quantization, and performing optical coding on the face enhancement data set; s3, constructing a reverse feature enhancement neural network model based on CNN and Transform double-channel multiplexing, and carrying out feature dimension increase; s4, performing joint optimization on the neural network coding layer and the dual-channel multiplexing reverse feature enhancement neural network model by using mixed constraints; and S5, constructing a face embedding database, and comparing the high-dimensional coding value of the single-pixel detection value with features in the face embedding database to realize face recognition. According to the invention, through joint optimization of the neural network binarization convolution coding layer used for optical coding of the spatial light modulator and the dual-channel multiplexing reverse feature enhancement model, the recognition precision is improved.

The invention relates to a training method and device of a binary neural network model and computer equipment. The method comprises the steps that enhanced thermometer coding is introduced into an input layer of a small sample image recognition model, and a binary neural network model is designed by adopting a batch-free normalized convolutional layer; inputting a to-be-predicted picture to the binarization neural network model to extract to-be-predicted features, performing first-stage training on the to-be-predicted features by using the original activation function and the weight, and performing second-stage training on the predicted picture input to the trained binarization neural network model by using the binarized original activation function and the weight, and obtaining an optimal binary neural network model. And deploying the optimal binary neural network model into a C language reasoning framework, completing system module development, and obtaining edge device adaptation information. And designing a register transfer level process of the target edge device. By adopting the method, the efficient and lightweight performance of deep learning of the resource-limited edge device can be improved.

The present invention belongs to the field of integrated circuit technology, and specifically is a sparse binary neural network hardware accelerator for gesture recognition. The accelerator of the present invention includes: an input cache module, a weight cache module, a data transmission on-chip network, 32 convolution calculation cores, a hierarchical accumulation tree, a subsequent processing unit, an HDMI interface, a UART interface, and a value prediction and sparse activation map compression / decompression module. The accelerator accelerates gesture recognition of sparse binary networks. The two-level value prediction method can skip the repeated calculations existing in the binary network, thereby accelerating the calculation cycle and reducing power consumption; the channel-level sparse activation compression and decompression method is used to reduce the required data storage volume; the present invention has the characteristics of low power consumption and low latency, effectively reducing hardware resources and improving the energy efficiency of the hardware.

An all-binary neural network system and method for processing and analyzing multi-source time series data is disclosed. The system employs a shared codebook to encode input streams into binary codewords, which are then processed through a series of binary convolutional layers, binary LSTM layers, and binary fully connected layers. The system maintains binary representations throughout, enabling efficient computation and reduced memory requirements while effectively capturing temporal and inter-source relationships in the data.

The invention provides a lightweight remote sensing image change detection method based on a binary neural network and large kernel stripe convolution. The implementation steps are as follows: obtaining a training sample set and a test sample set; constructing a lightweight remote sensing image change detection network model based on a binary neural network and large-kernel stripe convolution, and performing iterative training on the lightweight remote sensing image change detection network model; and obtaining a lightweight remote sensing image change detection result. In the process of carrying out iterative training on a lightweight remote sensing image change detection network model and obtaining a change detection result, deep feature extraction is carried out on a dual-tense feature map through ResNet18 networks in the two branch networks, the weight and activation can be quantified as + 1 and-1, 32 times of memory saving and 58 times of CPU acceleration are achieved, and the method has the advantages of being simple in structure, convenient to operate and high in practicability. The defect that in the prior art, the number of parameters is large is overcome, the detection efficiency is effectively improved, and meanwhile the defect of accuracy caused by binary quantization is overcome through the large-kernel stripe convolutional network.

A binary neural network apparatus including a binarized last layer is provided. According to an embodiment of the present disclosure, the binary neural network apparatus includes: a binary neural network including a first layer, one or more second layers, and a third layer, wherein the one or more second layers are provided between the first layer and the third layer, and the third layer has binary input and binary weights and is configured to output a binarized bit sequence; and a non-binary converter configured to convert the binarized bit sequence into non-binary data and output the non-binary data.

The invention provides an optical orbital angular momentum identification method and system based on a binary neural network model, and is used for solving the technical problems that an OAM identification method based on a spatial light modulator deep learning method is high in calculation complexity, large in memory occupation and difficult to meet the application requirements of light weight and real-time performance of space laser communication. According to the optical orbital angular momentum identification method based on the binary neural network model provided by the invention, the identification of different topological charges OAM is realized by constructing the binary neural network model, and compared with a traditional OAM identification method based on a spatial light modulator deep learning method, the method provided by the invention adopts a binary weight and a binary activation function, so that the identification accuracy is improved. And the parameter storage requirement is obviously reduced. Meanwhile, according to the binary neural network model, PopCount processing is adopted to replace convolution operation, the calculation amount is reduced, the real-time performance is enhanced, and the requirement of application scenes such as inter-satellite communication for rapid recognition can be met.

A binary neural network apparatus including a binarization last layer is provided. In accordance with an embodiment of the present disclosure, a binary neural network apparatus includes: a binary neural network including a first layer, one or more second layers disposed between the first layer and the third layer, and a third layer having a binary input and a binary weight and configured to output a binarized bit sequence; and a non-binary converter configured to convert the binarized bit sequence into non-binary data and output the non-binary data.

The invention discloses an electric energy quality disturbance high-precision classification method of a hybrid binary neural network, and the method comprises a full-precision convolution layer, a binary convolution layer, and a binary full-connection layer used for classification. Comprising the following steps: retaining original input information of a power quality disturbance signal to the greatest extent through a full-precision convolutional layer; adopting a binary convolution layer to reduce the size of the model, and performing feature extraction on the data; through a pooling layer and a batch normalization layer, the training speed in the feature extraction process is increased, and overfitting is reduced; and finally, classifying the extracted features by using a binary full-connection layer as a classifier and reducing the size of the model at the same time. And outputting a corresponding category by a Softmax function to realize power quality disturbance classification. According to the method, a small number of full-precision convolutional layers are added in the binarized convolutional neural network, so that sample features are reserved to the maximum extent, the model size is reduced, the classification speed is improved under the condition that the efficiency is controllable, and high-precision classification of the power quality disturbance is achieved.

Systems and methods for a unified reconfigurable neural central processing unit is provided. In one aspect, a neural central processing unit is in communication with a memory, wherein the neural central processing unit is configured to transition between a binary neural network accelerator mode and a central processing unit mode, wherein, in the binary neural network accelerator mode, the memory is configured as an image memory and weight memories, wherein, in the central processing unit mode, the memory is reconfigured, from the image memory and the weight memories, to a data cache.

The invention provides a quasi-e-system neural network model, a construction method, a data processing method and an electronic device, the quasi-e-system neural network model comprises an input layer, a hidden layer and an output layer, the input layer is used for receiving data; the hidden layer comprises neurons, the neurons comprise at least one sub-neuron, the sub-neuron can represent any one of a binary function g (x) and a ternary function t (x), and an activation function F (x) of the neurons represents linear weighted fitting of the binary function g (x) and the ternary function t (x). According to the scheme provided by the invention, by adopting the combination of the binary function g (x) and the ternary function t (x), the precision and the energy consumption of the model are balanced on the basis of keeping the high compression ratio and the high calculation efficiency of the binary neural network.

The invention discloses a hyperspectral image reconstruction system based on a binary neural network, and the system comprises a binary neural network model used for reconstructing a hyperspectral image, and the binary neural network model comprises a degeneration parameter estimator which is used for estimating degeneration degree information based on a measurement value, and outputting K groups of degeneration parameters; k is a positive integer; the initialization extractor is used for extracting full-precision information from the measured value to obtain an initial hyperspectral reconstruction signal; and the K iterative reconstruction modules are connected to the output ends of the degradation parameter estimator and the initialization extractor and are used for reconstructing a hyperspectral image according to the K groups of degradation parameters and the initial hyperspectral reconstruction signal.

Apparatuses and methods can be related to implementing a binary neural network in memory. A binary neural network can be implemented utilizing a resistive memory array. The memory array can comprise programmable memory cells that can be programed and used to store weights of the binary neural network and perform operations consistent with the binary neural network. The weights of the binary neural network can correspond to non-zero values.

The invention discloses a low-light image enhancement method and system based on a binary neural network, and relates to the technical field of low-light image enhancement, and the method comprises the steps: obtaining a full-precision network and a low-light image; a BiLLIE framework is adopted, on the basis of a full-precision network, a binarization module is used for gradually replacing a standard convolution module, and a full-precision dark light enhancement network is constructed; and inputting the low-light image into the full-precision dark light enhancement network to obtain an enhanced low-light image. According to the method, through binarization operation, the memory and the calculation amount are remarkably compressed, and the utilization efficiency of hardware resources is maximized. Through a two-step training strategy, smooth transition from a full-precision model to a binary model is realized. The full-precision weight is kept through activation value binaryzation, and the training stability is ensured and the precision loss is avoided through step-by-step binaryzation of the convolution weight. According to the training strategy, the model can gradually adapt to binarization operation, and the convergence of the training process and the final image enhancement performance are greatly improved.

Provided is NNP hardware, with minimized external memory access, for supporting a ResNet structure of a binarized neural network (BNN). The NNP hardware according to an embodiment of the present invention comprises: a weight memory for storing binary weights required for a binary convolution operation; an input memory for storing binary inputs required for the binary convolution operation; and a plurality of BNN cores for performing the binary convolution operation by using the binary inputs stored in the input memory and the binary weights stored in the weight memory. Accordingly, external memory access is minimized through the NNP hardware which is efficient for ResNet data flow, so that the power consumption and the hardware size can be reduced while increasing the operation speed.

The application discloses a permanent magnet synchronous motor stator fault diagnosis method and system based on a human learning optimization algorithm, and the method comprises the following steps: obtaining a three-phase current signal of a stator of a permanent magnet synchronous motor, converting the signal into a two-dimensional time-frequency diagram after being decomposed by a variational mode and being demodulated by a Hilbert envelope; constructing a binary neural network for processing the two-dimensional time-frequency diagram and determining a search space; generating a candidate architecture by global search using a first human learning optimization algorithm; for each candidate architecture, fine-tuning the classification layer parameters thereof by proportional evolution using a second human learning optimization algorithm, taking the classification performance of a verification set as a fitness value, and iteratively obtaining an optimal model; inputting a current signal to be diagnosed into the model after the same preprocessing, and outputting a stator fault diagnosis result. Compared with the prior art, the application realizes low-overhead accurate diagnosis of weak faults of a permanent magnet synchronous motor stator by physical information driven preprocessing and double-layer human learning optimization.

The invention discloses a binary neural network pruning compression and deployment optimization system and method, and aims to solve the problems of low PopCount calculation efficiency, non-fusion of pooling and convolution, unstable pruning training and the like in the prior art. The system comprises a regularization item module with an attenuation factor during training, and a binary convolution runtime pruning module, a PopCount lookup table module and a binary convolution and binary maximum pooling fusion calculation module during deployment. The method comprises the following steps: 1) adjusting regularization intensity by adopting a dynamic attenuation factor, and improving pruning training stability; the method comprises the steps of (1) obtaining a binary neural network, (2) terminating redundancy calculation in advance through a dual-condition pruning mechanism to optimize reasoning efficiency, (3) achieving efficient PopCount calculation based on a segmented lookup table, and (4) fusing binary convolution and pooling operation to reduce boundary checks.According to the method, the calculation efficiency and deployment adaptability of the binary neural network on end-side equipment are remarkably improved, and the method is suitable for embedded scenes with limited resources.

A framework is presented that provides a shift in the conceptual and practical realization of privacy-preserving interference on deep neural networks. The framework leverages the concept of the binary neural networks (BNNs) in conjunction with the garbled circuits protocol. In BNNs, the weights and activations are restricted to binary (e.g., ±1) values, substituting the costly multiplications with simple XNOR operations during the inference phase. The XNOR operation is known to be free in the GC protocol; therefore, performing oblivious inference on BNNs using GC results in the removal of costly multiplications. The approach consistent with implementations of the current subject matter provides for oblivious inference on the standard DL benchmarks being performed with minimal, if any, decrease in the prediction accuracy.

A binary neural network (BNN) without floating-point layers uses inter-layer input data and inter-layer output data represented in n-bit binary format, where n is less than 32. For instance, n may be 8. Each layer of a set of hidden layers is operative to perform binarized operations on respective input data and at least one of the hidden layers, and includes a trained one-bit binary quantizer with a preconfigured binarization threshold that was configured during training.

This invention proposes a lightweight remote sensing image change detection method based on a binary neural network and large-kernel strip convolution. The implementation steps are as follows: obtaining training and testing sample sets; constructing a lightweight remote sensing image change detection network model based on a binary neural network and large-kernel strip convolution and iteratively training it; and obtaining the lightweight remote sensing image change detection results. In the process of iteratively training the lightweight remote sensing image change detection network model and obtaining the change detection results, this invention uses ResNet18 networks in two branches to perform deep feature extraction on the feature maps of both time periods. This allows the weights and activations to be quantized to +1 and -1, achieving a 32-fold memory saving and a 58-fold CPU acceleration, avoiding the drawback of existing technologies with a large number of parameters, and effectively improving detection efficiency. Simultaneously, the large-kernel strip convolution network compensates for the accuracy deficiency caused by binary quantization.

The application provides a face image privacy protection recognition method based on optical coding and reverse feature enhancement, and relates to the technical field of computer vision recognition, and the method comprises the following steps: S1, acquiring a face data set, performing data enhancement, and constructing a face enhanced data set; S2, constructing a binary neural network convolution coding layer based on a straight-through estimator quantization, and performing optical coding on the face enhanced data set; S3, constructing a CNN and Transformer dual-channel multiplexing reverse feature enhancement neural network model, and performing feature dimension enhancement; S4, using a hybrid constraint, and jointly optimizing the neural network coding layer and the dual-channel multiplexing reverse feature enhancement neural network model; and S5, constructing a face embedding database, comparing a high-dimensional coding value of a single-pixel detection value with features in the face embedding database, and realizing face recognition. The application jointly optimizes the neural network binary convolution coding layer for spatial light modulator optical coding and the dual-channel multiplexing reverse feature enhancement model, so that the recognition precision is improved.

The present invention discloses a voice wake-up method and system based on a time-domain binary neural network. The method comprises the following steps: obtaining an audio file to be recognized, thereby obtaining a voice signal to be processed; extracting acoustic features from the voice signal to be processed, and performing dimensionality conversion processing on the voice signal to obtain acoustic features after dimensionality conversion processing; inputting the acoustic features after dimensionality conversion processing into a pre-trained time-domain binary neural network (TBNN) model to obtain probability outputs of keywords and non-keywords; and determining whether to wake up the system based on whether the highest probability among the probability outputs of keywords and non-keywords is a keyword. The present invention greatly reduces the number of parameters and the amount of computation of the neural network classifier, while significantly improving the wake-up speed and reducing the power consumption of the voice wake-up system.

A system and method for single cycle binary matrix multiplication in neural network computations is disclosed. The system includes a memory array storing binary weights, an input unit for activating rows based on a binary activation vector, and per-column majority sense amplifiers. The system performs binary matrix multiplication in a single cycle, enabling efficient implementation of binary neural networks. The memory array may include sections for weights and inverse weights, with corresponding activation register sections. Differential sense amplifiers may implement the majority function. The system can be applied to convolutional neural networks, using SRAM arrays for image storage and processing. Methods for determining majority votes and counting activated bits using iterative modification of the activation vector are also described.

The present invention discloses a target detection accelerator and a binary quantization training method thereof, belonging to the field of neural network accelerator quantization and hardware deployment. The multiplication module in the convolution calculation unit is replaced by a lookup table module, which reduces the amount of multiplication calculation in the convolution process, and fully utilizes the characteristics of weight binarization to reduce the redundancy in the calculation process. An efficient binary neural network accelerator hardware data flow module is designed. According to the characteristics of the binary target detection neural network model, the input data reuse method is adopted to maximize the reuse of the pre-calculated results obtained in the lookup table of the convolution pre-calculation unit, thereby minimizing the redundancy in the accelerator calculation process. In the design of the hardware data flow, the advantage of the low bit width of the weight is fully utilized to reduce the operating power consumption of the accelerator. The accelerator is binary quantized and trained with a preset data set, and the weight values ​​in the network are quantized to 1 bit, which reduces the computational complexity and storage requirements of the model.

The invention discloses a binary neural network recognition system for agricultural plant leaf diseases, a deep supervision module divides a training framework of a binary neural network into a trunk network and a plurality of auxiliary classifiers, and each auxiliary classifier comprises a residual feature extraction module which extracts intermediate features from the trunk network; the full connection layer converts the intermediate features into predicted values and outputs the predicted values; during the training period of the binary neural network, the deep supervision module calculates the deep supervision loss according to the difference between the predicted value and the real label; the self-distillation module calculates the self-distillation loss according to the auxiliary classifier with the optimal prediction performance and the corresponding prediction value; the total loss calculation module calculates the total training loss according to the depth supervision loss and the self-distillation loss; the network optimization module updates parameters of the binary neural network according to the total training loss to generate an optimized binary neural network. According to the invention, the recognition precision of the binary neural network on agricultural plant leaf diseases is improved.

A self-activating binarized neural network circuit that performs the activation function by itself is provided. [Solution] The neural network circuit 400 includes a plurality of silicon gated diodes which implement unidirectional switching through potential barrier adjustment in a channel region based on different voltages applied to the anode terminal and the gate terminal, respectively, and which implement memory characteristics by accumulating holes or electrons in a potential well through a positive feedback loop, and the plurality of silicon gated diodes operate as synapse elements 401 in a memory array connected in parallel, and output a MAC operation result based on an input signal applied from an input line processing unit connected to the memory array and a weight update signal applied from a synapse line processing unit connected to the memory array.

A local activation method and system based on a binary neural network, said method including: during forward propagation, comparing the difference between a center pixel and an adjacent pixel to determine a local activation value; during forward propagation, setting an appropriate number of local activation channels and an activation direction to obtain a local activation feature map having different activation directions; during forward propagation, using weighting coefficients, which can be learned, to perform channel fusion on the output feature map after local activation and direct activation, and obtaining an output feature map containing both texture features and contour features; during backpropagation, using an asymptotic sine function to update the weights of the binary neural network. The invention is capable of effectively reducing the loss of information during binary activation, and can effectively reduce gradient mismatch during backward gradient update of a binary neural network, thereby improving the performance of the binary neural network.