8results about How to "Reduce circuit complexity" patented technology

This application discloses a floating-point number format conversion apparatus and method, storage medium, and program product, relating to the field of floating-point number format conversion technology. The apparatus includes a preprocessing unit and a conversion mapping unit. The preprocessing unit receives input data in a first floating-point format and performs bit-width compression processing on at least a portion of the bits in the input data that affect rounding operations to generate corresponding index values, wherein the bit width of the index values ​​is smaller than the mantissa bit width of the input data. The conversion mapping unit is coupled to the preprocessing unit and stores multiple mapping relationships between index value ranges and numerical representations in a second floating-point format, used to look up the corresponding numerical representation in the second floating-point format as output data based on the index values. This application aims to reduce the number of logic gates and circuit complexity required for floating-point number format conversion, thereby reducing the chip area, power consumption, and operation latency.

The application discloses a kind of no sampling resistance square wave control overcurrent protection method, method includes: real-time acquisition digital sampling sequence of direct current bus voltage, synchronous analysis logic state combination of three-phase PWM driving signal;According to the mapping table of pre-stored commutation state machine, the logic state combination is converted into current effective conduction phase identification, and the signal of corresponding current detection enable window is generated, and enable window is limited to the interval of voltage oscillation attenuation completion after PWM opening to before off before freewheeling protection;During the effective period of enable window, the digital band-pass filtering is carried out to bus voltage digital sampling sequence, the voltage drop component of characteristic frequency band is extracted, and the time-domain integral value and the rate differential value of voltage drop component are calculated.The application is reconstructed by the current of no sampling resistance technology and dynamic protection strategy, while reducing hardware cost, significantly improve system reliability, effectively solve the protection failure problem of traditional scheme under commutation interference, high-speed working condition and transient impact.

The invention relates to a battery equalization circuit, a battery equalization method and an energy storage system. A battery cell control unit of the circuit is used for collecting battery cell state parameters of a plurality of battery units and executing charging and discharging control; the electric quantity balance conversion loop is used for performing energy transfer among different battery units; the micro-control unit is used for receiving the battery cell state parameters collected by the battery cell control unit and generating corresponding energy balance control instructions; the analog front-end switching unit is used for responding to an energy balance control instruction and switching current paths among different battery units through corresponding optocoupler control channels so as to balance the energy of the battery units; the technical problems of high cost and complex circuit caused by the use of a large number of control chips, power devices and magnetic elements in the active equalization scheme of the high-string-number energy storage system are solved, and the purposes of reducing the number of required control chips, power devices and magnetic elements and reducing the cost are achieved. And the technical effects of hardware cost and circuit complexity of active equalization of the high-string-number battery system are obviously reduced.

The utility model discloses a heat management controller, include: main control chip, first step -down module, first high side drive module, second step -down module and second high side drive module, first step -down module reduces first direct current voltage and exports second direct current voltage, and first high side drive module receives second direct current voltage and provides first load under the control of main control chip, and second step -down module is connected with first step -down module, main control chip and second high side drive module, and second step -down module is used for reducing second direct current voltage and provides third direct current voltage for main control chip and second high side drive module, and second high side drive module provides third direct current voltage for second load under the control of main control chip.The utility model discloses heat management controller has integrated the power supply function of traditional need low voltage battery direct power supply's first load, both convenient for power supply management, also be favorable to reduce heat management system's circuit complexity and reduce system electronic cost.

The application belongs to the field of analog integrated circuit design, and particularly relates to a redundant current range current steering DAC based on digital pre-distortion. The application carries out rotation correction through an improved DEM decoding circuit, measures and quantizes error codes corresponding to the static mismatch error of each current unit, and reduces the circuit area and the influence of additional circuit parasitic on the DAC speed without additional control circuit. A redundant current unit is introduced at the highest bit to expand the quantization range, and the error code and clipping problem introduced by DPD correction are solved. Only a simple algorithm of a 14-bit adder and a 14-bit subtractor is needed to directly operate on binary codes, and a secondary decoding is used to realize thermometer code addition operation compatible with DEM, so that the timing delay and circuit complexity of the thermometer code addition circuit are greatly reduced. The circuit timing delay of the application meets the speed requirement of high-speed and high-precision current steering DAC, and compared with DEM correction only, the application significantly improves the SFDR without raising the noise floor.

The present application belongs to the field of ADC calibration algorithm, and particularly relates to an ADC calibration method based on a full connection neural network. The method mainly comprises the following steps: constructing a full connection neural network; injecting a harmonic wave to an ideal signal, prolonging a sampling time to generate a training data set through random sampling; performing ideal quantization on the training data set with a higher precision than that of a target ADC, taking the ideal quantization as an input to train the full connection neural network; and performing calibration processing on an actual ADC chip according to the trained full connection neural network. The present application has the advantages that the full connection neural network is used to calibrate the target ADC, the source of errors and the influence of nonlinearity do not need to be concerned, the method is suitable for various ADC structures, has the characteristics of strong universality, easy transplantation, reduced difficulty in ADC circuit design, and improved performance of the ADC chip.

This application provides a multi-channel air pressure acquisition system, method, device, and medium for semiconductor devices. A MEMS air pressure sensor detects the air pressure in a corresponding gas pipeline, converts the air pressure into a raw electrical signal, and sends it to a signal processing circuit. The signal processing circuit processes the received raw electrical signals to obtain multiple target electrical signals. A multi-channel selection switch circuit sequentially connects each target electrical signal according to a preset order corresponding to the channel selection signal. An AD acquisition circuit converts each selected target electrical signal into digital air pressure data and sends the digital air pressure data to an FPGA circuit. The FPGA circuit processes the multiple digital air pressure data and sends the processed target air pressure data to a host computer through the data interface circuit. This system and method achieve time-division multiplexing and centralized acquisition of multiple air pressure sensor signals, which is beneficial for improving integration and maintenance convenience.

This invention discloses a method and system for simulating flames using dynamic adjustment of multi-color LEDs, belonging to the field of intelligent electronic lighting adjustment technology. The method includes: generating chaotic initial values ​​by collecting physical noise from the floating pins of a microcontroller; generating an infinite, non-repeating chaotic numerical sequence using the logistic mapping equation based on the chaotic initial values; allocating the PWM duty cycles of the red and yellow channels using a nonlinear coupling algorithm based on the current chaotic values, and generating the PWM duty cycle of the orange channel based on these duty cycles; smoothing and filtering the three PWM duty cycles to generate smoothed drive signals; and driving the multi-color LED array to emit light according to the smoothed drive signals to simulate a dynamic flame effect. This invention can generate highly realistic and dynamic flame effects using a low-cost, low-power embedded solution.