352 results about "Slew rate" patented technology

The invention provides a pixel signal output circuit and an image sensor, and the circuit comprises a pixel module which is used for generating a pixel signal; and the feedback capacitance module is connected with the output end of the pixel module and is used for equivalently reducing the total load capacitance of the pixel module so as to accelerate the establishment of a pixel signal. The feedback capacitor module is additionally arranged at the output end of the pixel module, and the total load capacitance of the pixel module is equivalently reduced by utilizing the capacitance of the feedback capacitor module, so that the time constant of the pixel signal output circuit can be effectively reduced, the slew rate is increased, the establishment speed of the pixel signal is accelerated, and the pixel signal output efficiency is improved. The problem of how to improve the establishment speed of the pixel signal is solved.

A circuit includes a high-side driver having a high-side slew control input, a high-side drive input and a high-side drive output. A low-side driver has a low-side slew control input, a low-side drive input and a low-side drive output. Drive control circuitry has a high-side drive control output, a low-side drive control output, and a slew control output. The high-side drive control output is coupled to the high-side drive input, the low-side drive control output is coupled to the low-side drive input. The slew control output is coupled to at least one of the high-side slew control input and the low-side slew control input, and the drive control circuitry is configured to provide a slew control signal at the slew control output. The high-side and / or low-side driver is configured to modulate a slew rate of a drive signal at a respective drive output thereof based on the slew control signal.

A variable slew rate gate drive system for powering an electric machine. The system may include a gate driver operable for controlling each of a plurality of hybrid switch power modules between opened and closed states to facilitate powering the electric machine. The gate driver may be operable for selecting slew rates and controlling ON and OFF states of first and second semiconductor switches included as part of each power module to optimize powering of the electric machine by varying the slew rates as a function of performance characteristics of the first and second semiconductor switches.

The invention discloses a slew rate enhancement circuit of an operational amplifier, which comprises a comparison module used for comparing a positive input voltage and a negative input voltage of the operational amplifier and generating a first comparison signal and a second comparison signal according to a comparison result; the slew rate enhancing module is used for enhancing the slew rate of the falling edge of the output voltage of the operational amplifier according to the first comparison signal and enhancing the slew rate of the rising edge of the output voltage of the operational amplifier according to the second comparison signal; the common-mode feedback module is used for clamping the common-mode voltage of the first comparison signal and the common-mode voltage of the second comparison signal to a reference voltage when the operational amplifier is in a steady state, so that the slew rate enhancing module is in a closed state; therefore, the slew rate of the output voltage of the operational amplifier can be quickly enhanced when the operational amplifier has large step signal output, so that the output of the operational amplifier is quickly responded and established.

A buffer circuit configured to generate an output voltage according to an input voltage includes: an input stage configured to provide first and second differential currents to a load stage or receive third and fourth differential currents from the load stage based on a difference between the input voltage and the output voltage; a load stage configured to apply gate voltages to first and second output transistors of an output stage based on the first through fourth differential currents; the output stage configured to regulate the output voltage based on the gate voltages applied to the first and the second output transistors; and a slew rate compensator configured to regulate the gate voltages of the first and second output transistors by providing a source current to the load stage or receiving a sink current from the load stage.

In one aspect of the disclosure, a variable-current gate driver includes a plurality of inputs for receiving pulse-width-modulation (PWM) control signals transmitted from a processing system. Current sources controlled based on the pulse-width modulation (PWM) signals are coupled to respective gates of at least two transistors of a hybrid switch in the power module (PM) including different semiconductor technologies. The current sources are coupled respectively to at least one other non-gate terminal of the transistors. The current sources provide the slew rate control of the PM using variable current values to compensate for differences in the at least two semiconductor technologies in real-time to reduce switching losses and maximize efficiency.

A method of driving a transistor between switching states includes controlling a transition of a gate voltage at a gate terminal of a transistor during each of a plurality of turn-off switching events to turn off the transistor, wherein the transistor is configured to be turned off according to a desaturation time during each of the plurality of turn-off switching events; measuring a transistor parameter indicative of a voltage slew rate of the transistor for a first turn-off switching event during which the transistor is transitioned from an on state to an off state; and regulating a duration of the desaturation time for a next turn-off switching event based on the measured transistor parameter.

A circuit for slew rate detection and phase control in a multi-phase converter is provided. The circuit includes a first comparator configured to trigger when an output voltage of the multi-phase converter falls to a first output voltage level threshold value. The circuit further includes a second comparator configured to trigger when the output voltage falls to a second output voltage level threshold value which is lower than the first output voltage level threshold value. The circuit further includes a timer configured to start to run for a predefined time window, when the output voltage of the multi-phase converter falls below first output voltage level threshold value. The circuit further includes phase control logic configured to distinguish the ramp rate of the output voltage of the multi-phase converter as corresponding to a slow-rate ramp, a mid-rate ramp or a fast-rate ramp based on the outputs of the first comparator, the second comparator and the timer and enable phases synchronously or asynchronously based on the distinguishing of the ramp rate of the output voltage of the multi-phase converter as corresponding to the mid-rate ramp or the fast-rate ramp.

The invention discloses a low dropout linear regulator with a wide dropout range, which is characterized in that an error amplifier is supplied with power by output voltage of the low dropout linear regulator, and a common-gate buffer is supplied with power by input voltage of the low dropout linear regulator, so that a direct interference path of the input voltage to the output only exists in a common-gate buffer stage and an output stage; and the power supply rejection ratio is improved. The common-gate buffer solves the problem of margin loss caused by a traditional source follower circuit, a positive feedback loop arranged in the common-gate buffer is used for improving the slew rate of a driving signal VPGATE and providing a certain gain, and therefore the problem of margin under low dropout is solved, and the reliability of the driving circuit is improved. And the compensation circuit can adjust the compensation amount of the low-dropout linear regulator when the input voltage is higher than a preset threshold value, so that the stability of the low-dropout linear regulator under different working conditions is improved.

A method includes determining a current slew rate associated with a motor of the steering column, determining a speed slew rate associated with the motor, determining a current and speed slew rate threshold for the motor, and determining whether the current slew rate or the speed slew rate indicates a pinch event based on a comparison of the current slew rate, the speed slew rate, and the current and speed slew rate threshold. The method also includes, in response to a determination that at least one of the current slew rate and the speed slew rate indicates a pinch event, selectively instructing the motor to one of stop operation and reverse operation for a calibration period and, in response to the pinch event having a magnitude that is less than a pinch event threshold, selectively instructing the motor to continue operation.

The invention relates to a simple multi-parameter testing method for an integrated operational amplifier, which comprises the following steps of: 1) configuring the operational amplifier as a follower circuit, and short-circuiting the inverting input end of the operational amplifier and the output end VOUT; and 2) different excitation signals are respectively given to the in-phase input end VIN of the follower circuit, and parameters such as offset voltage VOS, quiescent current IQ, power supply rejection ratio PSRR, maximum input voltage range IVR, output voltage swing VO, slew rate SR, setup time ST and unity gain bandwidth product UGBW are tested. According to the invention, a common operational amplifier is configured as a follower circuit, so that simple testing of parameters such as offset voltage VOS, quiescent current IQ, power supply rejection ratio PSRR, maximum input voltage range IVR, output voltage swing VO, slew rate SR, establishment time ST, unity gain bandwidth product UGBW and the like can be completed.

A cascode switch device includes a normally-on switch device, a normally-off switch device, and a gate driver. The normally-on switch device has a first terminal, a second terminal and a control terminal. The normally-off switch device has a first terminal, a second terminal and a control terminal. The first terminal of the normally-off switch device is coupled to the second terminal of the normally-on switch device, and the control terminal of the normally-off switch device is coupled to the control terminal of the normally-on switch device. The gate driver is configured to provide a gate driver signal to the control terminal of the normally-on switch device to control a switching slew rate of a voltage at the first terminal of the normally-on switch device. The normally-on switch device is turned on or turned off in response to the gate driver signal.

The invention relates to a sectional driving framework for detecting and adjusting the slew rate of a BOOST power tube, which comprises a logic and dead zone module for receiving a PWM (Pulse Width Modulation) signal, and a level shifting module, a high-side driving circuit and a high-side power tube which are sequentially connected with the logic and dead zone module, the slope detection and dynamic adjustment module, the low-side driving circuit and the low-side power tube are sequentially connected with the logic and dead zone module, the slope detection and dynamic adjustment module is connected with a source electrode of the high-side power tube and a drain electrode of the low-side power tube, and the logic and dead zone module processes the PWM signal and then generates a switch control signal. The slope detection and dynamic adjustment module receives the switch control signal, detects the slew rate of the low-side power tube when the low-side power tube is turned off, and controls the parallel number of driving tubes in the low-side driving circuit according to a detection result, and the low-side driving circuit outputs a low-side driving signal according to the parallel number of the driving tubes; and the low-side driving signal controls the on and off of the low-side power tube.

A display driving circuit may include a source driver that includes a decoder circuit and a buffer circuit. The decoder circuit selects a first gamma voltage and a second gamma voltage among a plurality of gamma voltages based on pixel data, and selects a third gamma voltage different from the first and second gamma voltages among the plurality of gamma voltages. The buffer circuit interpolates between the first and second gamma voltages to output a first target voltage, and steps up or steps down a source voltage formed on the source line to the first target voltage. The buffer circuit includes a fast slew circuit that compares the first source voltage with the third gamma voltage to adjust slew rate of the first source voltage.

The invention is suitable for the technical field of integrated circuits, and provides a high-voltage operational amplifier. Comprising a biasing circuit, a first current mirror circuit, a first slew rate boosting circuit, a first gain circuit, a second gain circuit, a second current mirror circuit, an input stage circuit, an output stage circuit, a chopping switch circuit, a first high-voltage protection circuit, a third current mirror circuit, a fourth current mirror circuit, a second slew rate boosting circuit and a fifth current mirror circuit. And a sixth current mirror circuit and a second high-voltage protection circuit. The precision of the operational amplifier under the 36V high voltage can be improved.

The invention discloses a dynamic comparator and a voltage calibration method thereof, relates to the field of dynamic comparators, and is used for improving the comparison precision of the dynamic comparator in a mode of not sacrificing the power consumption and the efficiency of the dynamic comparator. A kickback noise suppression circuit is connected to a tail current tube of an input geminate transistor to adjust the switching time of a clock signal, a calibration crystal geminate transistor is connected to a regeneration node of the input geminate transistor, and a reference voltage is adjusted through a resistor string DAC to calibrate an offset voltage. The kickback noise is effectively suppressed by adjusting the slew rate of the clock signal of the tail current tube, the calibration speed is increased through the two-stage resistor string DAC, the crystal pair tube is controlled and calibrated by multiplexing the adjusted clock signal, and the calibration precision is improved.

The disclosure provides a voltage regulator and a memory device. The voltage regulator includes a voltage generator and a bias circuit. The bias circuit dynamically adjusts a bias voltage based on a power saving mode signal of the memory device. The voltage generator adjusts a bias current of the voltage generator based on the bias voltage, wherein the bias current affects a slew rate of a target voltage. The voltage generator generates the target voltage to a driving circuit configured to drive a memory cell array in the memory device.

The present disclosure provides a semiconductor device, which includes a process monitor circuit, a controller, and an output buffer. The process monitor circuit is configured to measure process information of the semiconductor device. The controller is electrically connected to the process monitor circuit, and configured to generate a trimming code based on the measured process information. The output buffer is electrically connected to the controller, and configured to adjust a first bias current and a second bias current based on the trimming code.

A time error vector is determined using pairs of two closest points of input-referred noise data that straddle respective crossing times indicating when a clock signal representation crosses a threshold value, a slew rate of the clock signal representation, and the crossing times. A system filter is applied to the time error vector in the frequency domain. A first RMS value is determined indicating a jitter value present in the filtered time error vector. A raw clock signal time error vector of the clock signal under test is generated, the system filter is applied to the raw clock signal time error vector in the frequency domain, and a second RMS value indicating a jitter content of the filtered raw clock signal time error vector is determined. The second RMS value is corrected using the first RMS value to thereby generate a jitter measurement compensated for input-referred noise.

A slew-rate control circuit, including: a proportional calculation circuit, which generates a first indicating voltage according to a plurality of adjusted first signals within a previous preset period and a plurality of first signals within a current preset period, and generates a second indicating voltage according to the plurality of adjusted first signals within the previous preset period and a plurality of second signals that are inverted from the plurality of first signals within the current preset period; a logic operation circuit, which generates an operation result according to a relationship between the first indicating voltage, and first and second reference voltages, and a relationship between the second indicating voltage, and the first and second reference voltages; and an output adjustment circuit, which determines whether to invert the multiple first signals within the current preset period according to the operation result.

A semiconductor device is provided. The semiconductor devices is connected to a power device. The semiconductor device includes a gate driver unit with a first circuit and a second circuit, a resistor unit connecting the gate of the power device and the gate driver unit, and a first control circuit connected to the gate driver unit. The first control circuit is configured to increase the resistance of the power device by issuing an instruction to reduce the slew rate of the power device to the first circuit during the turn-off of the power device.

The invention is suitable for the technical field of slew rate improvement of operational amplifiers, and provides a slew rate improvement circuit and an operational amplifier. The slew rate increasing circuit comprises a first slew rate triggering module, a first slew rate enhancing module, a second slew rate triggering module and a second slew rate enhancing module, the first slew rate triggering module is electrically connected with the first slew rate enhancing module, and the first slew rate enhancing module is used for being electrically connected with a grid electrode of an upper power tube. The second slew rate triggering module is electrically connected with the second slew rate strengthening module, and the second slew rate strengthening module is used for being electrically connected with the grid electrode of the lower power tube. The first slew rate triggering module and the second slew rate triggering module are additionally arranged, the establishment requirement of the output signal is directly judged according to the difference value between the first voltage and the second voltage, and the corresponding slew rate enhancing module is triggered in real time so as to quickly open the upper power tube or the lower power tube. The loop response delay problem does not exist in the whole process, the establishment time of the output signal can be remarkably shortened, and the output slew rate is more efficiently improved.

A power integrated circuit comprising at least one III-nitride high voltage high-electron-mobility transistor (power HEMT), the power HEMT comprising a heterojunction formed between a GaN layer and an AlGaN layer, and a slew rate protection circuit. The slew rate protection circuit comprising a clamping transistor electrically connected between a gate terminal and a source terminal of the power HEMT, and a detection circuit electrically connected between a drain terminal and the source terminal of the power HEMT, wherein an output of the detection circuit is electrically connected to a gate terminal of the clamping transistor. The detection circuit is configured to output a signal to turn-on the clamping transistor when a transient voltage greater than a threshold transient voltage is observed across the drain and the source terminals of the power HEMT.

The invention discloses a fast slew rate enhancement system of an operational amplifier, which comprises a current identification circuit for monitoring the current of a load tube current mirror structure in the operational amplifier; the comparator is used for comparing the current monitored by the current identification circuit or a signal related to the current with a threshold value, judging the size of the monitored current, taking a comparison result of the comparator as a basis for judging that the slew rate is limited, and starting an enable signal of the corresponding slew rate enhancement circuit; and the slew rate enhancing circuit is used for enhancing the slew rate of the operational amplifier by utilizing the slew rate enhancing enable signal identified by the comparator. Whether the operational amplifier is in the slew rate limited state or not is judged according to the chip internal current signal change of the load current mirror tube in the operational amplifier, and interference of off-chip noise signals is effectively prevented; and meanwhile, the influence of the operational amplifier input imbalance on the slew rate triggering system is reduced because the operational amplifier input imbalance is irrelevant to the operational amplifier differential input pair transistor imbalance.

The invention discloses a direct-current dynamic electric energy standard meter and a metering method with the direct-current dynamic electric energy standard meter, and the direct-current dynamic electric energy standard meter has the advantages of being high in anti-interference capability, small in equivalent inductive reactance, high in reliability and the like through zero offset correction, precise voltage and current correction, low-leakage isolation, broadband high-precision sampling, high-precision electric energy metering and the like. The distributed capacitance is small, and the temperature drift is small; meanwhile, voltage input adopts shielding type wire connection, distributed capacitance is reduced, and the leakage influence is reduced; a broadband high-precision amplifier is adopted for ripples, an LT1028 operational amplifier of ADI is adopted as the amplifier, and the broadband high-precision amplifier has the advantages of being high in bandwidth and slew rate and is suitable for broadband high-precision amplification within 2.4 KHz; the gain converter performs gain conversion on an input signal, thereby realizing range switching and meeting the requirement of wide-range testing.

A new inverting logic gate or a FET gate driver is disclosed. The logic gate mitigates the trade-off between power dissipation (or quiescent power) and slew rate of the typical RTL and DLL buffers by using an innovative circuit topology involving a pull-up bootstrapping transistor. The bootstrapping transistor may be an enhancement mode GaN field effect transistor (FET). This bootstrapping transistor may be driven by the complement of the input signal. Alternatively, the bootstrapping transistor may monitor the drain terminal of the pull-down transistor and conduct current accordingly. Other Boolean functions may also be achieved using this approach.

The invention belongs to the field of integrated circuits, and provides a folded cascode structure operational amplifier circuit with low power consumption and high slew rate, which is used for solving the problems of low slew rate, high power consumption and the like in the prior art. The flip voltage follower comprises current sources I0-I4, transistors M1-M14, a resistor R1 and a load capacitor CL, and on the basis of a traditional folded cascode structure, a flip voltage follower differential structure (DFVF) composed of transistors M4, M7 and M8, a flip voltage follower current sensor (FVFCS) composed of transistors M3, M4 and M8, and a source follower composed of a transistor M14 and the current source I4 are introduced. The DFVF is used for improving the discharge current of the load capacitor in the negative conversion stage, and meanwhile, the FVFCS is used for improving the charge current of the load capacitor in the positive conversion stage, so that the slew rate of the operational amplifier circuit is greatly improved, and under the condition, the maximum tail current of differential input can reach more than one hundred times of the current of the middle stage; therefore, the power consumption of the operational amplifier circuit is obviously reduced.

An apparatus includes a first transistor having a control input. The apparatus also includes a driver having an output coupled to the control input. The driver includes an adaptive slew rate control circuit having an input coupled to a first terminal. The adaptive slew rate control circuit is configured to control the slew rate of the first transistor based on a resistor coupled to the first terminal.

A method to enhance the functionality of a battery through the use of a pulsing apparatus. The pulsing apparatus configured to improve cell conditioning, maintain battery cells, and overall cell function through pulsing a selected current into and out of a battery. The pulsing selected to deliver a predetermined number of pulses to the battery. The pulses having a slew rate of at least 0.1 A / μs, a pulse width between 1 μs and 10 ms with a pulse rise time of at least 1 μs to alter a current of the battery. Preferably the predetermined number of pulses is between 100 pulses per second and 1 pulse per minute.

The invention relates to a clock-controlled self-turn-off slew rate enhancement circuit, and belongs to the technical field of analog integrated circuits. The two slew rate enhancing modules are respectively used for enhancing the bidirectional slew rate of the positive end and the negative end of the fully differential operational amplifier; each slew rate enhancement module comprises a self-turn-off comparison amplifier and a current output unit; the self-turn-off comparator is used for detecting the polarity of an input large signal, generating a positive and negative slew rate enhancement control signal, and automatically turning off after comparing for one time without influencing the response of a small signal; the current output unit is used for generating pulling current and is used for realizing bidirectional slew rate enhancement; the whole slew rate enhancement circuit can be controlled by a clock to be opened or closed. Under the conditions that static power consumption is not generated and small signal frequency characteristics are not affected, the two-way slew rate enhancing circuit is used in parallel with a fully differential operational amplifier, the two-way slew rate can be improved, it is guaranteed that a main circuit is not affected by a slew rate enhancing circuit, and overcharge and oscillation are prevented.