88results about "Modulation transference balanced arrangements" patented technology

Mixer circuitry can include a first pair of transistors coupled to a first tail node and configured to receive a local oscillator signal, a second pair of transistors coupled to a second tail node and configured to receive the local oscillator signal, a first digital-to-analog converter, a second DAC coupled between the first DAC and of the first pair of transistors, and a third DAC coupled between the first DAC and the second pair of transistors. During a first phase, control circuitry can sweep the first DAC to trim a first and / or other odd order local oscillator feedthrough. During a second phase, the control circuitry can sweep the second DAC to trim a second and / or other even order local oscillator feedthrough. During a third phase, the control circuitry can sweep the second and third DACs to reject signals associated with a second harmonic conversion gain of the mixer circuitry.

Certain aspects provide a circuit for frequency translation. The circuit includes first mixer circuitry coupled to a load circuit and having a first mixer configured to generate, based on a first differential input signal and a second differential input signal, a first portion of a frequency translated differential signal to be provided to the load circuit, and a second mixer configured to generate, based on a third differential input signal and a fourth differential input signal, a second portion of the frequency translated differential signal. The circuit also includes second mixer circuitry coupled to another load circuit and having a third mixer configured to generate, based on the first differential input signal and the fourth differential input signal, a first portion of another frequency translated differential signal, and a fourth mixer configured to generate, based on the third differential input signal and the second differential input signal, a second portion of the another frequency translated differential signal.

This invention relates to a ground-based analog frequency conversion system for satellite payloads and its implementation method. The system includes: a filtering and coupling module for receiving high-frequency signals in the Q and V bands and splitting them into a coupling signal and a main signal, which are then transmitted to a detector module and a limiter, respectively. The detector module detects the power of the coupling signal at different temperatures and feeds it back to the control module. The limiter limits the maximum strength of the main signal to protect the low-noise amplifier (LNO). The LNO amplifies the main signal and reduces noise. A phase-locked loop (PLL) and frequency conversion module down-converts the high-frequency signal to an intermediate-frequency (IF) signal. An IF filtering and amplification module suppresses spurious interference and amplifies the IF signal. A temperature compensation module and a gain control module adjust the attenuation value to achieve temperature compensation and ensure that the IF output signal strength meets preset requirements. All modules are integrated using micro-assembly technology. This system can reduce the power consumption and cost of satellite launch and communication.

This disclosure provides systems, methods, and devices for wireless communication that support reconfiguring degeneration components in a converged RF transceiver supporting carrier aggregation across sub-6 GHz frequency bands and mmWave frequency bands. In a first aspect, an apparatus includes an input port configured to receive a mixer input signal; a first mixer forming at least a portion of an HRM mixer and coupled to the input port; a first configurable degeneration component of a first processing path coupled between the input port and the first mixer; and a controller coupled to the first degeneration component, wherein the controller is configured to control a first aspect of a first degeneration component. Other aspects and features are also claimed and described.

The present disclosure relates to a subharmonic mixer including first and second radio frequency (RF) inputs, local oscillator inputs configured and arranged to receive at least a first, second, third, and fourth local oscillator signals having respective first, second, third, and fourth phases and each having a first frequency, first, second, third, and fourth outputs, a first capacitor coupled between the first RF input and a first node, a first switch coupled between the first node and the second RF input and including a first control terminal to receive the first local oscillator signal, a second switch coupled between the first node and the first output and including a second control terminal to receive the fourth local oscillator signal, and a third switch coupled between the first node and the third output and including a third control terminal to receive the second local oscillator signal.

Circuitry (24) is provided that includes a matching circuit (100), a first mixer (50-1) coupled to the matching circuit and configured to receive a signal with an oscillation frequency, a second mixer (50-2) coupled to the matching circuit, a first transmission line path (102-1) coupled between the matching circuit (100) and an input of the first mixer (50-1), and one or more capacitors (104) coupled to the input of the first mixer (50-1) and configured to reject signals at a harmonic frequency of the oscillation frequency. The wireless circuitry (24) can further include a second transmission line path (102-2) coupled between the matching circuit (100) and an input of the second mixer (50-2). The transmission line path can include a first transmission line for conveying signals between the matching circuit (100) and the first mixer (50-1), a second transmission line for conveying signals between the matching circuit (100) and the first mixer (50-1), and a floating transmission line interposed between the first and second transmission lines.

The invention discloses a blood flow signal processing method and device based on silicon-based photons and wearable device.The method comprises the steps that firstly, phase modulation is conducted on three emitted narrow-band lasers with different wavelengths, the modulation frequency is set to be 50-100 MHz, and the generated sideband frequency is set to be 50-100 MHz; receiving a reflection signal passing through a human body artery blood vessel target area, demodulating the reflection signal and a local oscillator signal in a frequency mixer, and extracting a PDH error signal; finally, the blood flow direction in the target area is judged according to the positive and negative values. According to the hemodynamic monitoring system based on the optical resonant cavity array and the PDH read-out technology, through the innovation of a physical mechanism (strength detection is replaced by frequency detection), the innovation of a spatial architecture (an array replaces a single point) and the breakthrough of an algorithm model (physical field decoupling and waveform separation), the detection accuracy is improved; the problems that a traditional non-invasive blood pressure monitoring technology is low in precision, poor in interference resistance and lack of deep pathological information are fundamentally solved.

The invention provides a WiFi network digital down-conversion system which comprises a multi-phase mixer and a resampling filter. The multi-phase mixer is used for converting a high-speed digital band-pass signal into a low-speed mode so as to realize digital down-conversion (DDC) on an FPGA (Field Programmable Gate Array) platform; and the resampling filter is used for reducing the sampling rate and removing unwanted frequency spectrum components to generate a complex baseband frequency spectrum. The multi-phase mixer PM of the present invention employs a parallel coordinate rotation digital computer (CORDIC) processor and a low pass filter array to reduce high speed data rates while minimizing resource utilization. The resampling filter comprises a cascade integral combination (CIC) filter and a multi-channel pulse finite impulse response (FIR) filter, optimal hardware cost is achieved, a floating point data type is converted into a fixed point data type, and resources are remarkably saved.

The application discloses an ultra-wideband odd harmonic frequency mixer for frequency spreading, and belongs to the technical field of planar harmonic frequency mixing, and comprises a first microstrip line, a Marchand balun, a first Schottky diode, a second Schottky diode, a matching circuit and a second microstrip line; the first microstrip line is located at a radio frequency input end and is connected with a non-balanced end of the Marchand balun, two balanced ends A and B of the Marchand balun are respectively connected with an anode of the first Schottky diode and a cathode of the second Schottky diode, the cathode of the first Schottky diode and the anode of the second Schottky diode are connected in sequence and are connected with the matching circuit and the second microstrip line in sequence, and the second microstrip line is connected with a local oscillator / intermediate frequency port. The harmonic frequency mixer can be directly used for frequency expansion of an existing mainstream frequency spectrometer, and the expansion range can cover the bandwidth of two to three standard waveguide frequency bands.

The disclosure relates to a Gilbert mixer. Example embodiments include a Gilbert mixer that includes first and second multi-finger field effect transistor, FET, devices, each including gate fingers arranged between alternating source terminals and drain terminals; first and second pairs of voltage rails arranged across the first and second FET devices respectively, each of the first and second pairs including an upper rail and a lower rail; a first interconnect connecting the upper rail of the first pair and the lower rail of the second pair to a first input terminal; and a second interconnect connecting the lower rail of the first pair and the upper rail of the second pair to a second input terminal. Gate fingers of the first FET device are connected to the first pair of voltage rails and gate fingers of the second FET device are connected to the second pair of voltage rails.

In some embodiments, a semiconductor chip device can be manufactured by a method that includes forming a plurality of layers including a redistribution layer, such that the redistribution layer has a signal path that provides a selected electrical property with a first end electrically connected to a first node and a second end electrically connected to a second node. The method can further include coupling a semiconductor substrate with a circuit to the plurality of layers, such that the first node is electrically connected to the circuit and the second node is connectable to a location external to the semiconductor chip device.

Frequency shift of a clock signal The present description relates to an electronic device (200) configured to apply a frequency shift function to a first signal (Clk_F) having a first frequency (F) comprising: - a delay element (206) adapted to provide a second signal (Clk_F_D) corresponding to the first signal delayed by a duration equal to a first period of said first signal (Clk_F) divided by four; - a branch successively comprising a first circuit (201) adapted to divide the frequency of a signal by a number, a second integrator circuit (203), said branch being adapted to provide a third signal (Q_comp) and a fourth signal (I_comp); and a third single-sideband mixer circuit (208). Figure for abstract: Fig. 2

This invention relates to the field of communication technology and discloses a circuit and electronic device for driving a passive mixer for up-conversion. The common-mode voltage of the differential signal is adjusted through a common-mode feedback adjustment network, and the adjusted voltage flows to a common-mode voltage control circuit. A drive control circuit outputs a drive control signal based on the differential signal to power the passive mixer. The common-mode voltage control circuit outputs a voltage control signal based on the adjusted voltage and a reference voltage, ensuring the common-mode voltage is regulated by the common-mode feedback adjustment network. Therefore, implementing this invention enables precise driving of the passive mixer through the processing of the differential signal by the drive control circuit. This is beneficial for improving the mixing gain of the passive mixer through drive control based on the drive control circuit, and it can improve the stability of the differential signal by setting up the common-mode feedback adjustment network and the common-mode voltage control circuit, thereby reducing the impact on the noise, bandwidth, and linearity of the mixing system.

The application provides a mixing circuit, a transmitter and a communication device. The mixing circuit comprises an I-channel digital-to-analog converter, a Q-channel digital-to-analog converter, a low-pass filter and a passive quadrature mixer; the low-pass filter comprises an active device, so that the output admittance of the mixing circuit has a frequency-dependent conductance. The consistency of the upper sideband and lower sideband gains of the mixing circuit is improved.

This invention relates to a low-noise, high-gain mixer. It employs a set of current-multiplexed transconductance amplifier circuits and a set of cross-coupled load circuits. Signal amplification is achieved through symmetrical P-type and N-type transconductors, resulting in a larger equivalent transconductance without increasing the path current. Simultaneously, a negative feedback resistor is connected between the input and output of the transconductor, eliminating the need for additional bias circuitry. An inductor is added between the source and ground of the transconductor to form a source negative feedback structure, increasing circuit stability without increasing power consumption or noise. Furthermore, the cross-coupled load circuit generates a larger equivalent load, achieving greater gain and improving circuit noise without increasing power consumption. This mixer exhibits high gain, low noise, and low power consumption.

The application discloses a current multiplexing phase-shifting mixer with high harmonic suppression ratio IN The I and Q two groups of differential signals generated by the quadrature generating unit are input into the I-path high harmonic suppression ratio phase-shifting mixing unit and the Q-path high harmonic suppression ratio phase-shifting mixing unit respectively, mixed with the differential local oscillator signal in the local oscillator signal and the control signal of the time sequence control unit, and phase-shifting is realized to generate the I and Q two paths of differential intermediate frequency signals; the positive terminal in the I-path differential intermediate frequency signal and the positive terminal in the Q-path differential intermediate frequency signal are input into the same load to generate an intermediate frequency positive output signal; the negative terminal in the I-path differential intermediate frequency signal and the negative terminal in the Q-path differential intermediate frequency signal are input into the same load to generate an intermediate frequency negative output signal; and the intermediate frequency positive output signal and the intermediate frequency negative output signal jointly constitute an intermediate frequency differential output signal. The application has the advantages of simple and compact structure, improved phase-shifting precision of the system, realized mixing, and reduced power consumption of the system.

The invention discloses a dual-mode millimeter-wave radar channel amplitude-phase distortion compensation method and device and a storage medium, and the method comprises the steps: obtaining a transmitting-receiving control parameter, and carrying out the analysis of the transmitting-receiving control parameter, and obtaining a transmitting waveform parameter and a local oscillator waveform parameter; starting from the low-frequency end of the working bandwidth of the system, adjusting a transmitting waveform parameter and a local oscillator waveform parameter, and generating paired single-tone correction signals as a transmitting pre-driving signal and a local oscillator pre-driving signal respectively; generating an analog intermediate frequency signal according to the transmitting pre-driving signal and the local oscillator pre-driving signal, and extracting a distortion amplitude phase value corresponding to the current frequency point from the analog intermediate frequency signal; controlling the frequency of the paired single-tone correction signals to be gradually increased according to a preset step length, and obtaining distortion amplitude and phase values of a plurality of frequency points; performing interpolation fitting on the distortion amplitude-phase value, and calculating an equalizer coefficient; and step frequency is adjusted and calculation is repeated until all equalizer coefficients are obtained for performing dual-mode millimeter wave radar channel amplitude phase distortion compensation.

The application discloses an IQ double-balanced FET resistive mixer, an oscillator signal is input from an oscillator quadrature coupler, passes through an oscillator first power amplifier and an oscillator second power amplifier, and then passes through two parallel oscillator first and second baluns to convert the oscillator signal into four oscillator output signals which are connected with four oscillator impedance matching networks respectively and used for two double-balanced FET resistive mixers; a radio frequency signal is input from a radio frequency balun and connected with two radio frequency T junction power dividers respectively to convert the radio frequency signal into four balanced output ports which are used for the two double-balanced FET resistive mixers; four intermediate frequency signals with a phase difference of 90 degrees are led out from the two double-balanced FET resistive mixers, the conversion loss and the image rejection system are improved, the area of the mirror frequency rejection mixer chip part is reduced, and the cost is lowered.

In one embodiment, an apparatus includes: a complementary metal oxide semiconductor (CMOS) up-conversion passive mixer to receive and up-convert a baseband signal to a radio frequency (RF) signal; and Class-AB amplifier circuitry coupled to the CMOS up-conversion passive mixer to receive and amplify the RF signal.

A Gilbert mixer for a radar transceiver comprises: first and second multi-interdigital field effect transistor (FET) devices, each FET device comprising a plurality of gate interdigitals arranged between alternating source and drain terminals along a longitudinal axis, the plurality of gate interdigitals of each FET device extending transverse to the longitudinal axis of the FET device; first and second pairs of voltage rails are arranged parallel to the longitudinal axis across the first and second FET devices, respectively, each of the first and second pairs of voltage rails comprising an upper rail and a lower rail; a first gate interconnect connects an upper rail of the first pair of voltage rails and a lower rail of the second pair of voltage rails to a first input; a second gate interconnect connects the lower rail of the first pair of voltage rails and the upper rail of the second pair of voltage rails to a second input. Alternating adjacent pairs of gate fingers of the first FET device are connected to respective upper and lower rails of the first pair of voltage rails, and alternating adjacent pairs of gate fingers of the second FET device are connected to respective upper and lower rails of the second pair of voltage rails.

Embodiments herein relate to a phase interpolator which includes a mixer having multiple legs or branches. Each leg includes a current path with p-type and n-type transistors in series. A bias generator provides a bias voltage for first p-type and n-type transistors in each leg. The bias voltage is also a function of an AC-coupled version of an input clock signal. Control voltage generators provide control voltages for second p-type and n-type transistors in each leg. The current in each leg is a function of the degree to which the transistors are conductive. Currents which are output from the different legs are combined at an input to a feedback circuit which may use a shunt resistor feedback path. Transistors in the bias generator and the control voltage generators may be replicas of the transistors in the legs.

Semiconductor devices for synchronizing networks are described. The semiconductor device includes a timing circuit having a sub-sampling phase lock loop. The sub-sampling phase lock loop includes a radio frequency sampler circuit that is configured to generate at least one error signal corresponding to a phase difference between an output signal of a voltage-controlled oscillator and a reference signal and a transconductor circuit that is configured to generate a tuning signal based on the at least one error signal. The tuning signal is configured to tune the voltage-controlled oscillator. The sub-sampling phase lock loop further includes an adaptive bias circuit that is configured to generate a nulling signal based on an offset in the tuning signal created by the transconductor circuit and provide the nulling signal to the transconductor circuit. The transconductor circuit is configured to adjust the tuning signal based on the nulling signal.

This invention discloses a four-quadrant analog multiplier circuit, comprising: a Gilbert cell circuit, a first active attenuation circuit, and a second active attenuation circuit; the first input terminal of the Gilbert cell circuit is connected to the output terminal of the active attenuation circuit, and the second input terminal of the Gilbert cell circuit is connected to the output terminal of the second active attenuation circuit; a first signal is input to the first active attenuation circuit; a second signal is input to the second active attenuation circuit; the first and second active attenuation circuits attenuate the input signal and then perform level shifting, so that the Gilbert cell circuit operates in the saturation region. By reducing the number of transistors between the positive and negative power supplies, the minimum operating voltage is lowered, thereby reducing power consumption; furthermore, the simultaneous use of active attenuation circuits to process the input signal effectively expands the linear operating region.

The invention relates to a current multiplexing low-noise mixer, which realizes low-noise amplification and frequency mixing functions of a single functional module. And the power consumption of the radio frequency front end is greatly reduced. The low-noise frequency mixer comprises a low-noise frequency mixing stage, a gain amplification stage, a multi-phase filter and a summing circuit, radio frequency signals enter the gain amplification stage through the low-noise frequency mixing stage, I / Q signals enter the multi-phase filter after gain amplification, the generated I / Q signals are added through the summing circuit, and the low-noise frequency mixer function and the image rejection function are achieved.

The invention provides an equalizer and a chip, and the equalizer comprises an amplification module which amplifies an input high-frequency signal based on an active inductor; and the bias current module is coupled with the active inductor in the amplification module and provides bias current for the active inductor. According to the equalizer and the chip, the bias current is added on the basis of the active inductor, so that the high-frequency gain can be improved under the condition that the low-frequency gain is not lost, the signal attenuation in a baseband is improved, and the equalization capability is high. In addition, although the equalizer and the chip provided by the invention increase the bias current, the loads of the input end and the output end are not obviously increased.

This invention discloses a wideband high-linearity mixer for use in radio frequency transceiver integrated circuits. The invention comprises a transconductance stage, a switching stage, a load stage, and an output stage. The wideband high-linearity mixer adopts a folded double-balanced architecture to reduce the requirements on the supply voltage. The transconductance stage uses a PMOS differential input pair structure, utilizing the source-level inductor negative feedback effect to improve the third-order intermodulation product and operating bandwidth. The switching stage uses cascode input technology to improve port isolation and mitigate second-order intermodulation, and utilizes resonance technology to improve linearity. The load stage uses long-channel active transistors to achieve high gain. The output stage uses a common-source amplifier structure to increase the driving capability for subsequent circuits. This invention features wide operating bandwidth and high linearity, and can be used in wireless communication radio frequency integrated circuits such as navigation transceivers, satellite communication transceivers, and Bluetooth transceivers.

The application provides an adaptive continuous-time linear equalizer and a control method, the adaptive continuous-time linear equalizer comprising: a signal adjusting module, the signal adjusting module being configured with an adjustable resistance and an adjustable capacitance; the signal adjusting module being configured to: receive a data signal; perform high-frequency gain processing on the data signal according to a gain coefficient; an eye diagram calculation module, the eye diagram calculation module being configured to: obtain eye height data and eye width data according to the data signal; an adaptive module, the adaptive module being configured to: obtain an equalization coefficient according to the eye height data and the eye width data; the equalization coefficient being a resistance adjustment value of the adjustable resistance and a capacitance adjustment value of the adjustable capacitance; the signal adjusting module being controlled to operate according to the equalization coefficient; when the signal adjusting module operates according to the equalization coefficient, the data signal reaches a target equalization effect, so as to solve the problems that a current linear equalizer has a relatively long signal equalization processing process and the quality of the processed signal is not located at a maximum value.

There is provide a system comprising a plurality of receivers, each receiver comprising a local oscillator configured to generate a local oscillation signal, a primary mixer configured to mix an input signal with a reference signal at a reference frequency to generate a first output signal, a divider configured to divide the reference signal into a second reference signal at a second frequency and a secondary mixer coupled to the primary mixer and configured to mix the first output signal and the second reference signal at the second frequency. In a first mode, the reference signal for a first of a plurality of the receivers is the local oscillation signal from the first receiver and, in a second mode, the reference signal is the local oscillation signal from another of the plurality of receivers.

The application provides a single-balanced mixer circuit based on a carbon nanotube Schottky diode, comprising the following structure: one end of the carbon nanotube Schottky diode is connected with a 180-degree hybrid junction structure, and one end is connected with a fan-shaped open circuit line structure; a radio frequency input impedance matching network is located between a radio frequency input port and the 180-degree hybrid junction; a local oscillator input impedance matching network is located between a local oscillator input port and the 180-degree hybrid junction; the fan-shaped open circuit line structure is located between the carbon nanotube Schottky diode device and a 1 / 4 wavelength high-impedance microstrip line; the 1 / 4 wavelength high-impedance microstrip line is located between the fan-shaped open circuit line structure and an air bridge; the air bridge is transversely arranged on the radio frequency input impedance matching network; a thin film resistor and a plate capacitor are connected on a intermediate frequency output line. The mixer circuit provided by the application can realize lower conversion loss in a high frequency band, and greatly reduces the parasitic capacitance of the Schottky diode device and the substrate loss of the passive device.

An active frequency mixer comprises magnetically coupled inductors, including a transconductance stage configured to receive an RF signal and output a current corresponding to the input signal, a switching stage configured to convert a frequency of a signal output from the transconductance stage using a local oscillation signal and output the converted frequency signal, a load stage electrically connected between the switching stage and a power terminal, and a current bleeding stage connected in parallel with the load stage and outputting a bleeding current to the switching stage.