This application discloses an
equalizer circuit. The
equalizer circuit includes a
current source module, an RC network, and a differential
transistor pair. The
current source module is electrically connected to the RC network, and the RC network is electrically connected to the differential
transistor pair. The
equalizer circuit also includes: an adjustable active
inductor module, electrically connected to the first and second transistors in the differential
transistor pair; and a control module, electrically connected to the
current source module, the RC network, and the adjustable active
inductor module, used to change the frequencies of the dominant and secondary poles of the equalizer circuit by adjusting the performance parameters of the current source module, the RC network, and the adjustable active
inductor module. The above equalizer circuit can obtain compensation curves for peak values at different frequency points, effectively solving channel compensation problems under different protocols and data rates. It solves the problem in related technologies where the equalizer needs to compensate for different channel attenuations under different protocols and data rates, making it impossible to achieve adjustable
gain enhancement within 0-15dB for each frequency peak.