207results about "Modulation transference balanced arrangements" patented technology

The invention provides a frequency mixer and signal transmission equipment, and belongs to the technical field of communication. In the scheme provided by the invention, the mixer can transmit the local oscillator signal through the slot line, and transmit the first signal, the second signal and the third signal through the microstrip line. Therefore, it can be ensured that the transmission mode of the local oscillator signal is different from the transmission mode of the first signal and is different from the transmission modes of the second signal and the third signal, that is, the transmission mode isolation of the local oscillator signal from the first signal and the transmission mode isolation of the local oscillator signal from the second signal and the third signal can be realized. The transmission modes of the local oscillator signal and other signals are isolated, so that the leakage of the local oscillator signal at other signal ports can be effectively reduced, and the performance of the mixer is effectively improved.

A device for generating a qubit control signal includes: a first signal envelope generator circuit including a first multiple of signal sources, in which an output of each signal source of the first multiple of signal sources is combined to provide a first cumulative output; and a first mixer circuit coupled to the first signal envelope generator circuit, in which the first cumulative output is coupled to a first input of the first mixer circuit, and an output of the first mixer circuit includes a first qubit control signal.

A mixer includes a mixing stage, and a first transistor and a second transistor coupled to the mixing stage. A gate of the first transistor is coupled to a first input of the mixer, and a gate of the second transistor is coupled to a second input of the mixer. The mixer also includes a first source resistor coupled to a source of the first transistor, and a second source resistor coupled to a source of the second transistor. The mixer further includes an amplifier having a first input coupled to the source of the first transistor, and a second input coupled to the source of the second transistor. The amplifier is configured to adjust at least one bias voltage of at least one of the first transistor and the second transistor based on a differential voltage between the first and second inputs of the amplifier.

The invention discloses a continuous time linear equalizer which comprises a transconductance circuit, a transimpedance amplifier circuit and a common-mode voltage feedback circuit. The transconductance circuit comprises a pair of PMOS (P-channel Metal Oxide Semiconductor) tubes, a pair of NMOS (N-channel Metal Oxide Semiconductor) tubes, six current sources and two RC (Resistance-Capacitance) networks; two branches are arranged between the power supply and the ground. A grid electrode of the first PMOS tube is connected with a grid electrode of the first NMOS tube, a grid electrode of the second PMOS tube is connected with a grid electrode of the second NMOS tube, and the first PMOS tube and the second PMOS tube respectively receive a pair of differential input voltages. The drain electrode of the first PMOS tube is connected with the drain electrode of the first NMOS tube, the drain electrode of the second PMOS tube is connected with the drain electrode of the second NMOS tube, and a pair of differential intermediate signals is output respectively. The circuit is simple in structure and only has a primary circuit; a complementary structure of PMOS input geminate transistors and NMOS input geminate transistors is adopted, bias current is utilized to the maximum extent, power consumption is low, and compared with a traditional circuit, the current utilization rate is improved; balancing of a wide frequency band can be realized under the condition of low power consumption, and the gain is high.

This distributed double-balanced mixer includes unit cells (4a-1 to 4a-N), each of which outputs the following signals to transmission lines (CPW20pp, CPW20nn, CPW20np, CPW20pn) without synthesizing said signals: a signal (R++) obtained by synthesizing an in-phase LO signal (LO+) and an in-phase IF signal (IF+); a signal (RF--) obtained by synthesizing a reverse-phase LO signal (LO-) and a reverse-phase IF signal (IF-); a signal (RF-+) obtained by synthesizing the reverse-phase LO signal (LO-) and the in-phase IF signal (IF+); and a signal (RF+-) obtained by synthesizing the in-phase LO signal (LO+) and the reverse-phase IF signal (IF-).

The utility model discloses a miniaturized image rejection frequency mixing circuit, which comprises two passive double-balanced frequency mixers, a local oscillator bridge, a phase shift circuit and a power divider, the first input ends of the first passive double-balanced mixer and the second passive double-balanced mixer are connected with an external antenna; the second input end of the first passive double-balanced mixer is connected with the first output end of the local oscillator bridge, the second input end of the second passive double-balanced mixer is connected with the second output end of the local oscillator bridge, and the output end of the first passive double-balanced mixer is connected with the input end of the phase shift circuit. The output end of the second passive double-balanced mixer is connected with the second input end of the power divider; the isolation end of the local oscillator bridge is connected with the load resistor, and the input end of the local oscillator bridge is connected with the frequency source; the output end of the phase shift circuit is connected with the first input end of the power divider, and the output end of the power divider is connected with an external circuit. According to the utility model, the size of the image rejection mixer can be obviously reduced, and miniaturization design of a radar receiver is facilitated.

The invention provides a mixer correction circuit and a mixer, and relates to the technical field of integrated circuits, the mixer correction circuit comprises an intermediate frequency input stage, a local oscillator input stage and a load stage which are connected in sequence; the intermediate frequency input stage comprises a first input transconductance unit and a second input transconductance unit; the local oscillator input stage comprises a first local oscillator input unit and a second local oscillator input unit; transconductance transistors included in the first input transconductance unit and the second input transconductance unit are respectively provided with a current adjusting array. The current adjustment array is used for suppressing current deviation of the first input transconductance unit and the second input transconductance unit. According to the mixer correction circuit and the mixer provided by the invention, the current deviation is suppressed through the current adjustment array, the current balance of the transconductance transistor of the mixer can be realized, local oscillation signals are effectively prevented from leaking to an intermediate frequency end and a radio frequency end, and the use requirements of the mixer can be met under the condition that the performance of the mixer is not influenced.

The invention relates to a microwave and millimeter wave technology, in particular to an electrically tunable substrate integrated waveguide equalizer based on MESFETs and variable capacitance diodes, which comprises an SIW body, two ends of the SIW body are respectively provided with a 50-ohm microstrip line, and the 50-ohm microstrip lines are connected with the SIW body through gradual transition lines; a rectangular area formed by a groove type frame is arranged in the center of an SIW body, a plurality of electronic elements are arranged on the groove type frame of the rectangular area, MESFETs are introduced into the electronic elements, and variable microwave resistance is fitted by utilizing the characteristic that the MESFETs present different impedance characteristics between a drain and a source under different gate voltages. And the impedance value is adjusted by adjusting the direct-current grid voltage on the MESFETs. According to the invention, the balance value is dynamically and uniformly adjusted, and the adjustment range is widened.

Mixer circuitry can include a first pair of transistors coupled to a first tail node and configured to receive a local oscillator signal, a second pair of transistors coupled to a second tail node and configured to receive the local oscillator signal, a first digital-to-analog converter, a second DAC coupled between the first DAC and of the first pair of transistors, and a third DAC coupled between the first DAC and the second pair of transistors. During a first phase, control circuitry can sweep the first DAC to trim a first and / or other odd order local oscillator feedthrough. During a second phase, the control circuitry can sweep the second DAC to trim a second and / or other even order local oscillator feedthrough. During a third phase, the control circuitry can sweep the second and third DACs to reject signals associated with a second harmonic conversion gain of the mixer circuitry.

Mixer circuitry can include a first pair of transistors coupled to a first tail node and configured to receive a local oscillator signal, a second pair of transistors coupled to a second tail node and configured to receive the local oscillator signal, a first digital-to-analog converter, a second DAC coupled between the first DAC and of the first pair of transistors, and a third DAC coupled between the first DAC and the second pair of transistors. During a first phase, control circuitry can sweep the first DAC to trim a first and / or other odd order local oscillator feedthrough. During a second phase, the control circuitry can sweep the second DAC to trim a second and / or other even order local oscillator feedthrough. During a third phase, the control circuitry can sweep the second and third DACs to reject signals associated with a second harmonic conversion gain of the mixer circuitry.

The invention provides a frequency mixer. The frequency mixer comprises a double-balanced Gilbert frequency mixer, an interstage first coupling transformer, a variable gain buffer, an interstage second coupling transformer, an I / Q orthogonal passive frequency mixer and a TIA filter, the double-balance Gilbert mixer, the interstage first coupling transformer, the variable gain buffer, the interstage second coupling transformer, the I / Q orthogonal passive mixer and the TIA filter are electrically connected in sequence; the double-balanced Gilbert mixer is used for receiving the differential signal and mixing the differential signal with a local oscillator signal of the double-balanced Gilbert mixer to realize first down-conversion and output a difference frequency signal; the variable gain buffer is used for realizing amplification processing of different gains; the I / Q orthogonal passive mixer is used for mixing the I-path signal and the Q-path signal with a local oscillator signal to realize second down-conversion and output a difference frequency signal; the TIA filter is used for filtering an input difference frequency signal and then outputting an intermediate frequency signal. The mixer can realize adjustable gain, and has good linearity and noise performance.

Certain aspects provide a circuit for frequency translation. The circuit includes first mixer circuitry coupled to a load circuit and having a first mixer configured to generate, based on a first differential input signal and a second differential input signal, a first portion of a frequency translated differential signal to be provided to the load circuit, and a second mixer configured to generate, based on a third differential input signal and a fourth differential input signal, a second portion of the frequency translated differential signal. The circuit also includes second mixer circuitry coupled to another load circuit and having a third mixer configured to generate, based on the first differential input signal and the fourth differential input signal, a first portion of another frequency translated differential signal, and a fourth mixer configured to generate, based on the third differential input signal and the second differential input signal, a second portion of the another frequency translated differential signal.

This invention relates to a ground-based analog frequency conversion system for satellite payloads and its implementation method. The system includes: a filtering and coupling module for receiving high-frequency signals in the Q and V bands and splitting them into a coupling signal and a main signal, which are then transmitted to a detector module and a limiter, respectively. The detector module detects the power of the coupling signal at different temperatures and feeds it back to the control module. The limiter limits the maximum strength of the main signal to protect the low-noise amplifier (LNO). The LNO amplifies the main signal and reduces noise. A phase-locked loop (PLL) and frequency conversion module down-converts the high-frequency signal to an intermediate-frequency (IF) signal. An IF filtering and amplification module suppresses spurious interference and amplifies the IF signal. A temperature compensation module and a gain control module adjust the attenuation value to achieve temperature compensation and ensure that the IF output signal strength meets preset requirements. All modules are integrated using micro-assembly technology. This system can reduce the power consumption and cost of satellite launch and communication.

A device for generating a qubit control signal comprises: a first signal envelope generator circuit comprising a first plurality of signal sources, wherein an output of each of the first plurality of signal sources is combined to provide a first cumulative output; and a first mixer circuit coupled to the first signal envelope generator circuit, wherein the first cumulative output is coupled to a first input of the first mixer circuit, and an output of the first mixer circuit comprises a first qubit control signal.

The embodiment of the invention discloses an IQ mixer, a quantum measurement and control system and quantum computing equipment, and is applied to the technical field of frequency mixing. In the embodiment of the invention, the in-phase port and the quadrature phase port are arranged on one of the two opposite side surfaces of the cavity of the IQ mixer, and the local oscillation port and the radio frequency port are arranged on the other side surface, so that when the IQ mixer is applied to the signal transmission module of the quantum measurement and control system, the signal transmission efficiency is improved; according to the invention, extrusion of ports between side surfaces of adjacent IQ mixers can be avoided, and a plurality of IQ mixers can be compactly arranged on a signal transmission module of a quantum measurement and control system.

This disclosure provides systems, methods, and devices for wireless communication that support reconfiguring degeneration components in a converged RF transceiver supporting carrier aggregation across sub-6 GHz frequency bands and mmWave frequency bands. In a first aspect, an apparatus includes an input port configured to receive a mixer input signal; a first mixer forming at least a portion of an HRM mixer and coupled to the input port; a first configurable degeneration component of a first processing path coupled between the input port and the first mixer; and a controller coupled to the first degeneration component, wherein the controller is configured to control a first aspect of a first degeneration component. Other aspects and features are also claimed and described.

An apparatus comprising a local oscillator (LO) for driving a mixer, the LO being configured to oscillate at an oscillation frequency, and generate a first set of LO signals, wherein each of the first set of LO signals has a LO signal frequency equal to a first multiplication factor m multiplied by the oscillation frequency, the first multiplication factor m, being an integer greater than or equal to two, and each of the first set of LO signals is separated by adjacent LO signals by a phase difference equal to 360° divided by a first variable n, the first variable n being an integer that is greater than or equal to two.

The present disclosure relates to a subharmonic mixer including first and second radio frequency (RF) inputs, local oscillator inputs configured and arranged to receive at least a first, second, third, and fourth local oscillator signals having respective first, second, third, and fourth phases and each having a first frequency, first, second, third, and fourth outputs, a first capacitor coupled between the first RF input and a first node, a first switch coupled between the first node and the second RF input and including a first control terminal to receive the first local oscillator signal, a second switch coupled between the first node and the first output and including a second control terminal to receive the fourth local oscillator signal, and a third switch coupled between the first node and the third output and including a third control terminal to receive the second local oscillator signal.

A passive mixer circuit includes a high-frequency terminal, a low-frequency terminal, a main MOSFET to which a local oscillation frequency signal is input, and a bias generation section, in which the bias generation section includes a sub-MOSFET of a same type as the main MOSFET, a voltage follower circuit including an operational amplifier, and a resistance element, a drain and a gate of the sub-MOSFET are shorted and directly or indirectly receive an output from the voltage follower circuit, a reference voltage is input to a non-inverting input terminal of the operational amplifier, a gate bias voltage based on a gate voltage of the sub-MOSFET is supplied to a gate of the main MOSFET, and a source-drain bias voltage based on a source voltage of the sub-MOSFET is supplied to a source or a drain of the main MOSFET.

Circuitry (24) is provided that includes a matching circuit (100), a first mixer (50-1) coupled to the matching circuit and configured to receive a signal with an oscillation frequency, a second mixer (50-2) coupled to the matching circuit, a first transmission line path (102-1) coupled between the matching circuit (100) and an input of the first mixer (50-1), and one or more capacitors (104) coupled to the input of the first mixer (50-1) and configured to reject signals at a harmonic frequency of the oscillation frequency. The wireless circuitry (24) can further include a second transmission line path (102-2) coupled between the matching circuit (100) and an input of the second mixer (50-2). The transmission line path can include a first transmission line for conveying signals between the matching circuit (100) and the first mixer (50-1), a second transmission line for conveying signals between the matching circuit (100) and the first mixer (50-1), and a floating transmission line interposed between the first and second transmission lines.

The invention discloses a blood flow signal processing method and device based on silicon-based photons and wearable device.The method comprises the steps that firstly, phase modulation is conducted on three emitted narrow-band lasers with different wavelengths, the modulation frequency is set to be 50-100 MHz, and the generated sideband frequency is set to be 50-100 MHz; receiving a reflection signal passing through a human body artery blood vessel target area, demodulating the reflection signal and a local oscillator signal in a frequency mixer, and extracting a PDH error signal; finally, the blood flow direction in the target area is judged according to the positive and negative values. According to the hemodynamic monitoring system based on the optical resonant cavity array and the PDH read-out technology, through the innovation of a physical mechanism (strength detection is replaced by frequency detection), the innovation of a spatial architecture (an array replaces a single point) and the breakthrough of an algorithm model (physical field decoupling and waveform separation), the detection accuracy is improved; the problems that a traditional non-invasive blood pressure monitoring technology is low in precision, poor in interference resistance and lack of deep pathological information are fundamentally solved.

The utility model discloses a miniaturized high-reliability equalizer, which is based on a GaAs IPD process and comprises an equivalent capacitor C1, one end of the equivalent capacitor C1 is used as an input end of the equalizer, and the other end of the equivalent capacitor C1 is used as an output end of the equalizer; one end of the equivalent capacitor C1 is also connected with one end of the equivalent resistor R1, the other end of the equivalent capacitor C1 is also connected with one end of the equivalent resistor R2, the other end of the equivalent resistor R1 is respectively connected with the other end of the equivalent resistor R2 and the grounding equivalent resistor R3, the resistors, the capacitors and the inductors are improved to form an equalization network, and the overall performance of the equalizer is improved.

The invention provides a WiFi network digital down-conversion system which comprises a multi-phase mixer and a resampling filter. The multi-phase mixer is used for converting a high-speed digital band-pass signal into a low-speed mode so as to realize digital down-conversion (DDC) on an FPGA (Field Programmable Gate Array) platform; and the resampling filter is used for reducing the sampling rate and removing unwanted frequency spectrum components to generate a complex baseband frequency spectrum. The multi-phase mixer PM of the present invention employs a parallel coordinate rotation digital computer (CORDIC) processor and a low pass filter array to reduce high speed data rates while minimizing resource utilization. The resampling filter comprises a cascade integral combination (CIC) filter and a multi-channel pulse finite impulse response (FIR) filter, optimal hardware cost is achieved, a floating point data type is converted into a fixed point data type, and resources are remarkably saved.

Each unit cell (4a-1 to 4a-N) of the distributed double balanced mixer outputs a signal (R++) obtained by multiplexing the LO signal (LO+) on the positive phase side and the IF signal (IF+) on the positive phase side, a signal (RF−−) obtained by multiplexing the LO signal (LO−) on the negative phase side and the IF signal (IF−) on the negative phase side, a signal (RF−+) obtained by multiplexing the LO signal (LO−) on the negative phase side and the IF signal (IF+) on the positive phase side, and a signal (RF+−) obtained by multiplexing LO signal (LO+) on the positive phase side and IF signal (IF−) on the negative phase side, to transmission lines (CPW20pp, CPW20nn, CPW20np, CPW20pn), without synthesizing the signals.

The application discloses an ultra-wideband odd harmonic frequency mixer for frequency spreading, and belongs to the technical field of planar harmonic frequency mixing, and comprises a first microstrip line, a Marchand balun, a first Schottky diode, a second Schottky diode, a matching circuit and a second microstrip line; the first microstrip line is located at a radio frequency input end and is connected with a non-balanced end of the Marchand balun, two balanced ends A and B of the Marchand balun are respectively connected with an anode of the first Schottky diode and a cathode of the second Schottky diode, the cathode of the first Schottky diode and the anode of the second Schottky diode are connected in sequence and are connected with the matching circuit and the second microstrip line in sequence, and the second microstrip line is connected with a local oscillator / intermediate frequency port. The harmonic frequency mixer can be directly used for frequency expansion of an existing mainstream frequency spectrometer, and the expansion range can cover the bandwidth of two to three standard waveguide frequency bands.

The disclosure relates to a Gilbert mixer. Example embodiments include a Gilbert mixer that includes first and second multi-finger field effect transistor, FET, devices, each including gate fingers arranged between alternating source terminals and drain terminals; first and second pairs of voltage rails arranged across the first and second FET devices respectively, each of the first and second pairs including an upper rail and a lower rail; a first interconnect connecting the upper rail of the first pair and the lower rail of the second pair to a first input terminal; and a second interconnect connecting the lower rail of the first pair and the upper rail of the second pair to a second input terminal. Gate fingers of the first FET device are connected to the first pair of voltage rails and gate fingers of the second FET device are connected to the second pair of voltage rails.

In some embodiments, a semiconductor chip device can be manufactured by a method that includes forming a plurality of layers including a redistribution layer, such that the redistribution layer has a signal path that provides a selected electrical property with a first end electrically connected to a first node and a second end electrically connected to a second node. The method can further include coupling a semiconductor substrate with a circuit to the plurality of layers, such that the first node is electrically connected to the circuit and the second node is connectable to a location external to the semiconductor chip device.

The invention provides a novel double-balance terahertz frequency multiplier, and belongs to the technical field of terahertz communication. The frequency multiplier comprises an input Y-type waveguide power divider which comprises an input port and two output ports and is used for decomposing a path of subwave input signals into two paths of input signals with the same power and opposite phases; the output Y-shaped waveguide power divider comprises two input ports and an output port and is used for synthesizing the two paths of frequency multiplication signals into one path of output signal; the frequency multiplier circuit comprises four diodes, the diodes are connected in series end to end to form an annular symmetrical structure, and the joint of every two adjacent diodes is used as an external connection port; a group of symmetrical external connection ports are used as input ports to be connected with two output ports of the input Y-shaped waveguide power divider; and the other group of symmetrical external connection ports are used as output ports to be connected with two input ports of the output Y-shaped waveguide power divider. According to the invention, double balance can be realized, bandwidth is improved, and harmonic components are reduced.

Frequency shift of a clock signal The present description relates to an electronic device (200) configured to apply a frequency shift function to a first signal (Clk_F) having a first frequency (F) comprising: - a delay element (206) adapted to provide a second signal (Clk_F_D) corresponding to the first signal delayed by a duration equal to a first period of said first signal (Clk_F) divided by four; - a branch successively comprising a first circuit (201) adapted to divide the frequency of a signal by a number, a second integrator circuit (203), said branch being adapted to provide a third signal (Q_comp) and a fourth signal (I_comp); and a third single-sideband mixer circuit (208). Figure for abstract: Fig. 2

This invention relates to the field of communication technology and discloses a circuit and electronic device for driving a passive mixer for up-conversion. The common-mode voltage of the differential signal is adjusted through a common-mode feedback adjustment network, and the adjusted voltage flows to a common-mode voltage control circuit. A drive control circuit outputs a drive control signal based on the differential signal to power the passive mixer. The common-mode voltage control circuit outputs a voltage control signal based on the adjusted voltage and a reference voltage, ensuring the common-mode voltage is regulated by the common-mode feedback adjustment network. Therefore, implementing this invention enables precise driving of the passive mixer through the processing of the differential signal by the drive control circuit. This is beneficial for improving the mixing gain of the passive mixer through drive control based on the drive control circuit, and it can improve the stability of the differential signal by setting up the common-mode feedback adjustment network and the common-mode voltage control circuit, thereby reducing the impact on the noise, bandwidth, and linearity of the mixing system.