142results about "Modulation transference balanced arrangements" patented technology

A mixer includes a mixing stage, and a first transistor and a second transistor coupled to the mixing stage. A gate of the first transistor is coupled to a first input of the mixer, and a gate of the second transistor is coupled to a second input of the mixer. The mixer also includes a first source resistor coupled to a source of the first transistor, and a second source resistor coupled to a source of the second transistor. The mixer further includes an amplifier having a first input coupled to the source of the first transistor, and a second input coupled to the source of the second transistor. The amplifier is configured to adjust at least one bias voltage of at least one of the first transistor and the second transistor based on a differential voltage between the first and second inputs of the amplifier.

Mixer circuitry can include a first pair of transistors coupled to a first tail node and configured to receive a local oscillator signal, a second pair of transistors coupled to a second tail node and configured to receive the local oscillator signal, a first digital-to-analog converter, a second DAC coupled between the first DAC and of the first pair of transistors, and a third DAC coupled between the first DAC and the second pair of transistors. During a first phase, control circuitry can sweep the first DAC to trim a first and / or other odd order local oscillator feedthrough. During a second phase, the control circuitry can sweep the second DAC to trim a second and / or other even order local oscillator feedthrough. During a third phase, the control circuitry can sweep the second and third DACs to reject signals associated with a second harmonic conversion gain of the mixer circuitry.

Mixer circuitry can include a first pair of transistors coupled to a first tail node and configured to receive a local oscillator signal, a second pair of transistors coupled to a second tail node and configured to receive the local oscillator signal, a first digital-to-analog converter, a second DAC coupled between the first DAC and of the first pair of transistors, and a third DAC coupled between the first DAC and the second pair of transistors. During a first phase, control circuitry can sweep the first DAC to trim a first and / or other odd order local oscillator feedthrough. During a second phase, the control circuitry can sweep the second DAC to trim a second and / or other even order local oscillator feedthrough. During a third phase, the control circuitry can sweep the second and third DACs to reject signals associated with a second harmonic conversion gain of the mixer circuitry.

The invention provides a frequency mixer. The frequency mixer comprises a double-balanced Gilbert frequency mixer, an interstage first coupling transformer, a variable gain buffer, an interstage second coupling transformer, an I / Q orthogonal passive frequency mixer and a TIA filter, the double-balance Gilbert mixer, the interstage first coupling transformer, the variable gain buffer, the interstage second coupling transformer, the I / Q orthogonal passive mixer and the TIA filter are electrically connected in sequence; the double-balanced Gilbert mixer is used for receiving the differential signal and mixing the differential signal with a local oscillator signal of the double-balanced Gilbert mixer to realize first down-conversion and output a difference frequency signal; the variable gain buffer is used for realizing amplification processing of different gains; the I / Q orthogonal passive mixer is used for mixing the I-path signal and the Q-path signal with a local oscillator signal to realize second down-conversion and output a difference frequency signal; the TIA filter is used for filtering an input difference frequency signal and then outputting an intermediate frequency signal. The mixer can realize adjustable gain, and has good linearity and noise performance.

Certain aspects provide a circuit for frequency translation. The circuit includes first mixer circuitry coupled to a load circuit and having a first mixer configured to generate, based on a first differential input signal and a second differential input signal, a first portion of a frequency translated differential signal to be provided to the load circuit, and a second mixer configured to generate, based on a third differential input signal and a fourth differential input signal, a second portion of the frequency translated differential signal. The circuit also includes second mixer circuitry coupled to another load circuit and having a third mixer configured to generate, based on the first differential input signal and the fourth differential input signal, a first portion of another frequency translated differential signal, and a fourth mixer configured to generate, based on the third differential input signal and the second differential input signal, a second portion of the another frequency translated differential signal.

This invention relates to a ground-based analog frequency conversion system for satellite payloads and its implementation method. The system includes: a filtering and coupling module for receiving high-frequency signals in the Q and V bands and splitting them into a coupling signal and a main signal, which are then transmitted to a detector module and a limiter, respectively. The detector module detects the power of the coupling signal at different temperatures and feeds it back to the control module. The limiter limits the maximum strength of the main signal to protect the low-noise amplifier (LNO). The LNO amplifies the main signal and reduces noise. A phase-locked loop (PLL) and frequency conversion module down-converts the high-frequency signal to an intermediate-frequency (IF) signal. An IF filtering and amplification module suppresses spurious interference and amplifies the IF signal. A temperature compensation module and a gain control module adjust the attenuation value to achieve temperature compensation and ensure that the IF output signal strength meets preset requirements. All modules are integrated using micro-assembly technology. This system can reduce the power consumption and cost of satellite launch and communication.

This disclosure provides systems, methods, and devices for wireless communication that support reconfiguring degeneration components in a converged RF transceiver supporting carrier aggregation across sub-6 GHz frequency bands and mmWave frequency bands. In a first aspect, an apparatus includes an input port configured to receive a mixer input signal; a first mixer forming at least a portion of an HRM mixer and coupled to the input port; a first configurable degeneration component of a first processing path coupled between the input port and the first mixer; and a controller coupled to the first degeneration component, wherein the controller is configured to control a first aspect of a first degeneration component. Other aspects and features are also claimed and described.

The present disclosure relates to a subharmonic mixer including first and second radio frequency (RF) inputs, local oscillator inputs configured and arranged to receive at least a first, second, third, and fourth local oscillator signals having respective first, second, third, and fourth phases and each having a first frequency, first, second, third, and fourth outputs, a first capacitor coupled between the first RF input and a first node, a first switch coupled between the first node and the second RF input and including a first control terminal to receive the first local oscillator signal, a second switch coupled between the first node and the first output and including a second control terminal to receive the fourth local oscillator signal, and a third switch coupled between the first node and the third output and including a third control terminal to receive the second local oscillator signal.

A passive mixer circuit includes a high-frequency terminal, a low-frequency terminal, a main MOSFET to which a local oscillation frequency signal is input, and a bias generation section, in which the bias generation section includes a sub-MOSFET of a same type as the main MOSFET, a voltage follower circuit including an operational amplifier, and a resistance element, a drain and a gate of the sub-MOSFET are shorted and directly or indirectly receive an output from the voltage follower circuit, a reference voltage is input to a non-inverting input terminal of the operational amplifier, a gate bias voltage based on a gate voltage of the sub-MOSFET is supplied to a gate of the main MOSFET, and a source-drain bias voltage based on a source voltage of the sub-MOSFET is supplied to a source or a drain of the main MOSFET.

Circuitry (24) is provided that includes a matching circuit (100), a first mixer (50-1) coupled to the matching circuit and configured to receive a signal with an oscillation frequency, a second mixer (50-2) coupled to the matching circuit, a first transmission line path (102-1) coupled between the matching circuit (100) and an input of the first mixer (50-1), and one or more capacitors (104) coupled to the input of the first mixer (50-1) and configured to reject signals at a harmonic frequency of the oscillation frequency. The wireless circuitry (24) can further include a second transmission line path (102-2) coupled between the matching circuit (100) and an input of the second mixer (50-2). The transmission line path can include a first transmission line for conveying signals between the matching circuit (100) and the first mixer (50-1), a second transmission line for conveying signals between the matching circuit (100) and the first mixer (50-1), and a floating transmission line interposed between the first and second transmission lines.

The invention discloses a blood flow signal processing method and device based on silicon-based photons and wearable device.The method comprises the steps that firstly, phase modulation is conducted on three emitted narrow-band lasers with different wavelengths, the modulation frequency is set to be 50-100 MHz, and the generated sideband frequency is set to be 50-100 MHz; receiving a reflection signal passing through a human body artery blood vessel target area, demodulating the reflection signal and a local oscillator signal in a frequency mixer, and extracting a PDH error signal; finally, the blood flow direction in the target area is judged according to the positive and negative values. According to the hemodynamic monitoring system based on the optical resonant cavity array and the PDH read-out technology, through the innovation of a physical mechanism (strength detection is replaced by frequency detection), the innovation of a spatial architecture (an array replaces a single point) and the breakthrough of an algorithm model (physical field decoupling and waveform separation), the detection accuracy is improved; the problems that a traditional non-invasive blood pressure monitoring technology is low in precision, poor in interference resistance and lack of deep pathological information are fundamentally solved.

The utility model discloses a miniaturized high-reliability equalizer, which is based on a GaAs IPD process and comprises an equivalent capacitor C1, one end of the equivalent capacitor C1 is used as an input end of the equalizer, and the other end of the equivalent capacitor C1 is used as an output end of the equalizer; one end of the equivalent capacitor C1 is also connected with one end of the equivalent resistor R1, the other end of the equivalent capacitor C1 is also connected with one end of the equivalent resistor R2, the other end of the equivalent resistor R1 is respectively connected with the other end of the equivalent resistor R2 and the grounding equivalent resistor R3, the resistors, the capacitors and the inductors are improved to form an equalization network, and the overall performance of the equalizer is improved.

The invention provides a WiFi network digital down-conversion system which comprises a multi-phase mixer and a resampling filter. The multi-phase mixer is used for converting a high-speed digital band-pass signal into a low-speed mode so as to realize digital down-conversion (DDC) on an FPGA (Field Programmable Gate Array) platform; and the resampling filter is used for reducing the sampling rate and removing unwanted frequency spectrum components to generate a complex baseband frequency spectrum. The multi-phase mixer PM of the present invention employs a parallel coordinate rotation digital computer (CORDIC) processor and a low pass filter array to reduce high speed data rates while minimizing resource utilization. The resampling filter comprises a cascade integral combination (CIC) filter and a multi-channel pulse finite impulse response (FIR) filter, optimal hardware cost is achieved, a floating point data type is converted into a fixed point data type, and resources are remarkably saved.

The application discloses an ultra-wideband odd harmonic frequency mixer for frequency spreading, and belongs to the technical field of planar harmonic frequency mixing, and comprises a first microstrip line, a Marchand balun, a first Schottky diode, a second Schottky diode, a matching circuit and a second microstrip line; the first microstrip line is located at a radio frequency input end and is connected with a non-balanced end of the Marchand balun, two balanced ends A and B of the Marchand balun are respectively connected with an anode of the first Schottky diode and a cathode of the second Schottky diode, the cathode of the first Schottky diode and the anode of the second Schottky diode are connected in sequence and are connected with the matching circuit and the second microstrip line in sequence, and the second microstrip line is connected with a local oscillator / intermediate frequency port. The harmonic frequency mixer can be directly used for frequency expansion of an existing mainstream frequency spectrometer, and the expansion range can cover the bandwidth of two to three standard waveguide frequency bands.

The disclosure relates to a Gilbert mixer. Example embodiments include a Gilbert mixer that includes first and second multi-finger field effect transistor, FET, devices, each including gate fingers arranged between alternating source terminals and drain terminals; first and second pairs of voltage rails arranged across the first and second FET devices respectively, each of the first and second pairs including an upper rail and a lower rail; a first interconnect connecting the upper rail of the first pair and the lower rail of the second pair to a first input terminal; and a second interconnect connecting the lower rail of the first pair and the upper rail of the second pair to a second input terminal. Gate fingers of the first FET device are connected to the first pair of voltage rails and gate fingers of the second FET device are connected to the second pair of voltage rails.

In some embodiments, a semiconductor chip device can be manufactured by a method that includes forming a plurality of layers including a redistribution layer, such that the redistribution layer has a signal path that provides a selected electrical property with a first end electrically connected to a first node and a second end electrically connected to a second node. The method can further include coupling a semiconductor substrate with a circuit to the plurality of layers, such that the first node is electrically connected to the circuit and the second node is connectable to a location external to the semiconductor chip device.

Frequency shift of a clock signal The present description relates to an electronic device (200) configured to apply a frequency shift function to a first signal (Clk_F) having a first frequency (F) comprising: - a delay element (206) adapted to provide a second signal (Clk_F_D) corresponding to the first signal delayed by a duration equal to a first period of said first signal (Clk_F) divided by four; - a branch successively comprising a first circuit (201) adapted to divide the frequency of a signal by a number, a second integrator circuit (203), said branch being adapted to provide a third signal (Q_comp) and a fourth signal (I_comp); and a third single-sideband mixer circuit (208). Figure for abstract: Fig. 2

This invention relates to the field of communication technology and discloses a circuit and electronic device for driving a passive mixer for up-conversion. The common-mode voltage of the differential signal is adjusted through a common-mode feedback adjustment network, and the adjusted voltage flows to a common-mode voltage control circuit. A drive control circuit outputs a drive control signal based on the differential signal to power the passive mixer. The common-mode voltage control circuit outputs a voltage control signal based on the adjusted voltage and a reference voltage, ensuring the common-mode voltage is regulated by the common-mode feedback adjustment network. Therefore, implementing this invention enables precise driving of the passive mixer through the processing of the differential signal by the drive control circuit. This is beneficial for improving the mixing gain of the passive mixer through drive control based on the drive control circuit, and it can improve the stability of the differential signal by setting up the common-mode feedback adjustment network and the common-mode voltage control circuit, thereby reducing the impact on the noise, bandwidth, and linearity of the mixing system.

A signal generation circuit, a radar apparatus, and a signal control method are provided. The signal generation circuit includes a digital-to-analog converter (DAC) and a mixer. The DAC is configured to convert an input digital signal into two signals in a first mode. A coding content of the input digital signal includes multiple bits. The mixer is coupled to the DAC to respectively input the two signals converted from the input digital signal to two input ports of the mixer in the first mode, to generate an output signal. An output power of the output signal corresponding to the input digital signal having a first coding content is different from an output power of the output signal corresponding to the input digital signal having a second coding content. An intensity of the output signal is related to a voltage difference between the two signals converted from the input digital signal.

The application provides a mixing circuit, a transmitter and a communication device. The mixing circuit comprises an I-channel digital-to-analog converter, a Q-channel digital-to-analog converter, a low-pass filter and a passive quadrature mixer; the low-pass filter comprises an active device, so that the output admittance of the mixing circuit has a frequency-dependent conductance. The consistency of the upper sideband and lower sideband gains of the mixing circuit is improved.

To reduce the power consumption of a frequency converter that performs frequency conversion to upconvert a transmission signal and frequency conversion to downconvert a reception signal.SOLUTION: A frequency converter includes a transistor constituting a double balanced mixer, a load circuit provided on the drain side of the transistor, a first terminal connected to the load circuit, an impedance circuit provided on the source side of the transistor, a second terminal connected to the source of the transistor, a driver circuit that provides a local oscillator signal to the gate of the transistor, and a current control circuit. The current control circuit controls the current flowing from the load circuit to the impedance circuit via the transistor, or the current flowing from the impedance circuit to the load circuit via the transistor.SELECTED DRAWING: Figure 3

Methods and apparatus for calibration of a second-order input intercept point (IIP2) of a mixer, such as a mixer in a wireless receive chain. One example circuit for mixer IIP2 calibration generally includes a first receive chain comprising a first mixer and a single tone generator having an output coupled to an input of the first mixer and configured to generate a calibration signal having a single baseband tone. One example method of mixer IIP2 calibration generally includes generating a calibration signal comprising a single baseband tone, applying the calibration signal to an input of a mixer, such that the mixer generates a differential tone at an output of the mixer, and adjusting the mixer to minimize a power of the differential tone at the output of the mixer.

A device for generating a qubit control signal includes: a first signal envelope generator circuit including a first multiple of signal sources, in which an output of each signal source of the first multiple of signal sources is combined to provide a first cumulative output; and a first mixer circuit coupled to the first signal envelope generator circuit, in which the first cumulative output is coupled to a first input of the first mixer circuit, and an output of the first mixer circuit includes a first qubit control signal.

This invention relates to a low-noise, high-gain mixer. It employs a set of current-multiplexed transconductance amplifier circuits and a set of cross-coupled load circuits. Signal amplification is achieved through symmetrical P-type and N-type transconductors, resulting in a larger equivalent transconductance without increasing the path current. Simultaneously, a negative feedback resistor is connected between the input and output of the transconductor, eliminating the need for additional bias circuitry. An inductor is added between the source and ground of the transconductor to form a source negative feedback structure, increasing circuit stability without increasing power consumption or noise. Furthermore, the cross-coupled load circuit generates a larger equivalent load, achieving greater gain and improving circuit noise without increasing power consumption. This mixer exhibits high gain, low noise, and low power consumption.

The application discloses a current multiplexing phase-shifting mixer with high harmonic suppression ratio IN The I and Q two groups of differential signals generated by the quadrature generating unit are input into the I-path high harmonic suppression ratio phase-shifting mixing unit and the Q-path high harmonic suppression ratio phase-shifting mixing unit respectively, mixed with the differential local oscillator signal in the local oscillator signal and the control signal of the time sequence control unit, and phase-shifting is realized to generate the I and Q two paths of differential intermediate frequency signals; the positive terminal in the I-path differential intermediate frequency signal and the positive terminal in the Q-path differential intermediate frequency signal are input into the same load to generate an intermediate frequency positive output signal; the negative terminal in the I-path differential intermediate frequency signal and the negative terminal in the Q-path differential intermediate frequency signal are input into the same load to generate an intermediate frequency negative output signal; and the intermediate frequency positive output signal and the intermediate frequency negative output signal jointly constitute an intermediate frequency differential output signal. The application has the advantages of simple and compact structure, improved phase-shifting precision of the system, realized mixing, and reduced power consumption of the system.

The invention discloses a dual-mode millimeter-wave radar channel amplitude-phase distortion compensation method and device and a storage medium, and the method comprises the steps: obtaining a transmitting-receiving control parameter, and carrying out the analysis of the transmitting-receiving control parameter, and obtaining a transmitting waveform parameter and a local oscillator waveform parameter; starting from the low-frequency end of the working bandwidth of the system, adjusting a transmitting waveform parameter and a local oscillator waveform parameter, and generating paired single-tone correction signals as a transmitting pre-driving signal and a local oscillator pre-driving signal respectively; generating an analog intermediate frequency signal according to the transmitting pre-driving signal and the local oscillator pre-driving signal, and extracting a distortion amplitude phase value corresponding to the current frequency point from the analog intermediate frequency signal; controlling the frequency of the paired single-tone correction signals to be gradually increased according to a preset step length, and obtaining distortion amplitude and phase values of a plurality of frequency points; performing interpolation fitting on the distortion amplitude-phase value, and calculating an equalizer coefficient; and step frequency is adjusted and calculation is repeated until all equalizer coefficients are obtained for performing dual-mode millimeter wave radar channel amplitude phase distortion compensation.

The application discloses an IQ double-balanced FET resistive mixer, an oscillator signal is input from an oscillator quadrature coupler, passes through an oscillator first power amplifier and an oscillator second power amplifier, and then passes through two parallel oscillator first and second baluns to convert the oscillator signal into four oscillator output signals which are connected with four oscillator impedance matching networks respectively and used for two double-balanced FET resistive mixers; a radio frequency signal is input from a radio frequency balun and connected with two radio frequency T junction power dividers respectively to convert the radio frequency signal into four balanced output ports which are used for the two double-balanced FET resistive mixers; four intermediate frequency signals with a phase difference of 90 degrees are led out from the two double-balanced FET resistive mixers, the conversion loss and the image rejection system are improved, the area of the mirror frequency rejection mixer chip part is reduced, and the cost is lowered.

In one embodiment, an apparatus includes: a complementary metal oxide semiconductor (CMOS) up-conversion passive mixer to receive and up-convert a baseband signal to a radio frequency (RF) signal; and Class-AB amplifier circuitry coupled to the CMOS up-conversion passive mixer to receive and amplify the RF signal.

An apparatus for oscillator feedthrough calibration is disclosed, such as a component arrangement that can be calibrated to account for signal leakage from an oscillator coupled to a mixer circuit. In an example aspect, the apparatus includes a mixer circuit having a first stage, a second stage, and a tuning circuit. The first stage includes at least one transistor coupled between the mixer input and the mixer output. The second stage includes one or more transistors coupled between the at least one transistor of the first stage and the mixer output. The one or more transistors are also coupled between a local oscillator signal input and the mixer output. The tuning circuit includes at least one current source coupled to the at least one transistor of the first stage.

The invention relates to a miniaturized multifunctional frequency conversion device, relates to the technical field of microwave integrated circuits, and solves the problems of high design complexity of radio frequency transceiving hardware and the like. According to the device, the input end of a radio frequency input channel receives a radio frequency input signal, the output end of the radio frequency input channel is connected with the up-conversion regulation and control input end of a bidirectional microwave link, the up-conversion regulation and control output end of the bidirectional microwave link is connected with the input end of an intermediate frequency output channel, and the output end of the intermediate frequency output channel outputs an intermediate frequency output signal; the input end of the intermediate frequency input channel receives an intermediate frequency input signal, the output end of the intermediate frequency input channel is connected with the down-conversion regulation and control input end of the bidirectional microwave link, the down-conversion regulation and control output end of the bidirectional microwave link is connected with the input end of the radio frequency output channel, and the output end of the radio frequency output channel transmits a radio frequency output signal; and a bidirectional microwave link which enables the up-conversion regulation and control link and the down-conversion regulation and control link respectively when the device is used for receiving the radio frequency input signal and transmitting the radio frequency output signal respectively.