29 results about "Frequency synthesizer" patented technology

A frequency synthesizer includes a voltage controlled oscillator, an analog-to-digital converter, a first processing unit and a second processing unit, an adder, a digital-to-analog converter, a monitoring unit, and a switching unit. The first processing unit and a second processing unit output a first digital signal and a second digital signal for frequency adjustment corresponding to a phase difference, respectively. The adder outputs an addition signal obtained by adding the output from the first processing unit to the output from the second processing unit to a downstream stage. The switching unit switches a first state in which only the first digital signal among the first digital signal and the second digital signal is supplied to the adder to a second state in which the second digital signal and the first digital signal as a fixed value are each supplied to the adder, based on a parameter.

This invention discloses a phase-amplitude conversion method and apparatus for a direct digital frequency synthesizer. The method includes the following steps: receiving an input phase word; performing trigone normalization on a subdivided phase field based on a trigone control field in the input phase word; using the first field of the normalized subdivided phase field as an index to look up a table, retrieving the initial sine and initial cosine values ​​corresponding to the index from a preset lookup table to obtain a coarse rotation result; generating a rotation code based on the second field of the normalized subdivided phase field; performing rotation correction on the coarse rotation result based on the rotation code to obtain a fine rotation result; and restoring the trigone control field to the final fine rotation result to obtain the final sine and cosine amplitude values. This invention can meet the high-precision requirements of phase-amplitude conversion while reducing storage requirements.

This application relates to the field of satellite positioning technology, and provides a satellite signal receiving circuit, a satellite signal processing circuit, and a dual-frequency receiver. The satellite signal receiving circuit includes: a first RF input port connected to a first terminal of a first mixer via a first low-noise amplifier; a second terminal of the first mixer connected to a first RF signal output terminal via a first low-pass filter; a second RF input port connected to a first terminal of a second mixer via a second low-noise amplifier; a second terminal of the second mixer connected to a second RF signal output terminal via a second low-pass filter; and a third terminal of the first mixer connected to a third terminal of the second mixer via a frequency synthesizer. This improves the flexibility of switching RF input ports in the satellite signal processing circuit of the dual-frequency receiver.

This application provides a timing control device, system, and method for frequency-scanning radar based on frequency synthesizer and digital logic modules. The frequency synthesizer module serves as the synchronization source and timing reference source for the operating modes of the frequency-scanning radar system. In terms of system hardware architecture, it achieves coherent synchronization between the RF sub-module and the digital logic module. At the RF end, the SYNC signal is used to broaden the pulses of each sub-module, thereby forming the gate signals for each module's corresponding operating mode, which are distributed only by the digital logic module. At the digital end, edge and pulse width detection of the SYNC and MODE signals triggers the sampling and digital signal processing timing. The entire system uses the signal generated by the frequency synthesizer module as the reference, achieving high precision and low phase noise while reducing the external RF cables of the digital logic module. It also achieves strong coupling between the RF and digital ends, which is beneficial for FPGA on-chip resource optimization and timing convergence, reducing design verification costs and subsequent expansion costs.

The embodiment of the application discloses a kind of dual-frequency receiver radio frequency front-end circuit, including first radio frequency receiving channel, second radio frequency receiving channel, frequency synthesizer, the first radio frequency receiving channel and second radio frequency receiving channel are all by sequentially connected low noise amplifier, frequency mixer unit, complex band-pass filter, adjustable gain amplifier, analog-digital converter composition, the frequency mixer unit includes first frequency mixer, second frequency mixer, third frequency mixer, fourth frequency mixer.This application realizes dual-frequency signal reception with only one frequency synthesizer;While LNA area and power consumption can be very small under current technical conditions, so the circuit cost of two LNAs does not increase much;The application does not use off-chip intermediate frequency filter, and realizes image rejection in the chip;The application does not use complex signal synthesis filter, reduces design cost and circuit complexity;Automatic gain control of each channel of the application can be independently operated.

The system and method of the present disclosure relate to treating disease states, particularly different types of cancer, by the application of low-energy emission therapy. The device and method provide a treatment for the disease state of a patient, particularly a patient of a type of cancer, by applying specific and disease-specific low-energy high-frequency radiation to the patient. The device uses a high-precision frequency synthesizer to generate amplitude-modulated radio frequency radiation at an identified tumor-specific frequency for application to the patient during treatment.

A high frequency data network access system includes an aggregation node and endpoint nodes that employ an approach to achieve frequency stability without the need for a separate auxiliary radio frequency (RF) signal, such as a GPS signal, which would require its own receiver and antenna. The endpoint and / or subscriber nodes derive the timing and frequency stability, and specifically disciplines a local reference oscillator and local reference time base.

Regarding frequency synthesizers, the goal is to reduce manufacturing costs while minimizing the time required to obtain the output at the set frequency. [Solution] The frequency synthesizer of the present invention comprises an ADC that digitizes a frequency signal corresponding to the output of a VCO, a first processing unit and a second processing unit that process the frequency signal and output a first digital signal and a second digital signal, respectively, that eliminate the phase difference between the frequency signal and a reference frequency signal, a DAC shared by the first processing unit and the second processing unit, provided downstream of an adder that adds the outputs from the first processing unit and the second processing unit, a parameter monitoring unit that changes according to the change in the frequency signal corresponding to the control voltage, and a switching unit that switches from a first state in which one of the first digital signal and the second digital signal is supplied to the adder to a second state in which the second digital signal and the first digital signal, set to a fixed value, are supplied to the adder, respectively, based on the parameters.

Methods and apparatus for transmitting wireless signals using multiple transmit chains that share hardware components to reduce transmitter circuit area. One example transmitter circuit for wireless communications generally includes a first transmit chain and a second transmit chain. The first transmit chain and the second transmit chain share a digital-to-analog converter (DAC). For certain aspects, the first transmit chain and the second transmit chain may also share a frequency synthesizer and / or a baseband processor.

This invention discloses a two-stage fractional-number coordinated Asia-Pacific Hertz frequency synthesizer, comprising: a first-stage fractional-number phase-locked loop (PLL) that improves the resolution of the reference signal through low-precision fractional-number division to meet the condition of no blind zone, and uses a digital time converter to eliminate quantization noise caused by fractional-number division to generate a local oscillator signal; and a second-stage fractional-harmonic mixing PLL that improves the resolution of the local oscillator signal through high-precision fractional-number division to achieve arbitrary frequency point generation, and uses multi-path retiming to cancel quantization noise technology to eliminate quantization noise caused by fractional-number division, mixes and filters the high-frequency fundamental signal and the local oscillator signal to generate an intermediate frequency (IF) signal, performs frequency and phase discrimination and weighted summation on the IF signal and the multi-path retiming processed signal respectively to generate a quantization noise-compensated current signal, controls the harmonic extension VCO after low-pass filtering to generate a high-frequency fundamental signal, and generates an Asia-Pacific Hertz band output signal based on the high-frequency fundamental signal.

This invention discloses an electromagnetic defect detection system and method based on W-band imaging characteristics, belonging to the field of electromagnetic defect detection. It includes: an antenna, a transceiver assembly, a frequency conversion assembly, and a signal processing assembly. The antenna comprises a transmitting antenna and a receiving antenna. The transmitting antenna receives radio frequency signals from the transmitting component of the transceiver assembly and radiates them outwards. The receiving antenna receives electromagnetic wave signals from the target under test and feeds them into the receiving component. The transceiver assembly includes a transmitting component and a receiving component. The transmitting component amplifies the power of the radio frequency signals from the frequency conversion assembly. The receiving component performs gain control and filtering on the radio frequency signals from the receiving antenna. The frequency conversion assembly includes an up-conversion component, a down-conversion component, and a frequency synthesizer component. The signal processing assembly receives parameter commands from a software terminal and sends the commands to the transceiver assembly and the frequency conversion assembly. This solution can accurately determine the location of electromagnetic defects.

The application relates to the technical field of fast near-field imaging, in particular to a quadrilateral MIMO array fast near-field imaging method based on a GPU, which comprises the following steps: a host end issues control instructions and parameters to a high-speed signal processing board carrying an FPGA, an FPGA drives a frequency synthesizer module to generate a local oscillation signal and distributes the local oscillation signal to a quadrilateral MIMO array; the FPGA controls T / R radio frequency front-end devices, sequentially completes scanning operation of multichannel transmission and reception in a time division multiplexing mode, an ADC samples and converts collected echo signals into digital signals, and then the digital signals are transmitted to a GPU; a parallel imaging architecture is constructed in the GPU, and the whole imaging task is decomposed into several independent sub-imaging tasks; after the current sub-imaging task is completed, the current sub-image is superimposed with the last sub-image, until all the sub-imaging tasks are completed, three-dimensional imaging results of the whole imaging area are obtained, and the three-dimensional imaging results are returned to the host end for display.

This invention provides a comprehensive application verification system, method, and storage medium for digital frequency synthesizers (DDS), relating to the fields of electronic test and measurement and integrated circuit verification technology. The system includes: a verification motherboard comprising a programmable clock synthesis module, a communication and control interface, and a standardized interface; a verification daughterboard connected to the verification motherboard via the standardized interface; the programmable clock synthesis module providing a configurable multi-frequency synchronous reference clock for the DDS on the verification daughterboard; the verification motherboard adaptively matching the voltage levels of the verification daughterboard via the communication and control interface; and automated verification software in a host computer controlling the system to automatically trigger the verification motherboard to control the DDS to operate under a stable preset environmental profile, while simultaneously controlling external test instruments to perform measurements, thereby obtaining comprehensive application verification results. This invention can reuse core hardware resources, meet the control interface requirements of DDS, and comprehensively reflect the real-world performance of DDS in practical application environments.

This application provides a harmonic self-aligned voltage-controlled resonator and frequency synthesizer, belonging to the field of resonator technology. In this design, each port of a four-mode transformer is connected to a capacitor switch array to maintain capacitive symmetry between ports. A set of negative transconductance transistors is connected between the first and second ports of the four-mode transformer, and another set of negative transconductance transistors is connected between the third and fourth ports. The negative transconductance circuit provides negative resistance to compensate for the losses of the four-mode transformer. Each capacitor in the impedance balancing unit is connected to the two ends of the first and fourth ports to balance the impedance of each port of the four-mode transformer. A mode switching unit is connected between the second and third ports to control the switching of the local oscillator mode of the four-mode transformer. This application simplifies the phase-locked loop design of a quantum bit measurement and control system, improves phase noise performance in cryogenic environments, and provides a reliable local oscillator signal source.

The utility model provides a kind of programming frequency divider with dynamically adjustable frequency division ratio, comprising: first frequency division circuit, second frequency division circuit, third frequency division circuit, fourth frequency division circuit, buffer circuit, the first frequency division circuit, the second frequency division circuit, the third frequency division circuit and the fourth frequency division circuit, all be connected in the input end of the buffer circuit.The utility model has real-time programmable ability, can simultaneously output a variety of different frequency division ratio, meet the demand of a variety of clock frequency to complex digital system, in frequency synthesizer, clock management unit and communication system has extensive application prospect.

The application provides a voltage-controlled oscillator with temperature compensation and a control method thereof, the voltage-controlled oscillator comprising: a resonance unit for adjusting and controlling an oscillation frequency; a cross negative resistance unit for providing negative resistance for the resonance unit to compensate for energy loss generated by the oscillation frequency; a tail current unit for providing a tail current; a temperature compensation unit for receiving a control signal representing temperature change, generating a compensation current based on the control signal, and injecting the compensation current into the tail current unit to compensate for the tail current, thereby stabilizing the output swing of the voltage-controlled oscillator. The application realizes the starting and tuning of the voltage-controlled oscillator through the synergistic cooperation of the resonance unit, the cross negative resistance unit and the tail current unit. Meanwhile, the temperature compensation unit is introduced to inject a compensation current into the tail current, so as to maintain the relatively stable output swing of the voltage-controlled oscillator when the temperature changes, thereby providing more excellent performance for a frequency synthesizer and other systems.

A system includes a first frequency synthesizer configured to generate a first local oscillator (LO) signal and a second frequency synthesizer configured to generate a second LO signal. The system also includes a first receive circuit configured to receive a first carrier and a second carrier for a first subscriber and mix the first carrier and the second carrier with the first LO signal or the second LO signal. The system also includes a second receive circuit configured to receive a third carrier for a second subscriber and mix the third carrier with the first LO signal or the second LO signal. The system further includes a first multiplexer configured to selectively couple the first LO signal or the second LO signal to the first receive circuit and a second multiplexer configured to selectively couple the first LO signal or the second LO signal to the second receive circuit.

This application discloses a full-range deep-sea dissolved CH4 in-situ sensor, belonging to the field of deep-sea dissolved gas in-situ detection technology. The full-range deep-sea dissolved CH4 in-situ sensor includes a circuit system unit, a trace gas measurement chamber unit, and a water-gas separation unit. The circuit system unit includes a microcontroller, a frequency synthesizer, an adder, a laser and a laser driver circuit, two analog lock-in amplifiers, two preamplifiers, and two analog-to-digital converters. The trace gas measurement chamber unit includes a trace gas measurement chamber, an optical fiber collimator, a tuning fork, a coaxial microresonator, a temperature, humidity, and pressure sensor, a photodetector, two solenoid valves, and a miniature air pump. The water-gas separation unit includes a base, a sintered block, filter paper, and a water-gas separation membrane. This disclosure provides a miniaturized, high-sensitivity, full-range in-situ sensor for deep-sea dissolved CH4 with low gas consumption, featuring high sensitivity, full range, low gas consumption, strong anti-interference ability, fast response, low power consumption, and small size.

A one-way data link analog transmission device includes an intermediate frequency (IF) signal unit, a frequency synthesizer unit, a mixer unit, a radio frequency (RF) transmission unit, a local control unit, and a programmable network interface. Each unit is an independent module equipped with an electromagnetic compatibility (EMC) shielded shell, assembled into an integrated device with an aluminum alloy unibody package. The IF signal unit uses an FPGA+DAC architecture to generate IF modulation signals; the frequency synthesizer unit provides a highly stable local oscillator signal and clock reference; the mixer unit performs signal mixing to generate a pre-modulated signal; the RF transmission unit performs multi-stage processing to achieve RF signal up-conversion and high-precision amplitude control, and adopts adaptive power control. This invention features a pure one-way architecture, weighs less than 3 kg, has a deployment time of less than 5 minutes, can accurately reproduce the one-way command transmission characteristics in aviation equipment, has strong anti-interference capabilities, stable transmission, and is suitable for multiple scenarios such as airborne, field, and laboratory applications. Its cost is only 25% of the market standard target source, and it can be matched with various aviation equipment communication protocols, exhibiting excellent practicality and scalability.

This invention discloses a frequency calibration system and method for a frequency synthesizer, which can reduce frequency calibration time and avoid reducing calibration resolution, thereby ensuring the accuracy of frequency calibration results. The frequency calibration system includes a counting circuit, a sampling circuit, and a current mirror control module. The input of the counting circuit is connected to a crystal oscillator for counting the reference clock generated by the crystal oscillator. The first output of the counting circuit is connected to one end of the sampling circuit, which is a frequency divider sampling circuit used to divide and sample the frequency output by the voltage-controlled oscillator. The other end of the sampling circuit is connected to the second output of the counting circuit. The current mirror control module is used to adjust the control word for controlling the current mirror. The output of the current mirror control module is connected to the current mirror circuit, and the output of the current mirror circuit is connected to the voltage-controlled oscillator. The output of the voltage-controlled oscillator outputs the calibrated frequency. The frequency calibration method applies the above-mentioned frequency calibration system.

This invention discloses an intelligent switching control system and method for primary and backup communication modules in a railway wireless communication system. The system includes a primary communication module, a backup communication module, an antenna interface, an RF interface, a heartbeat / synchronization signal interface, and an STP device. The primary and backup communication modules share a single antenna, and antenna takeover is achieved through RF channel switching. The primary communication module periodically performs self-tests, detecting the frequency synthesizer lock-in status, module temperature, and transmit power, and indicates its operating status via a heartbeat signal. The backup communication module monitors the heartbeat signal in real time. When consecutive interruptions reach a preset number, it determines that the primary communication module has failed and, based on the service status at the time of the failure, performs standby direct switching, retransmission of transmit status data frames, or reconstruction of receive status data to complete the primary / backup switch and maintain service continuity. This invention achieves rapid switching between primary and backup communication modules under single-antenna conditions, reducing switching latency and the risk of data loss.

The application discloses a light and small super-high resolution wide-width spaceborne SAR system, which comprises a signal processor, a frequency synthesizer, a transmitting channel, a multi-channel receiving channel, a multi-channel internal scaler, a power supply and distribution unit, a beam forming network, a phased array feed and a parasol reflector; the light and small parasol reflector antenna combined with the phased array feed is used in a multi-channel multi-beam receiving mode to realize beam scanning receiving in the distance direction; and the whole surveying and mapping band is covered by switching different channels to receive. The system has the advantages of light weight, small size, low power consumption and low heat consumption, the imaging resolution can reach the centimeter level, the action distance is in the kilometer level, and the system has great significance for high-resolution earth observation.

This utility model relates to the field of communication technology, specifically disclosing a frequency synthesizer, including a power divider. The input terminal of the power divider receives a reference signal, and the output terminal of the power divider is connected to the input terminals of an integrated phase-locked loop (PLL) A and an amplification and filtering circuit. The output terminal of the integrated PLL A is connected to the input terminal of a low-pass filter, and the output terminal of the low-pass filter is connected to the input terminal of a mixer. The output terminal of the amplification and filtering circuit is connected to the input terminal of the mixer. The output terminal of the mixer is connected to the input terminal of a filtering circuit, and the output terminal of the filtering circuit is connected to the input terminal of an integrated PLL B. The output terminal of the integrated PLL B is connected to the input terminal of a multi-path output circuit, and the output terminal of the multi-path output circuit outputs a signal. This utility model device has stable performance, is easy to implement, low in cost, small in size, and highly reliable, and can be widely used in measurement systems, communications, and other fields.

The application discloses a frequency-modulated continuous wave radar system based on magnetic suspension phase compensation and a method thereof, which comprises a magnetic suspension radar system and a phase compensation system. The magnetic suspension radar system comprises a stator assembly and a contactless relatively arranged rotor assembly, the stator assembly is provided with an electromagnetic coil array and a Hall displacement sensor array, and the rotor assembly is integrated with an antenna. The phase compensation system comprises a control module and a direct digital frequency synthesizer. The control module drives the electromagnetic coil array by executing a PID control algorithm, so that the rotor assembly is kept in suspension; an embedded displacement detection unit and a compensation calculation engine acquire a rotor displacement change amount in real time and calculate a phase compensation amount; and the direct digital frequency synthesizer generates a phase pre-corrected linear frequency modulation signal according to the compensation amount and outputs the signal to the antenna for emission. The system isolates mechanical vibration from a physical layer, effectively suppresses phase distortion caused by vibration through real-time phase compensation, and improves the measurement precision and stability of the radar in a dynamic environment.

This invention discloses an RF receiver chip, including a low-noise image rejection amplifier (LNA). The signal output terminal of the LNA is connected to an active balun, the signal output terminal of the active balun is connected to a mixer, the signal output terminal of the filter is connected to a variable gain amplifier (VGA), the signal output terminal of the VGA is connected to a bandpass sampling analog-to-digital converter (ADC), and the signal output terminal of the ADC is connected to a frequency synthesizer. By introducing the LNA and the ADC, the chip achieves full real-domain processing of the receiver link. The operating frequency of the frequency synthesizer is the same as the local oscillator frequency, and the chip operates in the real domain. This eliminates the need for an external SAW filter and internal I / Q complex domain signal processing, and also eliminates the need for the frequency synthesizer to provide a quadrature local oscillator signal. This reduces the requirements for the frequency synthesizer's oscillation frequency range and complexity.

FIELD: radio engineering.SUBSTANCE: device for digital linearization of a power amplifier is proposed, comprising a power amplifier, a linearizer, a digital-to-analogue converter connected to the first output of the linearizer, for converting a digital linearized signal for setting the power amplifier into an analogue signal for adjusting the gain of the power amplifier. A digital frequency synthesizer is introduced, the input of which is connected to the second output of the linearizer, and the output is connected to the input of a power amplifier, to the output of which an attenuator, a signal conversion device that converts a high-frequency signal into a low-frequency analogue signal, and an analogue-to-digital converter, the output of which is connected to the input of the linearizer, are connected in series, and the linearizer records the value corresponding to the specified power at the output of the power amplifier, which is then compared with the current values of the power of the power amplifier, supplied to the linearizer from the output of the analogue-to-digital converter.EFFECT: simplification of the digital linearization device of a power amplifier.3 cl, 2 dwg

This utility model relates to the field of satellite communication equipment technology, specifically a microwave transmitting module, including a frequency synthesizer, a microwave switch, a two-stage power amplifier, a final-stage power amplifier, and an isolator connected in sequence. The output of the isolator is connected to a transmitting antenna and a detector to realize signal transmission and monitoring. It also includes a metal body for integrating the frequency synthesizer, microwave switch, and pre-amplifier. The metal body is a cuboid aluminum alloy body with a rectangular cavity on one side. A low-temperature co-fired ceramic substrate is mounted on the bottom surface of the cavity. Several circular unidirectional heat dissipation channels penetrating the other side of the metal body are formed on the bottom surface of the cavity. The unidirectional heat dissipation channels have a unidirectional flow structure, with the airflow direction away from the microwave transmitting module. This utility model's microwave transmitting module improves the radio frequency performance of the microwave transmitting module, while also improving heat dissipation efficiency, avoiding localized overheating, and increasing the service life of the microwave transmitting module.

This invention discloses an ultra-wideband, high-precision instantaneous frequency measurement circuit and method, belonging to the field of frequency measurement technology. It includes a power divider group, multiple frequency measurement channels, an analog switch group, an SP3T switch, a direct digital frequency synthesizer (DDS), and an FPGA. The input RF signal is divided into four channels by the power divider group, corresponding to four frequency measurement channels. Each frequency measurement channel corresponds to a different frequency range, and the channels operate in parallel. Each channel signal is output as an LVTTL level to the FPGA after passing through a detector and comparator. The FPGA determines the frequency range based on the level combination and controls the analog switch and SP3T to select the corresponding channel. The frequency of the signal generated by the DDS is measured by the FPGA, and the input RF signal frequency is calculated inversely based on the division ratio and frequency control word. This invention achieves DC-20GHz ultra-wideband frequency measurement. The measurement speed depends on the DDS frequency switching speed. After the measurement is completed, the power to the divider is turned off to eliminate spurious interference. The circuit structure is simple and low-cost.