946 results about "Phase-locked loop" patented technology

The invention relates to the technical field of communication, and discloses a network communication chip signal interference suppression processing method. The method comprises the following steps: acquiring a local oscillator phase jitter sequence in real time through an on-chip phase noise monitoring unit; estimating Doppler frequency shift and channel coherence time based on the sequence; dynamically adjusting the closed-loop bandwidth of the phase-locked loop; and generating a phase compensation signal, and performing time-varying channel minimum mean square error equalization in combination with a received baseband signal to eliminate inter-symbol interference. The system integrates a phase noise monitoring function module, a channel parameter estimation function module, a phase-locked loop bandwidth regulation function module, a phase compensation generation function module and an interference joint elimination function module. By means of dynamic bandwidth reconstruction and high-precision phase compensation, the bit error rate under high-speed movement is remarkably reduced, the 5G millimeter wave communication standard requirement is met, and the method has the advantages of being achieved on a whole chip, low in delay and high in robustness.

The invention discloses a permanent magnet synchronous motor sensorless control method based on a dynamic position error. A transition stage is provided, per-unit estimation position errors between a first position error signal obtained based on a high-frequency signal injection method and a second position error signal obtained based on a sliding mode observer are compared, an optimal switching speed point is dynamically determined, smooth fusion is carried out on the two position errors by using a nonlinear weighting function, and the optimal switching speed point is obtained. And finally, the estimated position and rotating speed are obtained through a phase-locked loop. And finally, position tracking is carried out by adopting different error signals according to the estimated rotating speed. According to the method, the problem of estimation value pulsation and jump caused by the fact that a traditional method depends on fixed experience switching points is solved, smooth and self-adaptive switching of the two estimation methods in the full-speed domain range is achieved, the control precision and operation stability of the system are remarkably improved, the structure is simple, and engineering implementation is easy.

The invention provides a control method and system of a permanent magnet synchronous motor, computer equipment and a medium, and belongs to the field of motor control, and the method comprises the steps: obtaining stator current and voltage signals of the permanent magnet synchronous motor; constructing and operating a second-order sliding mode observer to output a stator current observation value; based on the current observation error and the change rate thereof, constructing a mixed sliding mode surface containing a linear term and a nonsingular terminal term, and designing a sliding mode control law; the control law is fed back to an observer to correct the observation process, and meanwhile two-phase observation counter electromotive force which is free of buffeting and does not need low-pass filtering is directly exported; closed-loop demodulation is carried out on the back electromotive force through a phase-locked loop, estimated values of the rotor position and the rotating speed are extracted, and finally position-sensorless vector control of the permanent magnet synchronous motor is achieved. According to the method, the buffeting phenomenon of a traditional sliding-mode observer is inhibited, a low-pass filter is avoided, phase lag is eliminated, and the estimation precision and the dynamic response performance of the system are improved.

The invention provides a design method and system of a high-speed RC clock system. The system comprises a high-speed RC oscillator, a reference clock module, a clock calibration module, a trigger module and a state machine module. The method comprises the following steps of: controlling a calibration process through a state machine module, counting a high-frequency clock signal by taking a theoretical count value as a reference after a clock calibration module is triggered, judging whether the frequency has deviation or not and the direction of the deviation according to a counting result, performing stepping adjustment on a calibration value, and performing frequency adjustment on a high-speed RC oscillator. And circularly executing the calibration step until the counting result falls into an allowable error range. A phase-locked loop circuit does not need to be additionally arranged, high and low temperature calibration in the production stage does not need to be introduced, the chip design complexity, the manufacturing cost and the production test cost can be effectively reduced, meanwhile, high precision and stability of clock signals are ensured, and output of a low-cost, high-frequency and high-precision RC clock is achieved.

The utility model provides a phase-locked loop circuit and an image sensor, and the phase-locked loop circuit comprises a phase frequency detector, a charge pump circuit, a switching circuit, an inductance capacitance voltage-controlled oscillator, an automatic frequency control circuit, and a detection control circuit. The automatic frequency control circuit controls the switching circuit to output a voltage reference signal and output a digital code signal, so that the capacitance in the inductance-capacitance voltage-controlled oscillator is changed, the frequency of an output signal of the phase-locked loop circuit is further changed, after calibration is finished, the phase frequency detector and the charge pump circuit output a changed first voltage signal, and the charge pump circuit outputs a second voltage signal. The capacitance of the inductance capacitance voltage-controlled oscillator and the frequency of an output signal of the phase-locked loop circuit are changed, and the detection control circuit outputs a closing signal to close the automatic frequency control circuit, so that additional circuit power consumption is reduced; digital code signals input by the inductance-capacitance voltage-controlled oscillator are not changed, and disturbance influence is eliminated.

According to an embodiment, a phased-locked loop (PLL) circuit, within a gyroscope system, generates demodulation signals. It includes a phase frequency detector receiving gyroscope output, which compares a reference signal with a feedback signal to produce an error signal. A charge pump then converts this error into a first analog control signal. A programmable clamp circuit refines this into a second analog control signal. A voltage-controlled oscillator uses the second signal to produce an output signal at a controlled frequency determined by the clamp circuit. A frequency divider sends a comparison frequency signal back to the detector, completing the loop.

The invention discloses a converter transient power angle stability analysis method and system based on a linear parameter change controller. Establishing a small-signal dynamic model of the power synchronization type grid-following converter, and constructing a mathematical model considering power filtering and current loop dynamics by orienting an output current to a d axis of a dq coordinate system; a linear parameter change controller is designed, control parameters are adjusted in real time through parameter vectors, decoupling control over active power and reactive power is achieved, and it is ensured that the system can stably operate in both the inversion mode and the rectification mode; based on the Lyapunov stability theory, the transient power angle stability of the system under large disturbance is analyzed in combination with a linearization method and a direct method. The method does not need to depend on a phase-locked loop and grid-connected point voltage information, effectively solves the problem of synchronous stability of a traditional grid-following type converter, remarkably improves the adaptability and operation reliability of a system under the condition of a weak power grid, and provides important technical support for safe and stable operation of a new energy power system.

The invention relates to a square wave generation method and system based on a DDS signal transmitter, and belongs to the technical field of digital electronic signal synthesis. The method comprises the following steps: calculating a digital analog signal sampling frequency based on a square wave output frequency set by a user, and obtaining a digital fundamental frequency phase signal according to a phase-locked loop precision range; mapping the digital fundamental frequency phase signal into a sinusoidal amplitude signal according to a digital phase accumulation mechanism to obtain a digital-analog conversion clock, binarizing the sinusoidal amplitude signal, and outputting a square wave output period; dividing a square wave output period into a low level region and a high level region according to the precision range of the phase-locked loop, reading a square wave output frequency set by a user through a random storage address, and outputting a non-offset phase-locked square wave; and constructing an error accumulation self-checking architecture to calculate a frequency control word, and when detecting that the frequency control word has a decimal discarding error, recalculating the frequency control word.

The invention discloses a multi-converter parameter collaborative optimization method for improving the small interference stability of an active power distribution network, and belongs to the technical field of power systems, and the method comprises the steps: building a differential algebraic equation model, and carrying out the linearization of a steady-state operation point, and obtaining a state space model; and a control parameter optimization problem taking the minimization of the spectrum intercept construction as a target is defined, and control parameters are a GFL converter phase-locked loop parameter and a GFM converter virtual damping parameter. First-order sensitivity and second-order sensitivity of eigenvalues to control parameters are calculated based on a matrix perturbation theory and are converted into local quadratic constraint sub-problems. And performing convexity solution by adopting a positive semidefinite relaxation method, adjusting the step length in combination with a line search mechanism, iteratively updating control parameters, and outputting an optimization result after a convergence condition is met. According to the method, the spectral intercept is reduced through multi-converter parameter collaborative optimization, and the weak stability characteristic is improved; the convergence and solvability are improved by utilizing matrix perturbation and positive semidefinite relaxation; and the stability is enhanced and optimized by adopting line search step length adjustment.

The invention relates to a dual-frequency laser interference measurement system phase resolving method based on a digital phase-locked loop. According to the method, a reference signal is subjected to photoelectric conversion to generate a sampling clock, and a measurement signal is sampled according to the sampling clock. Phase data can be obtained by analyzing the sampled measurement signal. The technology has the advantages that the influence of laser frequency difference fluctuation is eliminated, high-precision real-time calculation of the phase of the double-frequency laser interferometer is realized, the calculation process is remarkably simplified, and resource occupation is reduced.

The invention discloses a network construction type converter pre-synchronization control method based on Taylor compensation, and the method comprises the steps: collecting the three-phase voltage of an output end of a virtual synchronous generator (VSG) and the three-phase voltage of a power grid side, carrying out the Clark transformation, and extracting a positive sequence voltage component; on the basis of the positive sequence voltage component, calculating a phase difference sine value of the VSG output voltage and the power grid voltage; based on the phase difference sine value, compensating the phase difference sine value through Taylor expansion to obtain a compensated real-time phase difference; and fusing the compensated real-time phase difference into a VSG phase-locked loop-free pre-synchronization control strategy, and driving a PI regulator to dynamically correct the output frequency and phase of the VSG. A phase-locked loop is completely abandoned, and the frequency oscillation risk is eliminated; expanding a phase difference calculation range through third-order Taylor compensation; voltage vector analysis and a dynamic compensation function are fused, phase synchronization is achieved, and grid-connected impact current is reduced.

The invention belongs to the technical field of power grids, and particularly relates to a hydrogen fuel cell grid-connected inverter fault test and ride-through method. Comprising the following steps: S1, simulating three-phase symmetrical voltage drop, inter-phase voltage drop and single-phase voltage drop of a power grid through a low-voltage fault generation device; s2, collecting the voltage of a power grid through a high-precision voltage sensor, and when the voltage of the power grid drops, judging whether the system needs to carry out low-voltage ride through at the moment according to a distributed energy low-voltage ride through curve; and S3, when the system needs to carry out low-voltage ride-through, a dual-second-order generalized integrator pre-filtering phase-locked loop (DSOGI-PLL) is combined with grid-connected point voltage full-feedback compensation, negative-sequence components generated by symmetric and asymmetric drop of the power grid voltage are eliminated, and current impact suppression and negative-sequence current elimination are realized. The problem of power grid synchronization under the condition of power grid voltage drop is finally solved.

An ADPLL circuit includes a phase comparator for comparing a phase of a reference clock (REFCLK) input signal with a phase of a digitally controlled oscillator clock (DCO_CLK) signal output from a DCO. The phase comparator includes a first ADC connected to receive a REF_P signal corresponding to the phase of the REFCLK signal via a first switch and output an ADC0 signal and a second ADC connected to receive the signal REF_P via a second switch and output an ADC1 signal. The ADPLL circuit further includes a digital filter for receiving the ADC0 and ADC1 signals and determining therefrom a difference between the phases of the DCO_CLK signal and the REFCLK signal. The digital filter provides a DCO control signal to the DCO to control a frequency of operation of the DCO based on the phase difference.

Wireless circuitry may include phase-locked loop (PLL) circuitry. The PLL circuitry can include a time-to-digital converter (TDC) having a first input configured to receive a reference clock signal, a second input configured to receive a feedback clock signal, and an output at which a measured phase error is produced, a frequency divider configured to output the feedback clock signal, and a phase alignment circuit configured to output a corrected phase error that is used in adjusting the frequency divider. The phase alignment circuit can include a scaling component configured to scale the measured phase error by a phase alignment coefficient to produce a corresponding scaled phase error and a multiplexing component configured to selectively output a corrected phase error that is used in controlling a sigma delta modulator coupled to the divider.

The invention discloses a totem-pole PFC circuit control method and device based on an improved SOGI-PLL, and belongs to the technical field of totem-pole PFC circuits, and the method comprises the steps: collecting the input voltage, input current and bus voltage of a totem-pole PFC circuit; synchronous phase information of the power grid voltage is obtained through an improved second-order generalized integral phase-locked loop; generating a current amplitude reference signal, and combining the current amplitude reference signal with the synchronous phase information to synthesize a current reference signal; generating a pulse width modulation signal for controlling a high-frequency switching tube; and a switching signal of the power frequency switching tube is generated based on the synchronous phase information, and the power frequency switching tube and the high-frequency switching tube are driven in combination with the pulse width modulation signal, so that the action time sequence is synchronous with the phase of the power grid voltage, and therefore, waveform tracking of the input current is realized, and current distortion at the zero crossing point is suppressed. Precise phase synchronization is realized based on the improved SOGI-PLL, totem pole PFC zero-crossing current distortion is effectively suppressed, and the power factor and waveform quality are improved.

The invention relates to the technical field of safe operation of power systems and motors, and particularly discloses a method for calculating a safe operation boundary of a high-inertia energy storage type phase modifier under a fault, and the method comprises the steps: building an electromagnetic field calculation model of a two-dimensional linear part and a three-dimensional end part region according to an electromagnetic design scheme of the high-inertia energy storage type phase modifier; establishing a frequency and voltage support excitation control system of the high-inertia energy storage type phase modifier, carrying out bidirectional dynamic coupling on the excitation control system and the electromagnetic field calculation model, and obtaining the frequency and voltage of a power grid through a phase-locked loop; determining the loss value of each structural member in the fault process through an electromagnetic field calculation model; according to the ventilation system structure of the high-inertia energy storage type phase modifier, a fluid and thermal coupling calculation model is established, and the loss value of each structural member is used as a heat source to be introduced into the fluid and thermal coupling calculation model; and determining the safe operation limit time of the high-inertia energy storage type phase modifier under the system frequency or voltage fault according to the maximum temperature rise allowed by each structural member.

The invention discloses a voltage-controlled oscillator and a sub-sampling phase-locked loop, and relates to the technical field of phase-locked loops. The voltage-controlled oscillator comprises two negative resistance transistors and a three-layer coil structure; the three layers of coil structures are respectively a drain coil, a grid coil and a source coil from outside to inside; the gate coil and the drain coil are both of an octagonal structure, and the source coil is of a splayed structure; the drain coil, the source coil and the grid coil are all provided with center taps, the center tap of the source coil is connected with a power voltage module, the center tap of the drain coil is grounded, and the connection point of the center tap of the source coil and the power voltage module and the connection point of the center tap of the drain coil and the ground are located on the same side of the drain coil. And the two negative resistance transistors are positioned on the other side of the drain coil. According to the invention, automatic alignment of second harmonics in a wide frequency range is realized. And meanwhile, an extra chip area is not increased.

The invention provides a multi-channel microwave signal generation method and system with a fixed initial phase, and the method comprises the steps: responding to a triggering signal received by a high-speed clock synchronization module after a pre-configured synchronous clock signal is inputted to the high-speed clock synchronization module; the high-speed clock synchronization module generates a sampling clock signal and a logic clock signal based on the synchronous clock signal, responds to the logic clock signal and inputs the logic clock signal to the high-speed controller, the high-speed controller generates a signal description word while triggering signal input, responds to the sampling clock signal and inputs the sampling clock signal to the direct digital frequency synthesis module; and the direct digital frequency synthesis module generates an analog fundamental frequency signal required by the multi-channel microwave signal source based on the signal description word, responds to the analog fundamental frequency signal and inputs the analog fundamental frequency signal to the phase-locked loop device, and the phase-locked loop device outputs a final target microwave signal.

Embodiments described herein are directed to a position sensor that includes a first receiver coil electrically coupled to a first multiplier to generate a first output, a second receiver coil electrically coupled to a second multiplier to generate a second output, a transmitter coil electrically coupled to an oscillator, the oscillator electrically coupled to a third multiplier to generate a third output, a phase-locked loop electrically coupled to the oscillator and the transmitter coil, a summing circuit configured to receive the first output and the second output and configured to generate a signal, a phase detector configured to receive the signal and the third output, the phase detector outputting a sense signal that is indicative of an angle of the motor position sensor, and a pair of op amps electrically coupled to the phase detector. The op amps configured to output an analog differential signal and a differential phase signal.

The invention discloses a task synchronization and scheduling method for compensating CAN bus clock drift, which relates to the technical field of industrial automation control, and comprises the following four steps: initializing a system, loading a real-time protocol stack, completing hardware self-inspection and clock calibration, and sending a ready signal after confirming that a link is smooth; performing synchronization parameter configuration and task planning, defining clock synchronization reference parameters, dividing four types of tasks and setting priorities; performing dynamic calibration and data buffering on master and slave clocks, broadcasting a synchronous message with a timestamp by a master station, correcting a local timer by a slave station through a soft phase-locked loop, and constructing an annular buffer area to realize time domain decoupling; task cooperative scheduling and abnormal fault tolerance are carried out, a control task is triggered based on a calibration clock, edge calculation is carried out to reconstruct a motion state and feed-forward compensation is carried out, a multi-dimensional state is monitored in real time, and a fault tolerance mechanism is triggered. According to the method, clock synchronization precision and control stability are greatly improved, bus bandwidth limitation is broken through, high dynamic tracking precision is achieved, and long-term stable operation of the system is guaranteed.

The invention relates to the technical field of new energy power generation, in particular to a doubly-fed fan VSC-HVDC (Voltage Source Converter-High Voltage Direct Current) subsynchronous oscillation robust integral predefined time sliding mode control method, which comprises the following steps: S1, establishing a grid-side converter model in a doubly-fed fan; s2, establishing a phase-locked loop model in the doubly-fed fan; s3, constructing an integral sliding mode surface, and obtaining dynamic characteristics and equivalent control input of a sliding mode system; s4, designing approaching control input, and obtaining an integral predetermined time sliding mode control law; and S5, implementing an integral predetermined time sliding mode control law. Compared with a traditional PI control strategy, the robust integral predefined time sliding mode control method for the subsynchronous oscillation of the double-fed fan VSC-HVDC, provided by the invention, has the advantages that the oscillation can be converged in a shorter time, and the robustness is higher.

The invention discloses a large-signal synchronous stability control method and device for a flexible direct-current power transmission system, and the method comprises the steps: building a current reference value adaptive adjustment strategy based on synchronous stability enhancement for the adaptive adjustment of a current reference value; aiming at phase-locked loop integral controller input adaptive switching, constructing a phase-locked loop integral controller input adaptive switching strategy based on large disturbance stage detection; and according to the current reference value adaptive adjustment strategy based on synchronous stability enhancement and the phase-locked loop integral controller input adaptive switching strategy based on large disturbance stage detection, large signal synchronous stability control is carried out on the flexible DC power transmission system. The technical problem that an existing flexible direct current power transmission system control method is poor in stability under a large disturbance transient event of a high-proportion new energy weak power grid is solved.

Presented herein are systems, devices, and methods for inverter control. The device may include a computer-readable medium having instructions stored thereon. The device may include at least one processor configured to execute the instructions. The at least one processor may monitor for an initiation of a connection between an inverter and an electrical bus to convey electrical power. The at least one processor may engage, responsive to detection of the initiation, phase locked loop (PLL) control on the electrical power conveyed via the inverter to synchronize the inverter with the electrical bus. The at least one processor may determine that a synchronization between the inverter and the electrical bus is complete. The at least one processor may disengage, responsive to the determination that the synchronization is complete, the PLL control on the electrical power conveyed between the inverter and the electrical bus.

The invention relates to the technical field of servo system control, in particular to a noise measurement suppression method and device based on axial angle tracking angular position estimation. The method comprises the following steps: determining a first measurement angle after sine transformation and a second measurement angle after cosine transformation based on the first measurement angle and the second measurement angle; simplifying the first measurement angle after sine transformation and the second measurement angle after cosine transformation to obtain a simplified first measurement angle and a simplified second measurement angle; based on the simplified first measurement angle and the simplified second measurement angle, determining a representation relation between a phase discriminator tracking error of the servo system and a phase-locked loop output angle; determining an input of the servo system based on the representation relationship; determining an estimated angle value based on the input of the servo system and a preset closed-loop transfer function; and controlling the servo system based on the estimated angle value. Therefore, the control precision of the servo system can be improved.

A phase-locked loop. The phase-locked loop including a time-to-digital converter for acquiring a phase of a reference signal. A feedback signal formed from an output signal of the phase-locked loop is fed to the time-to-digital converter. The phase-locked loop including a digital-to-time converter which is configured to apply dithering to the feedback signal or to the reference signal. The digital-to-time converter is part of a ring oscillator with a predefined oscillation frequency. The phase-locked loop includes an evaluation unit for acquiring an actual frequency of the ring oscillator.

The application discloses a phase-sensitive pre-amplification method based on an electro-absorption modulated laser, and is applied to a star-ground laser communication system receiving end. A distributed feedback laser in the electro-absorption modulated laser amplifies weak pump light after long distance transmission, and generates idler light under the nonlinear effect of a laser cavity; an electro-absorption modulator in the electro-absorption modulated laser detects phase error information between signal light, pump light and idler light, and constructs an optical injection phase-locked loop through a feedback loop, so that stable control of the three-wave phase relationship is realized. Under the phase stability condition, the output light of the electro-absorption modulated laser is fed into a later-stage nonlinear medium to complete phase-sensitive pre-amplification. The phase-sensitive pre-amplification method based on the electro-absorption modulated laser has the advantages of simple structure and easy integration, can realize pump light amplification, idler light generation and phase error suppression under the condition of weak pump light, and effectively improves the receiving sensitivity performance of the star-ground laser communication system.

The embodiment of the invention provides a frequency multiplication amplification circuit applied to a phase-locked loop and communication equipment, and the frequency multiplication amplification circuit applied to the phase-locked loop comprises a local oscillator frequency division module which is electrically connected with the output end of the phase-locked loop and is used for receiving a radio frequency signal output by the phase-locked loop and outputting a local oscillator signal according to the radio frequency signal; the frequency mixing module is electrically connected with the output end of the phase-locked loop and the output end of the local oscillator frequency division module, and is used for synthesizing a frequency mixing signal according to the radio frequency signal and the local oscillator signal; wherein the frequency of the frequency mixing signal is greater than that of the radio frequency signal. According to the technical scheme, the frequency multiplication amplification circuit is arranged outside the phase-locked loop, the frequency of the output signal of the phase-locked loop can be amplified, the output frequency of the phase-locked loop can be expanded without changing a core circuit in the phase-locked loop, and the frequency multiplication amplification circuit applied to the phase-locked loop is simple in structure.

This application discloses an automatic calibration circuit and method for mismatch compensation current of a phase-locked loop (PLL) charge pump, relating to the field of integrated circuit technology. The calibration circuit includes: a frequency and phase detector, a charge pump, an XOR module, a filter capacitor, a digital-to-analog converter (DAC) module, and a digital logic state machine. The first output terminal of the frequency and phase detector is connected to the first input terminal of the charge pump and the first input terminal of the XOR module, respectively. The second output terminal of the frequency and phase detector is connected to the second input terminal of the charge pump and the second input terminal of the XOR module, respectively. The output terminal of the XOR module is connected to the first terminal of the filter capacitor and the input terminal of the DAC module, and the second terminal of the filter capacitor is grounded. The output terminal of the DAC module is connected to the input terminal of the digital logic state machine, and the output terminal of the digital logic state machine is connected to the third input terminal of the charge pump. The output terminal of the charge pump is used to connect to the input terminal of the low-pass filter in the PLL. This application can compensate for the mismatch current of the charge pump in real time.

A digital phase-locked loop (PLL) circuit is provided, comprising: a synchronization control module configured to generate an input characterization signal representing the periodic change of the input periodic signal relative to the base clock signal based on a base clock signal and an input periodic signal; a counting control module configured to generate a clock counting result representing the multiple relationship between the period of the input characterization signal and the period of the base clock signal based on the base clock signal and the input characterization signal; an arithmetic control module configured to generate a base clock control variable based on a preset multiplication factor between the frequency of the output clock signal and the frequency of the input periodic signal, and to generate an output clock control variable based on the clock counting result; and an output control module configured to generate an output control signal based on the base clock control variable and the output clock control variable, and to generate an output clock signal based on the output control signal and the base clock signal.

The application discloses a kind of calibration method and device for rotary variation soft decoding, calibration method includes: according to N times oversampling frequency respectively sampling rotary variation feedback sine and cosine feedback signal envelope surface and obtaining positive, cosine oversampling signal;Positive, cosine oversampling signal is handled to obtain the zero position offset of rotary variation positive, cosine envelope signal;Positive, cosine oversampling signal is handled to obtain the amplitude of rotary variation positive, cosine envelope surface;Positive, cosine oversampling signal is handled to obtain the phase deviation of rotary variation positive, cosine envelope surface;Through the amplitude, zero position offset, phase deviation obtained by calculation, the envelope surface of rotary variation positive, cosine is compensated, and the signal after compensation is sent into phase-locked loop to obtain the angle and rotational speed information of rotary variation.The application obtains accurate amplitude, zero position offset, phase difference in turn, and then carries out error compensation, finally obtains corrected positive, cosine signal, effectively guarantees the efficiency of motor.