1199 results about "Pre-charge" patented technology

A method for reading non-volatile memory arranged in columns and rows which reduces adjacent cell coupling, sometimes referred to as the Yupin effect. The method includes the steps of: selecting a bit to be read in a word-line; reading an adjacent word line written after word line; and reading the selected bit in word line by selectively adjusting at least one read parameter. In one embodiment, the read parameter is the sense voltage. In another embodiment, the read parameter is the pre-charge voltage. In yet another embodiment, both the sense and the pre-charge voltage are adjusted.

Multi-gate NOR flash thin-film transistor (TFT) string arrays are organized as three dimensional stacks of active strips. Each active strip includes a shared source sublayer and a shared drain sublayer that is connected to substrate circuits. Data storage in the active strip is provided by charge-storage elements between the active strip and a multiplicity of control gates provided by adjacent local word-lines. The parasitic capacitance of each active strip is used to eliminate hard-wire ground connection to the shared source making it a semi-floating, or virtual source. Pre-charge voltages temporarily supplied from the substrate through a single port per active strip provide the appropriate voltages on the source and drain required during read, program, program-inhibit and erase operations. TFTs on multiple active strips can be pre-charged separately and then read, programmed or erased together in a massively parallel operation.

A pre-charge voltage supply circuit of a semiconductor device is disclosed which includes a first switch which supplies a pre-charge voltage in response to a first signal having a predetermined voltage level, and has a turn-on resistance of a predetermined level, and a second switch which is connected in parallel to the first switch, supplies the pre-charge voltage in response to a second signal, and has a turn-on resistance lower than the turn-on resistance of the first switch.

A power inverter system includes a DC to AC inverter configured to convert DC voltage from a DC power source to AC voltage. A DC link couples the DC power source and the inverter. An inverter pre-charger operates to pre-charge the inverter to achieve a desired DC link voltage prior to connecting the power inverter system to an AC power grid. A phased lock loop synchronizes the pre-charged inverter to the AC power grid prior to connecting the power inverter system to the AC power grid. The pre-charged inverter regulates the DC link voltage to about the minimum voltage level that allows control of AC grid currents via the inverter subsequent to connecting the power inverter system to the AC grid. The inverter operates in a maximum power point tracking control mode only subsequent to a first voltage transient caused by connecting the DC power source to energize the power inverter system.

The display matrix section 200 has pixel circuits 210 arranged in the form of a matrix, a plurality of gate lines Y1, Y2 . . . that extend in the row direction, and a plurality of data lines X1, X2 . . . that extend in the column direction. The scan lines are connected to a gate driver 300, and the data lines are connected to a data line driver 400. A pre-charging circuit 600 or additional current generation circuit is installed for each data line as means for accelerating the charging or discharging of the data line. For each data line, charging or discharging is accelerated by pre-charging or current addition prior to the completion of the setting of the light emission level in the corresponding pixel circuit 210.

The invention provides a gate drive circuit and method and a display device and relates to the technical field of display. The method includes the steps that gate row drive scanning is performed on shifting register units located in a first area in the gate drive circuit; after gate row drive scanning of the shifting register units in the first area is finished, touch scanning is performed; after touch scanning is finished, the last-level shifting register unit located in the first area is scanned again so that the last-level shifting register unit located in the first area can be used for pre-charging a first-level shifting register unit located in a second area; gate row drive scanning is performed on shifting register units located in the second area in the gate drive circuit, and the last-level shifting register unit located in the first area is in cascade connection with the first-level shifting register located in the second area. The method can overcome the defect that the row pixel charging rate is insufficient and solve the problem of dark lines or poor bright lines.

The present invention is directed to Bidirectional Multimode Power Converter which employs a high frequency dynamically varying amplitude modulation and voltage steering method to convert the source AC or DC voltages to output AC or DC voltages, with programmable output voltage levels, output voltage frequency and duration. The inrush current control, turning off the idle converter, line voltage brown out protection, soft start, high pre-charge voltage generation, soft shut down of converter, dimming operation modes are inherent characteristics of the Bidirectional Multimode power converter. The Bidirectional Multimode Power Converters of the present invention facilitates bidirectional conversion and coupling multiple bidirectional sources and or loads.

The Bidirectional Multimode Power Converter of the present invention supports local and remote control for changing operational characteristics of the converter on demand or on a programmed time of the day for a specified duration of time.

A method and apparatus for maintaining the single phase integrity of a deep well formation sample that is removed to the surface comprises a vacuum jacket insulated single working cylinder divided by two free pistons into three variable volume chambers. The intermediate chamber is pre-charged with a fixed quantity of high pressure gas. Wellbore fluid freely admitted to one end chamber bears against one free piston to further compress the gas. The formation sample is pumped into the other end chamber to first, displace the wellbore fluid from the first end chamber and, sequentially, to further compress the gas to preserve the sample phase state upon removal to the surface.

Circuits for programming a circuit with decreased programming time are provided. Such circuits include a storage device such as a capacitor for storing display information and for ensuring a driving device such as a driving transistor drives a light emitting device according to the display information. To increase programming time, the pixel circuits may be pre-charged or a biasing current may be applied to charge and/or discharge a data line and/or the driving device. Aspects of the present disclosure allow for the biasing current to drain partially through the storage device to allow the portion of the biasing current applied to the driving device to remain small while the data line discharges. Furthermore, the present disclosure provides display architectures and operation schemes for display arranged in segments each including a plurality of pixel circuits.

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A vehicle propulsion includes an alternating current (AC) traction drive, a first energy storage system electrically coupled to the traction drive through a direct current (DC) link, a second energy storage system electrically coupled to the traction drive such that the voltage output from the second energy storage system is decoupled from the DC link using a bidirectional boost converter, and an energy management system configured to control said first and second energy storage systems when the vehicle is operating in at least one of a pre-charge mode and a normal operation mode with the traction drive system enabled.

A Switch Node Assisted Linear architecture, including a linear amplifier in parallel with a switched converter, is configurable in two tracking modes: (a) a SMAL regulator in which the amplifier sets toad voltage with an envelope tracking bandwidth, and the switched converter is configured for current assist, and (b) a Switched Mode Power Supply configuration in which the amplifier is switch-decoupled, and the switcher circuit is switched configured with an output capacitor, operable as an SMPS providing load voltage with an adaptive tracking bandwidth that is less than the envelope tracking bandwidth. Staged switching effects substantially seamless transitions between tracking modes, with the amplifier holding the load voltage at a substantially constant envelope tracking voltage (CVET): (a) for ET-AT transitions, the CVET mode enables pre-charging the output capacitor to a target AT voltage, prior to switch-decoupling the amplifier; and (b) for AT-ET transitions, CVET mode enables discharging the output capacitor.

A combination EEPROM and Flash memory is described containing cells in which the stacked gate transistor of the Flash cell is used in conjunction with a select transistor to form an EEPROM cell. The select transistor is made sufficiently small so as to allow the EEPROM cells to accommodate the bit line pitch of the Flash cell, which facilitates combining the two memories into memory banks containing both cells. The EEPROM cells are erased by byte while the Flash cells erased by block. The small select transistor has a small channel length and width, which is compensated by increasing gate voltages on the select transistor and pre-charge bitline during CHE program operation.

Power conversion systems and diagnostic techniques are presented for detecting suspected converter faults when a pre-charge circuit is engaged during system startup, in which known or estimated system characteristics are used to derive expected converter voltage values or rate of change values and the levels are measured during startup to ascertain whether the pre-charge circuit or other converter components are faulted.

An aspiration system is disclosed for removing body liquid (e.g. urine or a secretion) discharged by the human body. The aspiration system comprises a body interface device with a liquid sensor, and an aspiration unit coupled to the body interface device. The liquid sensor comprises a temperature sensor and/or a resistance bridge. The aspiration unit includes: a vacuum chamber; a pump for pre-charging the vacuum chamber with a vacuum; a valve coupled between the vacuum chamber and the body interface device; and a control circuit for controlling the valve to apply aspiration suction from the vacuum chamber to the body interface device in response to detection of body liquid at the liquid sensor.

A transformer module includes a main primary winding coupled to a first input power source to receive a medium voltage signal, multiple main secondary windings each to couple to a power cell of a drive system, and an auxiliary primary winding coupled to a second input power source to receive a low voltage signal. The auxiliary primary winding can be spatially separated from the main windings to increase leakage inductance. The auxiliary primary winding can be active during a pre-charge operation to pre-charge the power cells.

A gate driver comprises a shift register that has a plurality of stages connected together and outputs a gate signal comprising a first pulse and a second pulse to a gate line. A stage includes a holding part, a pre-charging part, a pull-up part, and a pull-down part. The holding part discharges an output terminal to an off-voltage in response to a first clock signal. The pre-charging part turns off the holding part and outputs the first clock signal as the first pulse to the output terminal in response to an output signal of a previous stage. The pull-up part outputs a second clock signal as the second pulse to the output terminal in response to the output signal of the previous stage. The pull-down part discharges the first output terminal to the off-voltage in response to an output signal of a next stage.

The invention discloses an Li traction battery series parallel change-over charging method and a charging device. The charging device comprises a power main loop comprising a rectifier circuit, a DC filtering capacitor, a pre-charging circuit, a voltage sensor, a switch bridge circuit, a charging current sensor and a series parallel change-over switch, a control circuit board comprising a parallel branch signal unit, a switch signal drive control unit, a coil signal circuit, a voltage current signal circuit, a control processor and a signal display unit, a serial charging circuit comprising a filter inductor, a filter capacitor and an output voltage sensor, and a parallel charging circuit comprising a primary coil, a feedback coil, an iron core, a plurality of secondary coils of a multi-winding transformer and a plurality of series parallel charging unit. The pre-charging, serial charging and parallel charging are carried out by the charging method according to a set pre-charging voltage value and an end voltage value. The method and the device provided by the invention reduce the cost and volume of charging devices, maintain the balance of charging capacity of every Li traction battery electrical core, ensure adequate protection and best working status for each battery unit and improve safety and service life cycle of Li traction battery.

The invention discloses an electric automobile high-voltage power-on circuit and a control method thereof. The circuit comprises a battery pack, a positive relay, a negative relay, a pre-charge resistor, a pre-charge relay and a pre-charge capacitor, wherein the positive relay, the negative relay, the pre-charge resistor and the pre-charge relay are connected between the battery pack and a load; the pre-charge capacitor is arranged at the two ends of the load; certain ends of the positive relay and the negative relay are connected to a master positive end and a master negative end of the battery pack respectively; the other ends of the positive relay and the negative relay are connected with the load; the pre-charge resistor and the pre-charge relay form a series branch; the series branch is arranged at the two ends of the positive relay and forms a parallel circuit; the pre-charge resistor is connected to the master positive end of the battery pack. The detection of an actual state of the relay is realized, a fault can be timely reported under the condition that a high-voltage loop fails, high-voltage power-on operation is stopped, and the safety of the battery system and the vehicle is guaranteed.

The invention relates to a lithium ion battery low-temperature alternating current heating device for an electric bicycle. The lithium ion battery low-temperature alternating current heating device isused for performing alternating current heating on a power battery. The lithium ion battery low-temperature alternating current heating device comprises a control unit, an energy conversion circuit,an energy storage inductor, a capacitor, a pre-charging circuit and a starting switch, wherein the power battery, the energy storage inductor, the energy conversion circuit and the capacitor are sequentially connected to form a loop; the pre-charging circuit and the starting switch are parallelly connected between the power battery and the capacitor; the control unit is respectively connected withthe energy conversion circuit, the pre-charging circuit and the starting switch, and controls the on-off state of the starting switch according to the temperature information of the power battery, sothat the conversion between the alternating current heating state and the normal power supply state of the power battery can be realized; during the entering of the alternating current heating state,the control unit controls the work state of the energy conversion circuit according to the current information of the power battery in real time; the inside heating is realized in the alternating current charging and discharging process of the power battery. Compared with the prior art, the lithium ion battery low-temperature alternating current heating device has the advantages that the heatingis uniform; the efficiency is high; the newly added devices are few; the cost is low, and the like.

When a control means turns on a pre-charging contactor, an AC current from an AC power source is converted into a DC current by a switching circuit to charge a smoothing capacitor. However, the smoothing capacitor cannot be charged completely due to the operation of a capacitor of an LC filter. Therefore, when the voltage of the smoothing capacitor detected by a voltage detecting means exceeds a predetermined value, the smoothing capacitor is further charged by bringing the switching circuit into a boosting operation. Thus, even if an LC relay required in the prior art for invalidating the capacitor of the LC filter is not provided, it is possible to completely charge the smoothing capacitor, thereby providing a decrease in the number of parts and an enhancement in reliability of the pre-charging circuit, and preventing a reduction in performance of the LC filter due to a loss in the LC relay.

A 3D graphics pipeline includes a prefetch mechanism that feeds a cache of depth tiles. The prefetch mechanism may be predictive, using triangle geometry information from previous pipeline stages to pre-charge the cache, thereby allowing for an increase in memory bandwidth efficiency. A z-value compression technique may be optionally utilized to allow for a further reduction in power consumption and memory bandwidth.

A method and system for decision feedback equalization for digital transmission systems is provided. Low-power integrating decision feedback equalization with fast switched-capacitor paths are used, for suppressing intersymbol interference (ISI) due to past data symbols. The decision feedback equalization involves performing current-integrating decision feedback equalization at low-power employing a fast capacitively coupled feed-forward path at the output of a current-integrating buffer and inducing voltage changes by charge redistribution via coupled switching capacitors, and performing a voltage digital-to-analog conversation to determine a feedback coefficient as a coupling voltage. Then switches are reset to a pre-charge coupling voltage in the buffers to eliminate residual ISI caused by signal history, thereby achieving current integrating buffering with switched-capacitor feedback during the integration, and the capacitive switches are triggered by previous symbols.

The invention provides a semiconductor integrated circuit device provided with an SRAM that satisfies the requirements for both the SNM and the write margin with a low supply voltage. The semiconductor integrated circuit device include: multiple static memory cells provided in correspondence with multiple word lines and multiple complimentary bit lines; multiple memory cell power supply lines that each supply an operational voltage to each of the multiple memory cells connected to the multiple complimentary bit lines each; multiple power supply circuits comprised of resistive units that each supply a power supply voltage to the memory cell power supply lines each; and a pre-charge circuit that supplies a pre-charge voltage corresponding to the power supply voltage to the complimentary bit lines, wherein the memory cell power supply lines are made to have coupling capacitances to thereby transmit a write signal on corresponding complimentary bit lines.

Coarse/fine programming of non-volatile memory is provided in which memory cells are programmed at a first rate of programming prior to reaching a coarse verify level for their intended state and a second rate of programming after reaching the coarse verify level but before reaching the final verify level for their intended state. Large sub-threshold swing factors associated with smaller memory cells can affect the accuracy of sense operations, particularly when sensing at a fine verify level after sensing at a coarse verify level without pre-charging the bit line between the different sensings. Different reference potentials are utilized when sensing at a coarse verify level and a final verify level. The different between the reference potentials can compensate for any discharge of the bit line during the coarse level sensing.

The invention provides a boosting power converting circuit and a control method. The circuit comprises N first switch modules, N second switch modules, N-1 third switch modules, N-1 flying capacitors and N-1 pre-charging units, wherein the N second switch modules are serially connected with an inductor and an input power supply so as to form a loop; N first switch modules are serially connected with a load, the inductor and the input power supply so as to form the loop; the flying capacitors and the third switch modules are connected between the first public points which are between the first switch module and the first switch module and the second public points which are between the second switch module and the second switch module; each of the flying capacitors is in parallel connection with each of the pre-charging units; each of the pre-charging units is used for pre-charging each of the flying capacitors and guaranteeing the voltage of each flying capacitor not below 0V when the third switch modules connected with the flying capacitors in parallel connection with the pre-charging units are switched off and the voltages of the flying capacitors are less than a preset threshold value, so that the problem of possibly breaking down the semiconductor device through overvoltage when the boosting power converting circuit is used in a boosting system is avoided.

A dynamic logic register including a complementary pair of evaluation devices, delayed inversion logic, a dynamic evaluator, latching logic, and a keeper circuit coupled to the output. The evaluation devices are responsive to a clock signal and provide a pre-charged node and an evaluation node. The delayed inversion logic outputs a complete signal that is a delayed and inverted version of the clock signal. The dynamic evaluator, coupled between the pre-charged and evaluation nodes, evaluates a logic function based on a data signal during an evaluation period between operative edges of the clock and complete signals. The latching logic enables the state of an output node to be determined by the state of the pre-charged node during the evaluation period and otherwise clamps the pre-charged node to prevent perturbations of the data signal from propagating to the output node.

The invention discloses an electric car high-voltage electrical system. The system comprises a power battery, a first switch, a charging circuit, a second switch and a pre-charging circuit, at least one controller and a discharging circuit. One end of the first switch is connected with a cathode of the power battery. The charging circuit is used for charging the power battery. One end of the second switch is connected with an anode of the power battery. The at least one controller is used for performing pre-charging when the first switch and a first switch component of the pre-charging circuit are closed and the second switch is open and performing electrifying when the first switch and the second switch are closed and the first switch component of the pre-charging circuit is open. The discharging circuit is used for discharging pre-charged capacitors of the at least one controller when the first switch, the second switch and the first switch component of the pre-charging circuit are open and a second switch component of the discharging circuit is closed. The high-voltage electrical system has the advantages of being safe and reliable. The invention further discloses an electric car high-voltage electrical system control method.

The invention relates to a circuit breaker and a realization method thereof, and specifically relates to a mixed high-voltage direct-current circuit breaker and a realization method thereof. The direct-current circuit breaker is based on the principle of secondary current transfer. A main branch is composed of a quick-action mechanical switch and a current transfer module which contains a full-controlled device, which ensures the advantages of low loss and flexible current transfer control in the state of normal conduction. A first current transfer branch is composed of half-controlled device thyristors connected in series, so that the circuit breaker has strong fault flow capacity and breaking capacity, 'zero voltage and zero current' of the mechanical switch can be maintained long enough, and arc-free switching of the mechanical switch is realized. A second current transfer branch is composed of capacitors with pre-charged voltage, an inductor, and series-connected thyristors. After the thyristors of the first current transfer branch are reliably switched off, the capacitors quickly build up direct voltage high enough to resist the system, and an energy absorption circuit limits the voltage of the capacitors. Thus, the size and cost of the capacitors are well controlled.

A semiconductor memory device operate during a program verification operation to apply a read voltage to a word line and a pre-charge voltage to a bit line in order to provide output data. A number of fail cells is determined in view of the output data, wherein the number of fail cells is directly related to an increase in voltage on a common source line (CSL) connected to memory cells providing the output data. During a subsequent program verification operation, the level of at least one of the read voltage and the pre-charge voltage is adjusted in response to the number of fail cells.

A circuit breaker comprising a first dc line electrically connectable to first incoming and first outgoing dc lines, wherein the first dc line comprises a first fault-interrupting switch contact system and a first switching aid network. The first switching aid network comprises first and second rectifier strings, wherein each rectifier string comprises one or more series connected reverse blocking power electronic devices that define a first H-bridge rectifier. The first switching aid network further comprises a snubber string, the snubber string comprising at least one series connected power electronic devices capable of being turned on by gate control and a capacitor. The first switching aid network further comprises a pre-charge string comprising at least one series connected power electronic devices capable of being turned on by gate control and a resistor, and a surge arrester connected between the first and second dc output terminals of the first H-bridge rectifier.