A data processing apparatus and method are provided for handling hard errors. The data processing apparatus comprises processing circuitry for performing data processing operations, and cache storage having a plurality of cache records for storing data values for access by the processing circuitry when performing the data processing operations. A cache record error storage having at least one error record, and a hard error storage having at least one hard error record, are provided for keeping track of errors detected when accessing cache records of the cache storage. In particular, when an error is first detected for a particular cache record, one of the error records in the cache record error storage is allocated to store a cache record identifier for that cache record, and an associated count value is set to a first value. Further, if an error is detected when accessing a cache record, a correction operation is performed in respect of that currently accessed cache record, and access to that currently accessed cache record is then re-performed. Each time an error is detected for subsequent accesses to that cache record, the count value is incremented, and each time an error is not detected when that cache record is accessed, the count value is decremented. If the count value reaches a predetermined threshold value, then the cache record identifier is moved from the cache record error storage to an error record of the hard error storage. Any cache record whose cache record identifier is stored in the hard error storage is logically excluded from the plurality of cache records of the cache storage for the purposes of subsequent operation of the cache storage. Such an approach provides a hardware mechanism that automatically identifies and corrects hard and soft errors, but only masks from further use those cache records affected by hard errors.