45 results about "Porting" patented technology

A computer-implemented method including quantifying pre-defined technical porting goal of a porting project into a technical value model, receiving selected decisions regarding the target system and porting tasks and current version of the porting system, executing traceable porting steps based on the selected decisions, porting tasks and current version of the porting system and creating software artefacts of the target system, evaluating software artefacts created or converted by each of the executed porting steps and / or evaluating test results by applying and / or simulating each ported software artifact, outputting references to the versions of created and / or converted and evaluated software artifacts into a porting log, and training the creation and evaluation component of the porting system with data of the porting log based on the decisions and the outcome of the porting project using porting mechanism to reach the pre-defined goal for the porting system.

In order to solve the problem of low efficiency in application development and transplantation of the present application, the present application provides a code processing method, including: obtaining a first code, which is a compiled code suitable for the source platform, and then relocating the address of the variable associated with the function in the first code to obtain the logical address of the variable, and then decompiling according to the logical address of the variable and the first code to obtain a second code suitable for the target platform. On the one hand, this method realizes cross-platform decompilation and improves the efficiency of application development or transplantation; on the other hand, the variable associated with the function in the first code is relocated to solve the problem of pseudo code logic errors caused by uncertain definition and access address of the variable, thereby improving the accuracy of decompilation and the reliability of decompilation.

This invention discloses a method for porting intelligent models based on domestically produced intelligent chips. The method involves using a porting tool provided by the domestically produced intelligent chip to rewrite the model, obtaining a model file corresponding to the version of the porting tool. If the internal logic of the original model has been changed, operators are added to the model file corresponding to the version of the porting tool, resulting in a model file with added operators, and proceeding to the next step. If no changes have been made, the method proceeds directly to the next step. The model file is then quantized to obtain a quantized model file. An offline model is generated based on the quantized model file. The original intelligent model and the offline model are loaded with the same computational example, and the results of the two models are compared. If the difference in the results meets the requirements, the porting process ends; otherwise, the porting problem is identified and the process restarts. This invention solves the compatibility problem of intelligent models without affecting the operating efficiency, response speed, and accuracy of the artificial intelligence model.

This invention discloses a method for porting a digital signal processor (DSP) assembler based on a processor architecture description, comprising the following steps: S1. Based on the processor architecture description, a lexical analysis and syntax analysis part of the assembler is constructed to realize the parsing of special assembly instructions; S2. Taking the parsed instruction data or instruction binary code as input, dynamic encoding and decoding of instructions are implemented according to the instruction definition, thereby realizing the conversion between the object file and the assembly file. This DSP assembler porting method further improves the performance of the assembler and automates the porting process, adapting it to the digital signal processor architecture. It also provides support for single instruction multiple data, very long instruction words, and instruction validity checks. While ensuring that the program execution result meets expectations, it greatly reduces the number of clock cycles required for execution, possesses universality, and meets the needs of rapid processor architecture updates.

The invention relates to the technical field of operating systems, in particular to a method, a system, equipment and a medium for transplanting an iSulad container engine to an open source gap system. The method comprises the following steps: firstly, providing an iSulad container engine related configuration template, a patch and an executable script; secondly, executing the executable script step by step on the basis of an open-source swan-mong system source code; and finally, recompiling the whole system to obtain a programmable mirror image file. Compatible transplantation of the iSulad container engine on the open source gap system is realized, so that the iSula container can efficiently and stably operate on the open source gap system, the original iSula container is helped to be smoothly migrated and used on the open source gap system, and the development of the whole open source gap container ecological system is effectively promoted.

The invention discloses a method and a device for transplanting a device driver between operating systems and electronic equipment, and relates to the technical field of computers. And in response to a drive initialization operation on the target equipment in the first operating system, starting a target drive program corresponding to the target equipment in the first operating system. And calling a drive registration function interface in the first operating system in response to the target drive program, and registering a file operation structure body of the target equipment in the second operating system into the created target structure body. A driving function pointer used for driving target equipment is packaged in the file operation structural body. The resource manager of the first operating system is packaged into the target structure body, the resource manager is initialized, the initialized resource manager is used for registering the target device node, and the target structure body can be accessed through the target device node. In this way, multiplexing of the packaged drive function can be achieved in the first operating system, and efficient transplantation adaptation of the device drive among different operating systems is achieved.

A method of porting a first application, corresponding to a third-party development tool, into a second application, corresponding to a sub-application that depends on a parent application to run, is performed by an electronic device. The device transforms the first application from a first project mechanism into a second project mechanism. The device converts a design resource in the transformed first application from a first resource format into a second resource format. The device exports the design resource to a development tool of the sub-application. The device converts a code resource in the transformed first application from a first programming language into a second programming language. The device exports the code resource to the development tool of the sub-application, The device also performs secondary development on the design resource and the code resource in the development tool of the sub-application.

The invention relates to the technical field of airborne system hardware abstraction, and discloses a hardware abstraction method and system for an airborne system, computer equipment and a medium, and the method comprises the steps: abstracting each physical equipment in the airborne system from different types of physical equipment into abstract equipment with the same interface, shielding the physical difference between different types of equipment, and improving the hardware abstraction efficiency. And forming the same abstract device with the same function. And meanwhile, analyzing and counting the interfaces of different types of physical equipment of each type of physical equipment to form a group of uniform interfaces of the abstract equipment. For the upper software, the method shields the physical difference of different hardware of different manufacturers, obviously improves the development efficiency and cross-platform portability of the upper software, and facilitates the development and transplantation of the upper software; for manufacturers, the method unifies the interface requirements of different models of aircrafts, and facilitates formation of lineage design and research and development of products with unified functions and different performances.

This invention discloses an automatic analysis and intelligent porting system for embedded engineering driver libraries, relating to the field of embedded engineering. The system includes: an engineering parsing module for scanning embedded engineering directories, parsing target files, and generating an engineering structure semantic model. Compared with existing technologies, the advantages of this invention are: it automatically constructs an engineering semantic description structure and simultaneously generates a driver function semantic model, realizing a digital description of the engineering structure and driver capabilities; an intelligent matching module generates an adaptation mapping relationship based on feature alignment and similarity calculation, and a driver adaptation generation module automatically generates complete adaptation code accordingly, forming a driver adaptation layer. This system transforms the traditional driver porting process, which relies on manual experience, into a standardized and automated process, significantly reducing porting costs and error rates, improving cross-platform driver reuse efficiency, and realizing the intelligent and systematic nature of embedded driver porting.

Computer-implemented techniques for controlling virtual machine (VM) porting activities based on dynamically-calculated virtual machine predicate values. Upon receiving a command to port a subject virtual machine from a source virtualization system environment to a target virtualization system environment (wherein the source virtualization system environment and the target virtualization system environment are different), one or more match expressions that describe time of day and resource predicates conditions, under which porting operations of the subject virtual machine are to be carried out are evaluated. Based on observance of the aforementioned time of day and resource predicates, various virtual machine porting operations are either carried out (e.g., when applicable match expressions and / or predicates evaluate to TRUE), or are temporarily suspended (e.g., when the applicable match expressions and / or predicates evaluate to FALSE). Multiple virtual machines can be ported concurrently while observing VM priorities and bandwidth throttling.

This invention proposes an embedded BMC software construction method, providing a specially designed and verified operating system kernel for the BMC chip, and supporting the addition of various debugging tools and complex applications, thus increasing the operability of the porting process. The kernel's execution steps can be displayed using disassemblers and various JTAG tools, enhancing the modularity and systematization of the software solution construction work.

This invention discloses an FPGA netlist synthesis method and system based on multi-tool collaboration. The method includes: acquiring the parent layer design code of the FPGA to be synthesized; identifying logic modules in the parent layer design code that cannot be synthesized using a first synthesis tool, as these modules to be split; separating the modules to be split into a second design part, and using the remaining part of the parent layer design code as the first design part, retaining the black-box interface definitions of the modules to be split in situ within the first design part; independently synthesizing the first design part using the first synthesis tool to generate a first netlist; selecting a suitable second synthesis tool to independently synthesize the second design part to generate a second netlist; and filling the entities corresponding to the second netlist into the black-box positions of the first netlist to generate a parent layer netlist file. This method solves the problem of synthesis failure caused by a single synthesis tool's incompatibility with multiple languages ​​and IP sources, and avoids the forced porting of unmodifiable code.

This application relates to a method, apparatus, device, medium, and program product for adjusting a deep learning framework. The method includes: obtaining an original deep learning framework; the original deep learning framework represents a deep learning framework whose compatibility with a heterogeneous accelerator is less than a preset value; performing basic function porting processing on the original deep learning framework to obtain an initial deep learning framework that is fully compatible with the basic functions of the heterogeneous accelerator; adding optimized and extended functions, excluding the basic functions, to the initial deep learning framework to obtain a target deep learning framework compatible with the heterogeneous accelerator. The above method, while ensuring the complete porting of the original deep learning framework's functions, further optimizes and extends the original deep learning framework to improve its compatibility with the heterogeneous accelerator, enhance the framework's performance, and ensure the framework's usability and the addition of some functions on the heterogeneous accelerator.

Computer-implemented techniques for controlling virtual machine (VM) porting activities based on dynamically-calculated virtual machine predicate values. Upon receiving a command to port a subject virtual machine from a source virtualization system environment to a target virtualization system environment (wherein the source virtualization system environment and the target virtualization system environment are different), one or more match expressions that describe time of day and resource predicates conditions, under which porting operations of the subject virtual machine are to be carried out are evaluated. Based on observance of the aforementioned time of day and resource predicates, various virtual machine porting operations are either carried out (e.g., when applicable match expressions and / or predicates evaluate to TRUE), or are temporarily suspended (e.g., when the applicable match expressions and / or predicates evaluate to FALSE). Multiple virtual machines can be ported concurrently while observing VM priorities and bandwidth throttling.

Disclosed is an improved approach to provide usage of remote GPUs. The approach provides systems and methods for executing software workloads on remote servers while preserving the appearance of local execution at a client machine. A client-side resource shim and secure network tunnel proxy interactions with operating system resources, enabling workloads to access files, networks, and GPUs on the remote server transparently. The system employs caching, mutable software environments, and replacement maps to maintain compatibility across heterogeneous hardware and optimize performance. Intelligent matchmaking and telemetry-based resource selection allow workloads to dynamically utilize appropriate remote GPUs, including across cloud providers or edge networks. The invention enables GPU arbitrage, workload porting, efficient infrastructure utilization, and transparent acceleration for edge devices without modifying the original software.

The present invention discloses a WRF transplantation and optimization method based on Huawei Kunpeng processor. The present invention first installs Kunpeng transplantation analysis tool to detect differences in WRF running instruction sets, compilation instructions and dependent libraries on ARM, and obtains the current Kunpeng processor system and compiler version, which is used to detect and generate a transplantation analysis report matching the system; the WRF source code package is placed in the transplantation analysis tool for transplantation analysis; in the transplantation analysis report, the instructions with differences in the file are found, and the WRF source code package is modified and optimized according to the suggestions given in the report; the modified WRF source code package is moved to the Kunpeng processor; finally, the WRF source code package is decompressed, and the executable program wrf.exe of WRF is compiled. The present invention solves the performance problems caused by cross-architecture, so that WRF runs perfectly on low-power, high-performance domestic ARM processors.

A method for cross-platform porting of applications includes converting a source-platform-specific application into an application that can be run on an in-vehicle platform. The converting includes converting a source-platform-specific user interface of the application to be converted into a web-based user interface and converting a call to a source-platform-specific application programming interface (API) of the application to be converted into a call to an in-vehicle platform API.

The invention provides an RAID card hard disk control system, method and device based on an expansion capability set and a medium, relates to the technical field of computers and is applied to an RAID card chip, and the RAID card chip is in communication connection with a host and a plurality of under-hanging hard disks based on a high-speed serial computer expansion bus standard PCIe protocol. The system comprises a BAR (Base Address Register) access control module and an expansion capability set, wherein the expansion capability set comprises a downlink control region and an uplink control region. And the BAR access control module is responsible for acquiring hard disk configuration information issued by the host from the downlink control area, and performing operations such as reading, writing or polling stopping on a specified to-be-configured space of the lower-mounted hard disk according to the hard disk configuration information. And after the operation is completed, a result is fed back to the uplink control area for the host to read. According to the technical scheme, the problems that host software and RAID card firmware are large in development environment difference and complex in transplantation are solved, the problem that a hard disk control function is redeveloped in an RAID card is avoided, and restrictions on firmware development and function extension are relieved.

To enable accurate determination of the work effort required to port large-scale software projects across disparate platforms.SOLUTION: A method of predicting porting work effort is provided. A total porting work effort to port a software project from a source platform to a disparate target platform is predicted using a first porting work effort, a second porting work effort, and a third porting work effort. The software project is ported from the source platform to the disparate target platform provided that the total porting work effort is less than a defined maximum porting work effort threshold level.SELECTED DRAWING: Figure 1

This invention belongs to the field of software porting technology, and specifically relates to a software intelligent porting assistance method and system based on the SW processor. It includes: constructing a SW processor-specific feature knowledge base; performing static analysis on the code of the software to be ported and storing it in a vector database to construct a knowledge base vector index, thereby comparing code differences; performing code preprocessing based on the analysis and vector index results, as well as the SW architecture rules and x86 to SW architecture conversion rules in the specific feature knowledge base; identifying the software language and system environment of the software to be ported and compiling it, generating compilation error logs if compilation errors occur; retrieving errors from the compilation logs, and using the SW large model to identify and call repair tools for code modification via function call functionality; this invention solves the problems of poor compatibility, low efficiency, and poor stability of existing tools adapted to this processor.

The invention discloses a code analysis and conversion method, device and equipment and a readable storage medium. In the code analysis stage, embedded program codes are sequentially partitioned, process control instructions in all code blocks are analyzed, the code blocks are divided into sub-code blocks, and the process relation and jump conditions between the sub-code blocks are established; and performing iterative processing until splitting cannot be continued, constructing a register mapping structure by utilizing the target code in a code conversion stage, converting each code block instruction into a target instruction set instruction through an instruction conversion library, packaging sub-code blocks containing a circulation process by using a target circulation instruction, and splicing the converted code blocks according to an execution process to generate the target code. Through block analysis and dynamic instruction conversion, an embedded program code is disassembled into atomic units according to a process structure, a mapping relation is established, automatic transplantation of a cross-architecture code is realized based on register architecture adaptation and semantic conversion of an instruction library, the workload of manual transplantation is remarkably reduced, and functional consistency is ensured.

The invention provides a transplanting method and a testing method of a ThreadX SMP operating system, the transplanting method is used for transplanting the operating system to an RISC-V64-bit processor for operation, and the transplanting method comprises the following steps: obtaining hardware needing to be adapted on the RISC-V64-bit processor as target hardware; according to the condition of the target hardware, codes corresponding to a plurality of program modules of a ThreadX SMP operating system are modified and / or written, adaptation of the ThreadX SMP operating system to the target hardware of the RISC-V64-bit processor is completed, and the program modules are assembly programs written by using an RISC-V instruction. According to the technical scheme, the ThreadX SMP operating system is adapted to each interface between the target hardware and the ThreadX SMP operating system, so that the ThreadX SMP operating system can normally run on the processor with the RISC-V64-bit architecture, and the transplanting work of the ThreadX SMP operating system is realized. Through testing, the transplanted system can run reliably.

The method for quickly transplanting electron software comprises the following steps: adding the code of the target architecture in the v8 directory of the electron source code; modifying the v8 test program to increase the test program of the target architecture; searching the existing CPU architecture related code in the third party software of the electron source code, and increasing the corresponding code of the target CPU architecture in the source code according to the specification of the target CPU architecture; modifying the compiling mode of the third party software ffmpeg of the electron source code; searching the existing CPU architecture related code in the main directory of the electron source code, and increasing the corresponding code of the target CPU architecture in the source code according to the specification of the target CPU architecture; and executing the electron building command. The present application can save the development time of the domestic CPU platform electron transplantation.

The invention belongs to the technical field of analog-to-digital conversion, and relates to an AD7616-based full-hardware autonomous analog-to-digital conversion device and method. A self-developed A / D conversion logic control state machine is designed at the FPGA end, continuous and autonomous operation of the analog-to-digital conversion process guided by a lower computer is achieved, and a conversion result is temporarily stored in an FPGA register to be read by an upper computer according to needs. The device comprises an AD7616 analog-to-digital converter, an FPGA main control chip, a communication interface and the like, wherein an A / D conversion logic control state machine is used for controlling the AD7616 to complete a series of operations from configuration parameter setting to analog-to-digital conversion to analog-to-digital conversion data reading. The method has the advantages of being uniform in sampling rate, not affected by the bus transmission rate of the upper computer, easy to transplant and the like, can reduce the time cost and risk of driving transplant, improves the consistency and reliability of sampling results, and is suitable for various systems needing analog-to-digital conversion.

This invention discloses an apparatus and method for building web front-end applications based on object technology, belonging to the field of Internet technology. It solves the technical problems of existing technologies for building web front-end applications, such as the high learning cost caused by the separation of HTML, CSS, and JavaScript in traditional native methods; difficulties in data access between components during runtime in component-based methods; instability of common basic code and redundant code during component reuse; and difficulties in code understanding, porting, and debugging due to significant differences between component-based implementations and traditional native methods. It includes a main application base class, page view base class, storage base class, event base class, and loading and packaging tool base class, encapsulating common and basic functions in these base classes, while the specific page and function-related code required by the web application is implemented by their respective derived classes. This invention is convenient and quick to build, has a low learning cost, overcomes the problems of unstable common basic code and redundant code in existing component-based methods, and reduces the complexity of inter-component access and operation.

The invention discloses a regular expression matching library transplantation and optimization method and system, a medium and equipment, and belongs to the technical field of character string processing and pattern recognition. The X86 platform characteristics are shielded; the SWSIMD identifier is used as a Weixin H8000 vector branch identifier; redefining an m128 data type; all SSE instruction interfaces in the Hyperscan are counted, and an instruction function is achieved in a scalar array mode; redefining the type of the m256 data; an SWSIMD identifier is started, and Weixin H8000 vector branch support is added; a Hyperscan vector instruction is replaced, and the Hyperscan vector instruction is obtained; and replacing the basic data type operation of small bytes with the basic data type operation of large bytes. According to the method, the problem that the SSE instruction set acceleration module realized by Hyperscan default lacks general processor branch adaptation capability, so that the SSE instruction set acceleration module cannot be originally operated on the Weixin H8000 platform is solved.

This application provides a file system porting method, apparatus, device, and storage medium. The method includes: displaying a configuration interface, the configuration interface including a configuration component; receiving device parameters of a target memory input by a user for the configuration component; compiling source files of a target operating system according to the device parameters of the target memory to obtain an executable file, wherein the source files of the target operating system include source code of the target file system, and the executable file is executed by a first electronic device to instruct the first electronic device, during the initialization process of the target operating system, to determine device parameters for use by a driver program of the target file system according to the device parameters of the target memory, wherein the first electronic device is equipped with the target memory. This application can improve the porting efficiency of file systems.

The invention discloses a wind turbine generator control program generation method and device based on an Excel file. The method comprises the steps that safety rules, hardware address mapping and control equipment interaction mapping of a wind turbine generator are configured through an Excel table; the Excel table is analyzed, and a structured data file used for representing all component parameters and control logic of the wind turbine generator is generated; according to a preset conversion rule, the structured data file is converted into executable codes called by a master control function of the wind turbine generator, and the executable codes comprise an equipment parameter initialization function, a control algorithm function and a technical document generation rule; and generating a control code which can be directly executed by the wind turbine generator according to the conversion rule, and generating a technical document. By implementing the method, the development efficiency of the wind turbine generator control system can be greatly improved, the integrity of safety protection logic is ensured, and the hardware adaptation and system transplantation process is simplified.

The embodiment of the present application provides a device and method for programming and managing Flash memory, the device comprising: a kernel attribute parameter configuration module, including a general flash memory interface FlashApi partial layer configuration file, which is configured to complete the configuration of the general flash memory interface FlashApi partial layer configuration file through the received configuration information during transplantation; a basic operation code module, which is configured to implement multiple types of basic functions and provide interfaces corresponding to the corresponding functions; a tool code module, which is used to implement CPU performance configuration and provide corresponding interfaces; and a framework interface module, which is configured to downwardly call the interfaces provided by the basic operation code module and the tool code module to provide users with a variety of operation interfaces for flash memory. The embodiment of the present application can be used to freely erase and freely program Flash, and at the same time, the characteristics of each Flash are abstracted into a common interface, simplifying the implementation and transplantation of upper-level applications.

This application provides a driver porting method, apparatus, and electronic device. The driver porting method includes: determining the hardware configuration differences between the first operating system and the second operating system based on a first device tree file of a first operating system and a second device tree file of a second operating system; ensuring that both the first and second operating systems support running on the same hardware platform; adapting and adjusting the second device tree file based on the hardware configuration differences; compiling and converting a first compiled file of the first operating system to obtain a second compiled file suitable for the second operating system; and porting the source code file of the target driver from the first operating system to the second operating system based on the adapted and adjusted second device tree file and second compiled file. The technical solution of this application can achieve end-to-end automated driver porting, improving porting efficiency.