91 results about "RFIC" patented technology

To provide an antenna module incorporating an electronic component such as an RFIC. An antenna module includes a core substrate, an outermost insulating layer, and a resin layer provided between the core substrate and the outermost insulating layer and embedding therein an RFIC. The core substrate has a core layer, insulating layers and sandwiching the core layer, a through hole conductor connecting conductor layers to, an antenna layer, and feeding patterns and, a via conductor connecting the feeding pattern and a feeding pattern, and a via conductor connecting an antenna pattern and the feeding pattern. The resin layer has a conductor layer connected to the RFIC. The conductor layer is larger in thickness than the conductor layer, which makes cracks or disconnection unlikely to occur in the conductor layer while achieving fine pitch of the conductor layer.

An antenna apparatus includes a radiation shield between an antenna element and at least one radio frequency integrated circuit (RFIC) coupled to the antenna element. An antenna substrate includes a first dielectric layer having opposite first and second surfaces, and a first metallization layer attached to the second surface to form a ground plane. A base substrate includes at least one second dielectric layer having opposite third and fourth surfaces, and a second metallization layer having a first side attached to the third surface and a second side attached to the first metallization layer to form the radiation shield. The RFIC is RF coupled to the antenna element through at least one via extending through the base substrate and a coupling element within aligned openings of the first and second metallization layers.

The present application relates to the field of communications, and discloses a radio frequency circuit, a power regulation method, and an electronic device, for use in when a power measurement of a radio frequency feedback path of an electronic device is abnormal, preventing an input power of a PA from exceeding an input power threshold of the PA. The radio frequency circuit comprises: a modem, an RFIC, a PA, an antenna port, a radio frequency feedback path, and an ADC. The modem is configured to: control the RFIC to traverse output power levels to obtain the calibration values of output powers of the PA respectively corresponding to the output power levels; determine the maximum output power level of the RFIC on the basis of the calibration values of the output powers of the PA; detect whether the power measurement of the radio frequency feedback path is normal; and if the power measurement of the radio frequency feedback path is abnormal, and if an output power of the PA measured by the radio frequency feedback path is lower than the calibration values of the output powers of the PA corresponding to the output power levels, control the output power level of the RFIC to be lower than or equal to the maximum output power level.

A radio device is provided that includes a housing having a lower surface, the housing including a radio frequency integrated circuit (RFIC). The radio device includes a plurality of millimeter wave (mmW) radios in electronic communication with the processor via the RFIC, the plurality of mmW radios detachably positioned at different locations on the housing of the radio device, each mmW radio of the plurality of mmW radios configured to establish a mmW connection with one or more nodes in a mesh network. The radio device includes a connection having a fastener positioned on the lower surface of the housing of the radio device. The radio device is removably coupled with a pole via the connection, the pole housing a second radio device including a cellular radio, the second radio device connects with the processor, via a connection to the RFIC included in the housing of the radio device.

According to various embodiments, an electronic device comprises: a communication processor; at least one radio frequency integrated circuit (RFIC) connected to the communication processor; and a plurality of antennas, each of which is connected to the at least one RFIC through at least one radio frequency front-end (RFFE) circuit and configured to transmit a signal corresponding to at least one communication network, wherein the communication processor may identify information related to strength of a reception signal received through each of the plurality of antennas, identify the maximum transmittable power set corresponding to a transmission path for each of the plurality of antennas, and control the electronic device such that a transmission signal to be transmitted through at least one antenna selected from among the plurality of antennas at least based on the identified information related to the strength of the reception signal and maximum transmittable power.

An antenna module implemented as a multi-layered package includes: a printed circuit board (PCB) having a plurality of layers; a radio frequency integrated circuit (RFIC) disposed on a first surface among outermost surfaces of the PCB; a first array antenna disposed on a second surface, perpendicular to the first surface, among the outermost surfaces of the PCB; a second array antenna disposed on a third surface, perpendicular to the first and second surfaces, among the outermost surfaces of the PCB; and a third array antenna disposed on a fourth surface, perpendicular to the second and third surfaces, among the outermost surfaces of the PCB. First to third signal lines connected to the first to third array antennas form first to third coplanar waveguide structures in which first to third ground regions are formed, respectively.

A wireless communication device includes a radio-frequency integrated circuit (RFIC), one or more processors including processing circuitry, and a memory storing instructions. The instructions, when executed by the one or more processors individually or collectively, cause the wireless communication device to receive, via the RFIC, a reception signal including a plurality of subcarriers, and calculate a first log-likelihood ratio (LLR) based on a frequency domain. The plurality of subcarriers include a first subcarrier and a second subcarrier adjacent to the first subcarrier. The calculation of the first LLR includes to measure a channel variation between the first subcarrier and the second subcarrier, determine a second linear detection matrix of the second subcarrier, based on the channel variation, and calculate the first LLR based on at least one of a first linear detection matrix of the first subcarrier and the second linear detection matrix. The first subcarrier is a pivot subcarrier.

An antenna device for a vehicle and a vehicle including the same are provided. The antenna device includes a printed circuit board (PCB), a plurality of antenna arrays arranged on a first surface of the PCB, a plurality of radio frequency integrated circuits (RFICs) arranged on a second surface of the PCB and electrically connected to the plurality of antenna arrays, and an intermediate frequency integrated circuit (IFIC) arranged on the second surface of the PCB to be apart from each of the plurality of RFICs by a same distance, the IFIC being electrically connected to the plurality of RFICs.

This antenna module comprises radiation elements (121, 126), an RFIC (110), a switch (105) for selecting one of the radiation elements, and power feeding wires (141, 142, 143, 145, 210). The radiation element (126) receives a high-frequency signal in a first frequency band and radiates radio waves. The radiation element (121) receives a high-frequency signal in a second frequency band higher than the first frequency band and radiates radio waves. The RFIC converts the high-frequency signal in the first frequency band into the high-frequency signal in the second frequency band. The power feeding wires (143, 210) transmit the high-frequency signal in the first frequency band to the switch. The power feeding wire (145) transmits the high-frequency signal in the first frequency band from the switch to the radiation element (126). The power feeding wire (142) transmits the high-frequency signal in the first frequency band from the switch to the RFIC. The power feeding wire (141) transmits the high-frequency signal in the second frequency band converted by the RFIC to the radiation element (121).

An antenna system for beam direction adjustment and shared use of radio-frequency integrated circuit (RFIC) units includes an array antenna module including feed antenna units for producing at least one input signal, RFIC units respectively electrically connected to the feed antenna units through switching units and less in number than the feed antenna units, a control module for controlling, based on at least one antenna configuration message, some of the switching units to be switched on and the rest thereof to be switched off, and a microwave lens module for forming at least one beam in a particular direction. A feed antenna unit electrically connected to the switched-on switching unit is in a working state, and can receive a signal from the RFIC units and radiate a corresponding input signal to the microwave lens module. The antenna system greatly reduces the number of RFIC units, thereby lowering the overall cost.

A semiconductor package structure comprises a substrate with a substrate surface, a processing device electrically coupled to the substrate surface, one or more radio frequency integrated circuits (RFICs) electrically coupled to the substrate surface, and a shielding plate. The shielding plate is positioned between the one or more RFICs and the processing device and is configured to couple the one or more RFICs to a package ground via one or more conductors. The package ground has a ground voltage associated with the semiconductor package structure.

An antenna module implemented as a multi-layered package includes: a printed circuit board (PCB) having a plurality of layers; an array antenna portion including a plurality of antenna elements disposed on the PCB; a radio frequency integrated circuit (RFIC) chip bonded to a second surface of the PCB, the second surface being another outermost surface of the PCB; and a plurality of signal connection lines connected from the RFIC chip to the array antenna portion. A length of each of the plurality of signal connection lines may be a length of a connection line connected between the RFIC chip and the array antenna portion, and the plurality of signal connection lines may have the same length.

A glass substrate architecture for mounting RF components may be configured for heat dissipation. Existing millimeter wave radiofrequency (RF) systems mount the radiofrequency integrated circuits (RFICs) on a printed circuit board on the opposite side of a heat sink, making it difficult to dissipate heat away from the RFICs during operation. This architecture mounts the RFICs directly to a back side of a glass waveguide substrate, and thermally couples the top side of the RFICs to a conductive pad on the underlying printed circuit board with a thermal pathway to the heatsink. This leads to a much more effective dissipation of heat away from the RFICs and eliminates the need for additional cooling systems or throttling the performance of the radar system.

A method for calibration of a phased array antenna system with reduced set of data points for optimized calibration. A system that identifies a constant gain circle and constant phase lines from measured results and selects a set of data points therein for testing.

An electronic device including a hybrid power amplifier unit according to an embodiment disclosed herein may comprise: a communication processor for outputting a baseband signal; a radio frequency integrated circuit (RFIC) which converts the baseband signal into a plurality of radio frequency (RF) signals; and a hybrid power amplifier unit for amplifying the RF signals. The hybrid power amplifier unit may amplify a first RF signal among the plurality of RF signals according to a low load line characteristic or a high load line characteristic on the basis of the operation mode. Various other embodiments are also possible.

An antenna structure according to various embodiments is provided and may include a printed circuit board (PCB), a radio frequency integrated circuit (RFIC) disposed at a first surface of the PCB and a first antenna disposed at a second surface of the PCB, parallel to the first surface, and including a plurality of conductive patches. The antenna structure includes a dielectric layer adjacent to the second surface and arranged parallel to the second surface and a conductive layer disposed in the dielectric layer and including a plurality of openings formed in areas corresponding to the plurality of conductive patches, wherein the RFIC transmits / receives a signal having a specified frequency through the first antenna and the conductive layer.

An antenna apparatus includes a first component layer having a plurality of antenna elements forming an antenna array. A second component layer includes: (i) a plurality of RFICs coupled to the antenna elements, where each RFIC has active beamforming circuitry to adjust signals communicated with one or more of the antenna elements, and a portion of a first stage of a beamforming network (BFN); and (ii) an additional stage and a further stage of the BFN, each disposed externally of the RFICs. At least some of the RFICs include an intermediate amplifier coupled between the additional and further stages of the BFN.

Some embodiments of the invention provide an Al-enabled method for integrated circuit (IC) architecture discovery, circuit topology and parameter optimization. The method of some embodiments explores the high dimensional design space beyond human intuition and extracting circuit features, configurations and designs unidentifiable to human experts in a variety of tasks. The method of some embodiments is used for RFIC architecture discovery, circuit topology and parameter optimization. For instance, the method of some embodiments provides an automated design flow for RFICs (e.g., RF or mmWave IC) that allows: (1) architecture selection, (2) circuit topology optimization, (3) parameter optimization, and (4) inverse design EM synthesis in a non-intuitive design space. In some embodiments, the method automates the synthesis of high-performance power amplifier (PA) circuits for transmitter systems, leveraging a combination of reinforcement learning (RL) and inverse design to optimize respectively active and passive components in the design. Some embodiments of the invention provide an Al-enabled method for integrated circuit (IC) architecture discovery, circuit topology and parameter optimization. The method of some embodiments explores the high dimensional design space beyond human intuition and extracting circuit features, configurations and designs unidentifiable to human experts in a variety of tasks. The method of some embodiments is used for RFIC architecture discovery, circuit topology and parameter optimization. For instance, the method of some embodiments provides an automated design flow for RFICs (e.g., RF or mmWave IC) that allows: (1) architecture selection, (2) circuit topology optimization, (3) parameter optimization, and (4) inverse design EM synthesis in a non-intuitive design space. In some embodiments, the method automates the synthesis of high-performance power amplifier (PA) circuits for transmitter systems, leveraging a combination of reinforcement learning (RL) and inverse design to optimize respectively active and passive components in the design.

The invention provides a radio frequency remote electronic device and a circuit board matching method, and relates to the technical field of terminals. The invention provides a radio frequency remote electronic device. A first circuit board is provided with an SOC, an identification unit and a storage unit, and the storage unit stores a static parameter of a second circuit board and a first calibration parameter of the first circuit board; an RFIC and an identification circuit are installed on the second circuit board. The first mainboard is in communication connection with the second mainboard. The SOC downloads a second calibration parameter of the second circuit board from the server through the obtained RFIC identifier of the second circuit board; the identification unit obtains the model identifier of the second circuit board by obtaining the output data of the identification circuit. And under the condition that the static parameter is matched with the model identifier, the SOC performs function test on the radio frequency remote electronic equipment based on the first calibration parameter, the second calibration parameter and the static parameter. Therefore, the first circuit board and the second circuit board do not need to be matched one by one, and the production cost of a production line is reduced.

Provided is a user equipment including a plurality of antennas including at least first and second groups of antennas, each group respectively allocated to one of a plurality of component carriers according to layer allocation information of the plurality of component carriers, a radio frequency integrated circuit (RFIC) configured to transmit or receive a signal at frequencies of the plurality of component carriers through the plurality of antennas, and a processor configured to measure respective channel states of the plurality of component carriers, generate a request to change the layer allocation information of the plurality of component carriers, based on the channel states, and control the RFIC to transmit the request to change, to the base station.

As an embodiment of the present application, the radio frequency integrated circuit (RFIC) comprises: a transmitting circuit configured to acquire a plurality of transmitting signals; a plurality of low-noise amplifiers configured to amplify a plurality of receiving signals corresponding to the plurality of transmitting signals reflected from a target; a receiving switching circuit comprising a plurality of first ports and a first single port coupled to the plurality of low-noise amplifiers, and configured to couple one of the first ports and the first single port based on switching; and a receiving chain circuit coupled to the first single port and configured to process one of the plurality of receiving signals corresponding to the first port in the baseband.

An electronic device may include at least one communication processor, at least one radio frequency integrated circuit (RFIC) configured to provide a radio frequency (RF) signal based on a signal from the at least one communication processor, and a first RF circuit and a second RF circuit configured to process and provide the RF signal. The at least one communication processor may be configured to control at least part of the electronic device to allow the first RF circuit to process at least one first RF signal provided from the RFIC, in an over-temperature state, identify that a sum of times when the first RF circuit processes the at least one first RF signal is at least the value of a designated period, and based on the sum of the times when the first RF circuit processes the at least one first RF signal being at least the value of the designated period, stop use of the first RF circuit and control at least part of the electronic device to allow the second RF circuit to process at least one second RF signal provided from the RFIC. Other various embodiments are possible as well.

Disclosed herein is a wireless module that includes an oscillation circuit component and an RFIC mounted on a multilayer substrate. The oscillation circuit component includes a clock terminal and a first ground terminal. The RFIC has a second ground terminal that supplies a ground potential to a clock circuit therein and a third ground terminal that supplies a ground potential to an RF circuit therein. The multilayer substrate includes a first conductor layer positioned closest to the plurality of pad electrodes of the RFIC and including a first ground pattern connected to the first and second ground terminals and a second ground pattern connected to the third ground terminal. The first and second ground patterns form a gap between the second and third ground terminals in a plan view as viewed in a stacking direction of the multilayer substrate.

The invention discloses a feed baseband rapid dynamic frequency offset compensation method and device. The device comprises a baseband unit and a radio remote unit. The baseband unit is responsible for frequency offset estimation and compensation amount calculation, the remote radio unit is composed of a CPU, an FPGA and an RFIC, the FPGA is used for digital intermediate frequency processing and a forward transmission interface, and the CPU completes parameter updating of an uplink numerical control oscillator and a downlink numerical control oscillator according to compensation information and achieves frequency offset correction of intermediate frequency signals so as to complete frequency offset compensation; then, the CPU controls the FPGA to send a real-time response message, and feeds back a compensation execution completion state to the baseband unit to form closed-loop control; according to the method, the special control frame is constructed in the eCRPI interface, so that the real-time dynamic compensation of the satellite feed baseband frequency offset is realized, and the stability and the high reliability of a satellite-ground link in a high-speed moving environment are ensured.

A radio frequency integrated circuit (RFIC) is described. The RFIC includes a switch field effect transistor (FET) including a source region, a drain region, a body region coupled to a body resistor, and a gate region coupled to a gate resistor. The RFIC also includes a dynamic bias control circuit. The dynamic bias control circuit includes at least one transistor coupled to the body region of the switch FET through the body resistor and coupled to the gate region of the switch FET through the gate resistor. The at least one transistor is an RF silicon on insulator (SOI) device. The dynamic bias control circuit also includes a capacitor coupled to the gate resistor and the body resistor and coupled in parallel with each transistor in the dynamic bias control circuit.

An electronic device according to an embodiment of the present disclosure may comprise: a processor; a memory electrically connected to the processor; a power management integrated circuit (PMIC) electrically connected to the processor; a radio frequency integrated circuit (RFIC) electrically connected to the processor; a power supply module including a power supply electrically connected to the PMIC and the processor; a front-end module including circuitry\electrically connected to the PMIC, the RFIC, and the power supply module, and is configured to modulate and amplify an RF signal received from the RFIC; a variable notch filter electrically connected to the power supply module and the front-end module, and connected to a transmission signal amplifier of the front-end module and configured to remove a harmonic frequency; and an antenna electrically connected to the front-end module, wherein the processor is configured to: control the PMIC and the power supply module to supply power to the front-end module; control a wireless communication operation to be performed using multiple frequency bands; and based on performing the wireless communication operation using the multiple frequency bands, control impedance of the variable notch filter to adjust a frequency removal band of the variable notch filter based on a parameter pre-stored in the memory.

An antenna module implemented as a multi-layered package includes: a printed circuit board (PCB) having a plurality of layers; a radio frequency integrated circuit (RFIC) disposed on a first surface among outermost surfaces of the PCB; a first array antenna disposed on a second surface, perpendicular to the first surface, among the outermost surfaces of the PCB; a second array antenna disposed on a third surface, perpendicular to the first and second surfaces, among the outermost surfaces of the PCB; and a third array antenna disposed on a fourth surface, perpendicular to the second and third surfaces, among the outermost surfaces of the PCB. First to third signal lines connected to the first to third array antennas form first to third coplanar waveguide structures in which first to third ground regions are formed, respectively.

A system for phase alignment includes a radio frequency integrated circuit (RFIC) having a phase locked loop (PLL) circuit and a missing pulse detection circuit, the missing pulse detection circuit configured to detect a missing pulse from a reference clock source and generate a detection pulse signal, and a counter reset circuit connected to the missing pulse detection circuit, the counter reset circuit configured to generate a counter reset signal in response to the detection pulse signal, the counter reset signal configured to establish an absolute time and frequency reference for the PLL circuit.

A mobile communication device includes a processor positioned on a first printed circuit board, a radio frequency integrated circuit (RFIC), and an antenna module. The antenna module includes a second printed circuit board, a first antenna and a second antenna positioned on the second printed circuit board, and a plurality of front-end chips positioned on the second printed circuit board. The plurality of front-end chips include a first front-end chip electrically connecting the RFIC and the first antenna, and a second front-end chip electrically connecting the RFIC and the second antenna.