1504results about "Oscillations generators" patented technology

An output drive circuit includes: a totem-pole output including: a high-side transistor (HST) with drain and source, an output stage power supply voltage applied to the drain, the source connected to the first node (N1); and a low-side transistor with source and drain, a ground voltage applied to the source, the drain connected to N1; and a bootstrap part including a capacitor supplying charge to a gate of HST when on, the charge being charged when HST is off, and one terminal of the bootstrap part connected to N1, the output drive circuit further including: a first transistor (T1) that conducts when HST is to be on, T1 connected between a drive circuit power supply voltage and the gate of HST; and a second transistor conducting when HST is to be turned on, the second transistor connected between the other terminal of the capacitor and HST gate.

A temperature control device includes a temperature detector, a difference operation unit, a controller, a saturation processing circuit unit, a rewritable storage unit, and a conversion unit. The difference operation unit operates a digital value corresponding to a difference value between a detected temperature value and a target temperature. The controller calculates a manipulated variable using the digital value operated by the difference operation unit. The saturation processing circuit unit includes a digital circuit to limit an output value of the controller to a pre-set upper limit value. The rewritable storage unit stores the upper limit value read from a storage area of the rewritable storage unit and input into the saturation processing circuit unit. The conversion unit converts the output value of the saturation processing circuit unit into an analog signal to output the converted value as a control command value to the heater.

An even harmonic multiplier employing complementary current reuse is disclosed. The even harmonic multiplier employs supply voltage and current density scaling to reduce power consumption. Further, by using complimentary NMOS and PMOS transistors, the even harmonic multiplier achieves high areal efficiency. Current reuse causes a reduction in noise at the first harmonic, as the corresponding first harmonic currents from the NMOS and PMOS transistors are in opposite, i.e., canceling, directions. Complementary current reuse is now feasible, as the performance of PMOS transistors at current process nodes is similar to those of NMOS transistors, with appropriate sizing leading to approximately equivalent transconductances. Multiple even harmonic multiplier configurations are possible, with many using transformer circuits at the input and / or the output. The resultant even harmonic multipliers find ready application in millimeter wave radio frequency receivers. The most common even harmonic multiplier is a frequency doubler, which produces a strong second harmonic signal.

A magnetron and microwave heating device, wherein the magnetron includes a tube core (21), a first tube shell (21a), a second tube shell (21b), an output ceramic (22), an antenna cap (23), and an antenna (24), wherein the first tube shell (21a), the tube core (21), the second tube shell (21b), the output ceramic (22), and the antenna cap (23) are connected in sequence, and the antenna (24) enters the tube core (21), passes through the second tube shell (21b) and the output ceramic (22), and enters the antenna cap (23), a height H1 of the second tube shell (21b) relative to the tube core (21) is 14 mm or less, and a ratio of the height H1 of the tube core (21) to the height H2 of the output ceramic (22) is within a range of 0.4 to 2.3.

A magnetron and microwave heating device, wherein the magnetron includes a tube core (21), a first tube shell (21a), a second tube shell (21b), an output ceramic (22), an antenna cap (23), and an antenna (24), wherein the first tube shell (21a), the tube core (21), the second tube shell (21b), the output ceramic (22), and the antenna cap (23) are connected in sequence, and the antenna (24) enters the tube core (21), and then enters the antenna cap (23) sequentially through the second tube shell (21b) and the output ceramic (22), and a height H1 of the second tube shell (21b) relative to the tube core (21) is 14 mm or less, and a ratio H1 / S of the height H1 of the tube core (21) to a cross-sectional area S of the antenna (24) is within a range of 0.4 to 3.3.

A phase lock loop includes a clock multiplier configured to receive a reference clock and output a multiplied clock; a phase detector configured to receive the multiplied clock and a divided clock and output a phase error signal; a loop filter configured to receive the phase error signal and output a control signal; a controllable oscillator configured to output an output clock in accordance with the control signal; and a clock divider configured to receive the output clock and output the divided clock, wherein the clock multiplier is either a frequency doubler or a frequency quadrupler, and a frequency response of the loop filter comprises a first notch at the frequency of the reference clock and a second notch at twice the frequency of the reference clock.

The invention discloses a low-power-consumption radiation-resistant quadrature voltage-controlled oscillator based on an SOI (Silicon On Insulator) process, relates to the technical field of quadrature voltage-controlled oscillators, and is used for solving the technical problems that an existing quadrature voltage-controlled oscillator is low in radiation resistance in a harsh radiation environment and does not have the characteristic of low power consumption. The invention discloses a low-power-consumption anti-radiation quadrature voltage-controlled oscillator based on an SOI process. The low-power-consumption anti-radiation quadrature voltage-controlled oscillator comprises a first voltage-controlled oscillator, a second voltage-controlled oscillator, a first tail filter and a second tail filter, the first voltage-controlled oscillator and the second voltage-controlled oscillator respectively form an LC resonant cavity with a parasitic capacitor of an inductor and a varactor through the inductor; the first tail filter is connected with the first voltage-controlled oscillator, and the second tail filter is connected with the second voltage-controlled oscillator; two inductors of the first tail filter and the second tail filter are coupled; lC resonant cavities of the first voltage-controlled oscillator and the second voltage-controlled oscillator output oscillation waveforms, and negative impedance is formed through configured transistor pairs, so that the waveforms are output constantly.

A CTAT circuit that generates a CTAT current. The circuit includes two SOI transistors of a first conductivity type arranged in a current mirror configuration where the gates of the two transistors and the back gate contact of one of the transistors is connected to the drain of the other transistor. The SOI transistor of the first conductivity type whose back gate contact is connected to the drain of the other SOI transistor of the first conductivity type is located in current path that carries a CTAT current. In some embodiments, the drains of the two transistors are each coupled to a drain of a respective one of a second pair of SOI transistors of a second conductivity type, where the second pair of SOI transistors are also configured in a current mirror configuration.

The invention discloses a differential magnetic coupling millimeter wave terahertz frequency multiplier, which comprises differential paths, the differential paths are used for transmitting differential signals to grids of active transistors, and the two differential paths enhance forward differential mode signals through magnetic coupling and inhibit reverse leakage common mode signals at the same time. According to the invention, the differential channels of the frequency multiplier are magnetically coupled, so that differential-mode signals are enhanced, common-mode signals are suppressed, and the output power, the efficiency and the harmonic suppression ratio of the frequency multiplier are improved.

The invention provides a design method and system of a high-speed RC clock system. The system comprises a high-speed RC oscillator, a reference clock module, a clock calibration module, a trigger module and a state machine module. The method comprises the following steps of: controlling a calibration process through a state machine module, counting a high-frequency clock signal by taking a theoretical count value as a reference after a clock calibration module is triggered, judging whether the frequency has deviation or not and the direction of the deviation according to a counting result, performing stepping adjustment on a calibration value, and performing frequency adjustment on a high-speed RC oscillator. And circularly executing the calibration step until the counting result falls into an allowable error range. A phase-locked loop circuit does not need to be additionally arranged, high and low temperature calibration in the production stage does not need to be introduced, the chip design complexity, the manufacturing cost and the production test cost can be effectively reduced, meanwhile, high precision and stability of clock signals are ensured, and output of a low-cost, high-frequency and high-precision RC clock is achieved.

The embodiment of the invention provides a voltage-controlled oscillator, an oscillator circuit, a chip and electronic equipment, relates to the technical field of communication or radar detection, and can improve the linearity of the voltage-controlled oscillator. The voltage-controlled oscillator comprises a voltage-controlled oscillator resonant cavity, an even harmonic generator circuit and a self-mixing frequency tripler circuit. The voltage-controlled oscillator resonant cavity comprises a voltage transformation diode array and a first-stage mode switching capacitor. The even harmonic generator circuit comprises a group of cross coupling tubes, one end of each cross coupling tube is electrically connected to the two differential ends of the voltage-controlled oscillator, and the even harmonic generator circuit serves as an even harmonic generator and is electrically connected to the self-mixing frequency tripler circuit. The self-mixing frequency tripler circuit comprises a differential unit and a resonant cavity, and one end of the self-mixing frequency tripler circuit is electrically connected to the even harmonic generator circuit. The low-frequency voltage-controlled oscillator and the self-mixing frequency tripler circuit achieve current multiplexing, the even harmonic generator circuit serves as a negative resistor of the oscillator and also serves as an even harmonic generator of the self-mixing frequency tripler, and the linearity of the millimeter wave frequency source is improved.

A superconducting quantum circuit apparatus includes a qubit; and a first wiring with a wiring used as a transmission of a signal to generate a magnetic flux to be applied to the qubit and a wiring used as a transmission of a signal input by capacitive coupling to and / or output, by capacitive coupling from the qubit, combined together thereinto, as a single wiring.

An electronic device may include wireless circuitry having an oscillator. The oscillator can include a first transistor having a source-drain terminal coupled to a tail node, a second transistor having a source-drain terminal coupled to the tail node, a first coil having a first terminal coupled to the tail node and having a second terminal coupled to a power supply line, and a second coil inductively coupled to the first coil. The first and second coils can be part of a balun. The balun can be coupled to a tunable capacitance. The tunable capacitance can include multiple differential switchable capacitor circuits. The balun and the tunable capacitance can form a balun phase noise filter configured to reduce a phase noise associated with the oscillator.

Technologies directed to a frequency multiplier circuit of a customer terminal (CT) for doubling and tripling a frequency of a local oscillator are described. One communication device includes a local oscillator (LO) to generate a first differential signal having a first frequency and a frequency multiplier circuit to generate a second differential signal having a second frequency that is double the first frequency or a third differential signal having a third frequency that is triple the first frequency. The frequency multiplier circuit includes a variable capacitance circuit that is programmable to one of multiple capacitances and a variable inductance circuit that is programmed to a first inductance for the second differential signal and to a second inductance for the third differential signal.

The invention relates to the technical field of radio frequency integrated circuits, and discloses a low-noise voltage-controlled oscillator circuit which comprises a source electrode following low-noise bias circuit with digital calibration, a source electrode following low-noise bias circuit with digital calibration, a source electrode following low-noise bias circuit with digital calibration and a source electrode following low-noise bias circuit with digital calibration, the cross-coupled amplifier array is composed of a plurality of units, and the source electrode of the cross-coupled amplifier array suppresses low-frequency noise through a resistance-capacitance feedback network and receives a digital amplitude calibration signal so as to dynamically adjust the number of working units and stabilize the output amplitude; the amplitude self-calibration loop consists of digital logic and a peak detector; the switched capacitor unit array is provided with stable direct-current bias; and a wide linear variable capacitor array driven by the stepped bias voltage. Through deep fusion of digital and analog technologies, the phase noise is remarkably reduced, the linear tuning range is widened, the amplitude stability is ensured, the power consumption is reduced, and the method is particularly suitable for a high-performance radio frequency communication chip of the Internet of Things.

The invention discloses a low-cost precise time keeping method, system and device based on a gating circulation unit, and relates to the technical field of power grid measurement. The method is executed when the synchronous phasor measurement device cannot receive external signals, and comprises the following steps: monitoring operation parameters which influence the frequency stability of an internal crystal oscillator of the phasor measurement unit in real time; calculating a current frequency error of the crystal oscillator in real time by using a crystal oscillator frequency drift prediction model based on a gated cycle unit network based on the operation parameters; generating a time correction amount according to the current frequency error; and applying the time correction to a local clock of the phasor measurement unit to compensate the frequency drift of the crystal oscillator so as to realize accurate time keeping. According to the invention, through accurate prediction of crystal oscillator errors and lightweight software compensation, the synchronous phasor measurement device adopting a low-cost crystal oscillator can also realize long-time high-precision time keeping, the hardware cost is obviously reduced, and the reliability of power grid monitoring during the Beidou / GPS lock losing period is improved.

The invention discloses a low-power-consumption voltage-controlled oscillator based on an SOI (Silicon On Insulator) process, relates to the technical field of integrated circuit design, and is used for solving the technical problem that an existing Colpitts oscillator is too high in power consumption and cannot be applied to a low-power-consumption integrated circuit. The invention discloses a low-power-consumption voltage-controlled oscillator based on an SOI (Silicon On Insulator) process. The low-power-consumption voltage-controlled oscillator comprises a Colpitts resonance circuit, a negative resistance unit and an LC filter network, the negative resistance unit is at least provided with a pair of RC network bias NMOS transistors and a pair of cross-coupled NMOS transistors, and the drain electrodes of the RC network bias NMOS transistors are connected with the Colpitts resonance circuit; the input end of the LC filter network is connected with the source electrodes of the cross-coupled NMOS transistors; the negative resistance unit biases the NMOS transistor through the RC network to introduce a feedback path to form a C-class oscillator structure, the Colpitts resonance circuit generates a first signal, and the first signal passes through the negative resistance unit and is output after common-mode noise is filtered by the LC filter network.

The invention relates to the technical field of radio frequency integrated circuits, and discloses a dynamic bias C-type voltage-controlled oscillator based on a CMOS (complementary metal oxide semiconductor) process, the voltage-controlled oscillator adopts a C-type structure, a cross-coupled network adds two resistors and a capacitor on the basis of a cross-coupled transistor, a circuit works in the C type by adjusting bias voltage at a resistor end, and the voltage-controlled oscillator works in the C type. The C-type voltage-controlled oscillator, a tail current source, a variable capacitance network, a switched capacitor array and a fixed LC resonance network form a core structure of the C-type voltage-controlled oscillator capable of numerical control tuning and voltage-controlled tuning, so as to determine the working frequency of the circuit and realize numerical control and voltage-controlled tuning functions; and the operational amplifiers with two bandwidth modes are introduced, so that the problem of difficult oscillation starting is solved, and the oscillation starting speed and the phase noise performance in a stable state are considered at the same time.

A thermodynamic relay gadget includes a set of one or more relay oscillators, an additional relay oscillator, a bias oscillator, and an on-chip controller. Respective ones of the relay oscillators have a time dependent mass or a time dependent frequency that is controllable, by the on-chip controller. The relay gadget is configured to relay thermodynamic information in analog form between an input oscillator of a first energy-based model and an output oscillator of a second energy-based model.

The invention discloses a four-core F23 type millimeter wave voltage-controlled oscillator based on an intra-core common mode technology. The voltage-controlled oscillator comprises a three-coil coupling four-core class-F inductor and four voltage-controlled oscillator cores. The three-coil coupling quad-core class-F inductor comprises eight differential ports, four ports are connected with a grid electrode of a core negative resistance tube of the voltage-controlled oscillator, and the other four ports are connected with a drain electrode of the core negative resistance tube of the voltage-controlled oscillator. The negative resistance tubes of the four voltage-controlled oscillator cores are formed by NMOS tubes and PMOS tubes in an alternating mode. The voltage-controlled oscillator is in an F-type working state for differential mode current so as to improve phase noise; noise filtering is performed on the common-mode current through an intra-core natural common-mode path. According to the invention, millimeter wave frequency output with low phase noise can be realized in a compact layout.

The invention relates to the field of electronic circuit design, and discloses a numerical control crystal oscillator circuit with low noise and high stability. According to the circuit, a two-stage voltage regulator is adopted to suppress power supply noise, wide-range high-precision frequency regulation is realized through thick and thin capacitor array regulation, oscillation signal quality is ensured through automatic detection feedback and external programming double-loop control, and a special oscillation starting circuit is arranged to accelerate the starting process of a crystal oscillator. Meanwhile, targeted optimization is carried out on a core circuit and layout in the loop, and noise and distortion are further reduced. The digital controlled oscillator can effectively solve the problems that an existing digital controlled oscillator scheme is narrow in frequency modulation range, large in phase noise and the like, the characteristics of low noise, high stability, rapid starting and the like are achieved, an excellent frequency reference is provided for a wireless communication and high-precision timing system, and the digital controlled oscillator has remarkable practical value.

A system, for measuring a dielectric property of a medium, includes: a resonator; an oscillator electrically coupled to the resonator and configured to generate an electrical signal representing an oscillation of the oscillator when the resonator is disposed in a vicinity of the medium; and measuring circuitry that receives the electrical signal. The measuring circuitry determines, from the electrical signal, at least one of a resonance frequency of the resonator and a quality factor of the resonator. The measuring circuitry determines, from the at least one of the resonance frequency and the quality factor, the dielectric property of the medium.

A down-sampling function folds the thermal noise into a lower frequency band. A capacitor samples a voltage during a period of bus inactivity and supplies the sampled voltage to an input of operational amplifier in a loop filter of a phase-locked loop when the bus is active. The sampling frequency determines the reduction in thermal noise that can be achieved. The PLL generates a clock signal for a bus. A voltage generator charges the capacitor through a transistor when the bus is inactive. The transistor turns on responsive to the bus being inactive to allow the capacitor to charge and the transistor turns off responsive to the bus being active to isolate the capacitor and operational amplifier from the voltage generator. When the bus is active, the voltage across the capacitor is supplied to the operational amplifier.

The invention relates to the technical field of integrated circuits, and provides a multi-nuclear inductance-capacitance type voltage-controlled oscillator, which comprises at least two oscillation units which are symmetrically distributed and a digital control unit, wherein each oscillation unit comprises a switched capacitor array, and the oscillation units are in annular synchronous connection through a synchronous resistor; and the digital control unit is used for generating control signals for respectively controlling the oscillation units so as to control the switches of the switched capacitor arrays in the corresponding oscillation units through the control signals. According to the oscillator, the effect of improving the precision of the oscillator can be achieved by improving the precision of the switched capacitor array.

Localized heating can be provided using fixed-frequency planar transmission line resonators arranged along a main-line, and tuning an electromagnetic input signal frequency applied to the main line to selectively address and energize one or more planar resonators for also addressing and energizing one or more correspondingly located active substrate transducer heat sources for depositing heat in an adjacent active substrate. More generally, adjusting input signal frequency to select one or more planar resonators arranged along a main line can be used to selectively address and energize an electromagnetic-to-heat, an electromagnetic-to-vibration, or other transducer to controllably direct energy toward a desired transducer load.

The invention provides a clock signal synchronization circuit and system, which can be applied to the technical field of signal transmission. The circuit comprises: a first node, the first node comprising: a phase-locked loop unit configured to perform frequency multiplication on a system clock signal according to a predetermined frequency multiplication coefficient to obtain a reference clock signal; the first asynchronous storage unit is configured to write in to-be-transmitted data based on the system clock signal, read out the to-be-transmitted data based on the reference clock signal and transmit the to-be-transmitted data to a second node, and the to-be-transmitted data comprises an identification code located at an initial position; and the second node is configured to align the recovery clock signal with the to-be-transmitted data according to the identification code in the to-be-transmitted data, generate a clock reset signal, perform frequency division on the recovery clock signal according to the clock reset signal and a predetermined frequency multiplication coefficient to obtain a frequency division clock signal, and output the to-be-transmitted data based on the frequency division clock signal.

Techniques for improving acoustic resonators and resonator structures are disclosed, including filters, oscillators and systems that may include such devices. A bulk acoustic wave (BAW) resonator may comprise a substrate. The bulk acoustic wave (BAW) may further comprise a plurality of piezoelectric layers including first, second, third and fourth piezoelectric layers acoustically coupled with one another and arranged over the substrate. The first, second, third and fourth piezoelectric layers may have respective piezoelectric axis orientations. The first, second, third and fourth piezoelectric layers may have respective thicknesses. Electromechanical coupling of the bulk acoustic wave (BAW) resonator may, but need not be limited.

The invention relates to the technical field of electronic circuits, and provides a temperature compensation circuit and an RC oscillator, the temperature compensation circuit comprises a voltage control module and a clock signal generation module, the voltage control module is used for outputting a control signal to the clock signal generation module according to the environment temperature; wherein the frequency of the control signal is related to the temperature of the environment; the clock signal generation module is used for generating a clock signal according to the control signal; wherein the duty ratio of the clock signal is related to the frequency of the control signal. According to the temperature compensation circuit, the clock signal with the duty ratio changing along with the environment temperature can be generated, and the precision of an RC oscillator and other circuits under the influence of the temperature is improved.