1824results about "Dc level restoring means or bias distort correction" patented technology

A method of controlling operation of a wireless device configured in a zero intermediate frequency architecture including a DC loop and a gain loop. The method includes processing energy in a wireless medium to generate a corresponding receive signal, monitoring the receive signal via a predetermined measurement window, detecting a changed condition in the channel, holding the gain feedback control loop at a constant gain level, and operating the DC loop in an attempt to search a stable DC value for the receive signal while the gain loop is held constant. A first case is DC saturation, where the gain is held constant until DC is controlled. A second case is clear channel assessment, where a prior stored gain setting is applied to the gain loop after detecting the end of the packet. A third case is preparation for receiving an expected acknowledgement packet after transmitting a packet, where again a prior stored gain setting is applied to the gain loop and DC is searched.

A cellular wireless packet data communication system containing transmit-only endpoint devices which transmit to receive-only base stations. The system is configured to allow for large area coverage (e.g., a metropolitan area) with far fewer number base stations than are required with conventional two-way cellular systems. The base station coverage areas are configured to overlap, allowing for reception of packets at multiple base stations. A data concentrator resolves redundantly received messages. The network is configurable as a WAN, a LAN, or a combination of the two. Novel modulation techniques (e.g., a 16QAM submodulation together with a 7FSK modulation) are used such that low cost components can be used in the transmitters and receivers while achieving outstanding probability of success performance. The endpoint devices are battery operated and accordingly, are designed for low power consumption and multi-year battery life. The system is used in a variety of applications including remote monitoring and mobile communications.

A DC offset correction loop (200, 300) utilizes a peak estimator (218, 322) to determine peaks associated with a digital signal (238, 338). The peak estimator (218, 322) averages the peaks in order to estimate the DC offset. A summer (216, 326) sums the DC offset (242, 350) with the digital signal to produce a corrected output.

A closed loop feedback system is employed in a receiver to automatically compensate the communication signal from twisted pair cables for AC and DC losses. This is accomplished through the use of a reference pulse signal which is sent along with other digital information. At the receiver, the reference pulse signal is restored to its proper level through a Pulse Width Modulation (PWM)-controlled variable compensation amplifier circuit. The received reference signal is compared to a known reference value and the duty cycle of the PWM circuit is adjusted until the proper level reference signal is achieved. Thereafter, the digital signal is extracted. OFDM (Orthogonal Frequency Division Multiplexing) with pilot tones are used to maximize payload while minimizing crosstalk effects. The pilot tones locate the OFDM symbols in time while supplying compensation information concerning the transmission medium.

Methods and apparatuses for reducing DC offsets in a communication system are described. In a first aspect, a feedback loop circuit reduces DC offset in a wireless local area network (WLAN) receiver channel. The frequency response of the feedback loop circuit can be variable. In a second aspect, a circuit provides gain control in a WLAN receiver channel. The stored DC offset is subtracted from the receiver channel. First and second automatic gain control (AGC) amplifiers are coupled in respective portions of the receiver channel. In a third aspect, a feedback loop circuit reduces DC offset in a WLAN receiver channel. The feedback loop circuit includes a storage element that samples and stores receiver channel DC offset. The loop is opened, and the DC offset stored in the storage element is subtracted from the receiver channel. Circuits for monitoring DC offset, and for providing control signals for controlling the frequency response of the DC offset reducing circuits are also provided.

An average signal point amplitude detection section 15A determines an average position of I and Q components when a received QPSK modulated signal is demodulated and a threshold calculation section 15B determines threshold ths on an IQ plane based on the average signal point position of the received QPSK modulated signal and a theoretical distribution position on the IQ plane of signal points of a 16-value QAM signal. Then, a threshold decision section 14A makes a threshold-decision on the I and Q components of sequentially received QPSK modulated signals using this threshold ths and thereby calculates a simulated bit error rate of the 16-value QAM signal.

One embodiment relates to a receiver circuit for multi-level amplitude signaling which includes at least three amplitude levels for each symbol period. The receiver circuit includes a peak detector, a reference voltage generator, and a comparator circuit. The peak detector is arranged to detect a peak voltage of the multi-level amplitude signal, and the reference voltage generator uses the peak voltage to generate multiple reference voltages. The comparator circuit uses the multiple reference voltages to detect an amplitude level of the multi-level amplitude signal. Other embodiments and features are also disclosed.

A computer system with a semi-differential bus-signaling scheme is described. The computer system includes a transmitter coupled to a common bus. The transmitter sends clock signals and a data signal to logic-comparing devices within a receiver. The logic-comparing devices compare the data signal to a reference voltage while comparing the clock signals to each other. After the comparison, the clock signals can be used to capture the data into a retiming circuit.

A direct current (DC)-DC converter that includes a first switching converter and a multi-stage filter is disclosed. The multi-stage filter includes at least a first inductance (L) capacitance (C) filter and a second LC filter coupled in series between the first switching converter and a DC-DC converter output. The first LC filter has a first LC time constant and the second LC filter has a second LC time constant, which is less than the first LC time constant. The first switching converter and the multi-stage filter form a feedback loop, which is used to regulate the first switching power supply output signal based on the setpoint. The first LC filter includes a first capacitive element having a first self-resonant frequency, which is about equal to a first notch frequency of the multi-stage filter.

A radio receiver supporting cancellation of thermal and phase noise in a down-converted RF signal. An inbound RF signal and blocking signal are provided directly to a passive mixer for down-conversion into a first baseband signal having data, thermal noise, and reciprocal mixing (RM) noise components. The inbound signals are also provided to a transconductance circuit, the output of which is provided to a second passive mixer for conversion into a current signal having data and blocking signal components, and a RM image. The blocking signal component and the RM image are mixed with a second LO signal, derived from the blocking signal, to produce a RM noise cancellation signal. The data component of the current signal is converted into a second baseband signal having data and thermal noise components. The first baseband signal, second baseband signal and RM noise cancellation signal are then combined through harmonic recombination.

A method and a system for compensating for a permutation of L pairs of cable such that the compensation is localized in a trellis decoder of a receiver. The L pairs of cable correspond to L dimensions of a trellis code associated with the trellis decoder. The trellis code includes a plurality of code-subsets. The permutation of the L pairs of cable is determined. A plurality of sets of swap indicators based on the permutation of the L pairs of cable is generated. Each of the sets of swap indicators corresponds to one of the code-subsets. The code-subsets are remapped based on the corresponding sets of swap indicators.

An apparatus, method, and system for providing dc offset reduction in a communications channel include two or more feedback loops to generate dc offset correction signals, which in turn are combined with an input analog signal and a processed digital signal thereby reducing dc offset. Each feedback loop may include an adaptive filter. At least one feedback loop may be responsive to an error signal that represents the difference between the delayed input of a first detector, and its output. Further, the dc offset correction signal, partially delayed, may be added to the error signal, thereby improving the response time of the dc offset correction loop.

A television schedule system and method for displaying television schedule information on a television screen includes a program guide having a schedule information area that depicts the programs that are being presented on each channel at each time during the day. An input device allows the viewer to browse through the schedule information area and/or obtain more information about programs of particular interest. In one aspect, the viewer may watch a program on the currently-tuned channel, while browsing through the other channels on a portion of the television screen. In another aspect, the viewer may watch programs currently being shown on the television, while he or she browses through the program guide. In yet another aspect, the system includes a database, a processor and associated software for automatically customizing the television schedule guide to an individual viewer or a group of viewers, e.g., a family, to facilitate use of the television schedule.

In a method for deciding the level of an input signal, positive and negative signals are provided in response to the input signal. A peak of the positive signal is detected to provide a positive-peak value. A peak of the negative signal is detected to provide a negative-peak value. The positive signal and the negative-peak value are combined to provide a first combination signal. The negative signal and the positive-peak value are combined to provide a second combination signal. The first and second combination signals are compared to provide an output signal of zero or one.

A receiver (50) includes a self-calibrating receive path correction system for correction of I/Q gain and phase imbalances in a radio frequency signal. The system includes a signal-processing block (53), an I/Q phase imbalance detection and correction circuit (98), an I/Q gain imbalance detection and correction circuit (96), and an adaptive loop bandwidth control circuit (102). The I/Q phase imbalance detection and correction circuit (98) equalizes for the relative phase imbalance and the I/Q gain imbalance detection and correction circuit (96) equalizes for the relative gain imbalance between the I and Q channels created by the analog portion of a quadrature receiver. The adaptive loop bandwidth control circuit (102) dynamically adjusts at least one loop bandwidth for the I/Q gain imbalance detection and correction circuit (96) and the I/Q phase imbalance detection and correction circuit (98) on a slot boundary.

A multilevel optical receiver can comprise a plurality of comparators that generally correspond with the number of levels in a multilevel data stream. Each comparator can be individually controlled and fed a decision threshold in order to decode a multilevel signal. The multilevel optical receiver can generate a statistical characterization of the received symbols in the form of a marginal cumulative distribution function (CDF) or probability density function (pdf). This characterization can be used to produce a set of ε-support estimates from which conditional pdfs are derived for each of the transmission symbols. These conditional pdfs may then be used to determine decision thresholds for decoding the received signal. The conditional pdfs may further be used to continuously estimate the fidelity or error rate of the received signal without the transmission of a testing sequence. The ε-supports may further be used to automatically control the gain on the receiver.

The semiconductor integrated communication circuit includes:

a low-noise amplifier; a receive mixer; a receive VCO; a demodulation-processing circuit; a modulation-processing circuit; a transmit mixer; a transmit VCO; a second-order-distortion-characteristic-calibration circuit; a quadrature-receive-signal-calibration circuit; and a test-signal generator. The test-signal generator generates first and second test signals using the transmit VCO. In the second-order-distortion-characteristic-calibration mode, the second-order-distortion-characteristic-calibration circuit variably changes an operation parameter of the receive mixer thereby to calibrate the second-order distortion characteristic to achieve its best condition while the first test signal is supplied to the receive mixer. In the quadrature-receive-signal-calibration mode, the quadrature-receive-signal-calibration circuit calibrates IQ mismatch of a quadrature receive signal to achieve the best condition thereof while the second test signal is supplied to the receive mixer. The integrated communication circuit can minimize the increase in chip footprint of a test-signal-generating circuit used to perform calibrations of both the second-order characteristic and IQ mismatch.

A system for detecting and correcting impulse noise present on an input data signal includes an impulse detector module receiving an input data signal and producing as output an correction enable signal indicating when an impulse correction is required. An impulse corrector module receives the input data signal and a correction enable signal and produces a corrected data signal, e.g., having the impulse canceled or blanked, as output. A reliability estimator and selector module receives the corrected data signal and the input data signal and selects as output the input signal which is more reliable. In one embodiment, the impulse detector includes first and second complementary impulse detectors, the outputs of which are analyzed by an enable and correction module to produce an impulse detection signal with improved accuracy. Preferably, the enable and correction module also indicates the most appropriate type of impulse correction in accordance with the detection signals from the complementary detectors. A novel system and method of detecting impulses based on Gram Schmidt techniques is also presented. In this method, one or more channels of a multi-channel data signal are kept free of data. When a whitening filter is applied, impulses on these quiet channels are emphasized. The Gram Schmidt technique exploits this fact to provide for improved impulse detection. The system can be modified to detect other types of low dimensionality noise.