204results about "Negative-feedback-circuit arrangements" patented technology

A system and method are used to maintain a variance in feedback factors of an amplifier between the first and second phases either below a threshold value or within a specified range. The system includes the amplifier and first through third capacitances. The amplifier is coupled between an input node and an output node that operates during first and second phases of operation. The first capacitance is coupled across the amplifier and between the input node and the output node during the first and second phases of operation. The second capacitance is coupled to the input node during the first phase of operation. The third capacitance is coupled to one of the input and output nodes during one or both of the first and second phases of operation.

The utility model relates to the technical field of satellite navigation, in particular to a satellite navigation anti-interference signal intensifier, which comprises a receiving antenna, a prefilter, a fixed amplification module and an automatic gain module which are sequentially connected, the output end of the fixed amplification module is further connected with a control module, and the control module comprises a peak value detection unit and a switch control unit. Two output ends of the switch control unit are connected with a control end of the automatic gain module, the peak detection unit is used for detecting a signal peak value, and the switch control unit controls the amplification factor of the automatic gain module based on the signal peak value output by the peak detection unit. According to the utility model, the prefilter is used for filtering interference signals, then the peak value detection unit is used for judging the magnitude of the signals, and then the switch control unit is used for selecting different resistors, so that the amplification factor of the automatic gain module is changed, the signals are enhanced, the final signals are in a proper range, subsequent signal processing is facilitated, and the practicability is higher.

The invention discloses a high-linearity low-noise amplifier based on harmonic suppression, relates to the field of communication and the technical field of electronic devices, and is used for solving the problem that the noise coefficient of an existing Darlington structure is large. Comprising a noise matching and input matching network, a linearity enhancement structure, a negative feedback structure and a pre-distortion structure. Wherein the linearity enhancement structure at least comprises a first amplification transistor and a second amplification transistor which are arranged in parallel, and is used for improving the linearity of the circuit through harmonic cancellation; the negative feedback structure is connected with the noise matching and input matching network and the pre-distortion structure and is used for expanding circuit bandwidth and optimizing output matching; the pre-distortion structure is used for stabilizing the bias voltage of the third amplification transistor. According to the invention, the linearity of the whole circuit is effectively improved, and the source microstrip lines of the two circuits are utilized to improve the minimum noise matching and improve the noise performance. Noise is reduced, linearity is improved, low-frequency gain is suppressed, and bandwidth of the whole circuit is improved.

Provided is a buffer circuit that can realize a wide dynamic range, a reduced area, and a reduced power consumption amount while maintaining low output impedance. The buffer circuit includes a first transistor, a current source, a second transistor, an output terminal, and first and second capacitors. The first transistor has a gate to which an input signal is input. The current source is connected to one terminal of the first transistor. The second transistor is connected to the other terminal of the first transistor. The output terminal is connected to the one terminal or the other terminal of the first transistor. The first and second capacitors are between the current source and the gate of the second transistor. The first transistor, the second transistor, and the first capacitor form a first feedback circuit. The first transistor, the current source, and the second capacitor form a second feedback circuit.

Provided are an audio playing module and an audio processing circuit thereof, and an electronic device, which belong to the technical field of electronics. In the audio processing circuit, by adding a feedback control circuit between a power circuit and an audio amplifier, the feedback control circuit can control, according to a change in the amplitude of an audio signal received by the audio amplifier, the power circuit to adjust a power supply voltage provided for the audio amplifier. Thus, when the amplitude of the audio signal changes, an appropriate power supply voltage can be matched for the audio amplifier by means of the feedback control circuit, thereby solving the problem of the audio playing module generating whistling when the amplitude of the audio signal changes, and thus optimizing the sound quality of played sounds.

The invention provides an error amplifier for peak current mode control and a converter system. The error amplifier comprises a transconductance amplifier, a voltage clamping module, a voltage-current converter, a slope compensation module, a current clamping module and a mirror image tube, the negative end of the transconductance amplifier is used for loading feedback voltage, and the positive end is used for loading reference voltage; the output end of the transconductance amplifier, the output end of the voltage clamping module and the input end of the voltage-current converter are electrically connected; the voltage-current converter generates error current; the slope compensation module is used for performing slope compensation on the error current to generate a compensated current; the output end of the slope compensation module, the output end of the current clamping module and the positive end of the high-side comparator are electrically connected with a second reference node; and the mirror image tube is used for loading the comparison voltage to the positive end of the high-side comparator. The error amplifier provided by the invention can realize more stable mode switching and more accurate current limiting control.

A signal processing device comprises an amplifier, a first switch assembly, a second switch assembly and a microcontroller. The first switch assembly is configured to receive a first signal; the second switch assembly is configured to receive a second signal; when the microcontroller is configured to turn on the first switch assembly, the first switch assembly is configured to transmit the first signal to the amplifier; when the microcontroller is configured to turn on the second switch assembly, the second switch assembly is configured to transmit the second signal to the amplifier.

In an embodiment, a method includes connecting a first subset of a set of stages of a power amplifier to a supply voltage, connecting a second subset of the set of stages to a reference voltage different than the supply voltage, switching a third subset of the set of stages according to a switching frequency, assigning numbers of stages in the first subset, the second subset, and the third subset based on a power requirement of the power amplifier, and amplifying a transmit signal using the first subset, the second subset, and the third subset to generate an amplified transmit signal.

An amplifier device may include a signal input for receiving a reference signal and amplifier circuitry. The amplifier device has a feed-forward signal path providing a feed-forward signal. First signal combining circuitry is configured to generate an error signal representative of a difference between the reference signal and a signal proportional to an amplified signal. Signal processing circuitry is configured to process the error signal to obtain a first signal. Second signal combining circuitry is configured to combine the first signal and the feed-forward signal to obtain a combined signal which is applied to an input of the amplifier circuitry. The signal processing circuitry has a limiter coupled to a loop filter. The limiter is configured to limit an amplitude of a second signal to a predetermined value thereby obtaining a limited signal. The loop filter is configured to obtain the first signal based on the limited signal.

The present application provides a kind of power amplifier circuit and semiconductor device.Power amplifier circuit has the 1st amplifier of signal distribution from input signal is amplified, the 2nd amplifier of signal with different phase is amplified, the 3rd amplifier, the 4th amplifier and matching circuit, matching circuit has: the 1st wiring, with the output terminal of the 1st amplifier is connected with the 1st end and the input terminal of the 3rd amplifier is connected with the 2nd end;The 2nd wiring, with the input terminal of the 3rd amplifier is connected with the 1st end and the 2nd end of power supply is connected, and with the 1st wiring is electromagnetically coupled;The 3rd wiring, with the output terminal of the 2nd amplifier is connected with the 1st end and the input terminal of the 4th amplifier is connected with the 2nd end;And the 4th wiring, with the input terminal of the 4th amplifier is connected with the 1st end and the 2nd end of power supply is connected, and with the 3rd wiring is electromagnetically coupled.

The invention provides a current multiplexing type output amplifier. The current multiplexing type output amplifier comprises a current multiplexing type input stage, a first self-biased diode pair, a second self-biased diode pair, a first AB type output stage and a second AB type output stage, wherein the first self-biased diode pair and the second self-biased diode pair are connected with the current multiplexing type input stage; the first AB type output stage is connected with the first self-biased diode pair; according to the invention, two self-biased diode pairs are adopted to replace a floating voltage source in the prior art. When a large pulse signal is input, one diode in each of the two diode pairs is in a cut-off state, transient change current I only flows into or out of the output end from a certain branch, and compared with a traditional amplifier, the slew rate is multiplied under the same bias current condition. In addition, the input stage adopts a current multiplexing type architecture combining a PMOS (P-channel Metal Oxide Semiconductor) and an NMOS (N-channel Metal Oxide Semiconductor), under the same bias current, the equivalent input transconductance is the sum of the transconductance of the PMOS and the transconductance of the NMOS, and the unity gain bandwidth is also multiplied.

A reception apparatus includes a reception circuit configured to receive reception signals, and a control circuit configured to control the reception signals to be input to the reception circuit by executing a feedback control according to a current consumption of the reception circuit.

Low noise amplifier (LNA) architectures addressing the parasitic challenges in the circuit in order to meet the high gain and bandwidth requirement at higher frequencies are disclosed. The described LNAs include cascode transistors and implement a tunable inductor (Lgate) in series with the gate terminal of a transistor (M2) of the cascode transistors to improve the gain and bandwidth of the LNAs and achieve high gain wideband switching LNAs.

The utility model discloses a digital signal processor (DSP) sampling conditioning circuit, which relates to the technical field of digital signal processing, and is characterized in that the output end of a voltage stabilizing circuit is connected with the input end of an anti-phase proportion operation circuit, and the output end of the anti-phase proportion operation circuit is connected with one input end of an adder circuit; the other input end of the adder circuit is connected with the output end of the sensor, and the output end of the adder circuit is connected with the input end of the DSP. According to the utility model, the measurement precision of the DSP can be improved.

A power amplifier circuit includes a first transistor, a second transistor, and a biasing circuit. The first transistor has a base configured to receive a first signal. The second transistor has an emitter connected to a collector of the first transistor, and a collector configured to output a second signal. The biasing circuit is coupled to the first transistor and the second transistor. The biasing circuit is configured to provide a direct current (DC) voltage at the collector of the second transistor that is about twice a DC voltage at the collector of the first transistor. The biasing circuit is configured to provide an alternating current (AC) or radio frequency (RF) voltage at the collector of the second transistor that is about twice an AC or RF voltage at the collector of the first transistor.

Provided are feedforward amplifier circuit, audio amplifier and audio playing device, including: a main amplifier circuit, an adder circuit, a sub-amplifier circuit and a subtractor circuit, wherein the main amplifier circuit adds distortion to a first input signal to output a distorted signal, and inputs the distorted signal to the adder circuit and the subtractor circuit for performing feedforward correction; the sub-amplifier circuit amplifies a second input signal and serves as a positive input of the subtractor, so that a signal gain output by the subtractor is equal to a signal gain of the main amplifier; the subtractor circuit, with the distorted signal as a negative input, reversely amplifies the distorted signal and afterwards performs feedforward; and the adder circuit superimposes the distorted signal output by the main amplifier circuit and the reversely amplified distorted signal output by the subtractor, so as to output a distortion-free signal.

The application belongs to the technical field of integrated circuits, and specifically discloses a digital control programmable gain amplifier chip, which adopts an SIP packaged operational amplifier, a digital potentiometer, an input end Vin and an output end Vout, an alternating current signal is input from the Vin end, is connected to the inverting input end of the operational amplifier through a capacitor C1 and an input resistor R1, a positive power supply pin of the operational amplifier is connected to a positive electrode VDD of a power supply, a negative power supply pin is connected to the ground, a same-phase input end obtains a VDD / 2 direct current bias voltage through a precision resistor voltage dividing network and is connected after low-pass filtering, a high end of the digital potentiometer is connected to the Vout end, a low end is connected to the inverting input end of the operational amplifier, and a feedback path is formed through a sliding end. The operational amplifier and the digital potentiometer are integrated, high integration and modularization of the programmable gain amplification circuit are realized, and the problems of insufficient gain precision, decreased reliability of a multi-element system and large circuit volume caused by the on-resistance of an analog switch in a traditional discrete scheme are solved.

A compensation circuit of realizing equivalent capacitance amplification is provided. The compensation circuit includes an error amplifier, a resistor and a capacitor. A first terminal of the resistor is connected to a first output terminal of the error amplifier. A second terminal of the resistor is connected to a second output terminal of the error amplifier and the capacitor. An amplified error current signal outputted from the first output terminal of the error amplifier flows through the resistor, and is then divided into a capacitor charging signal and an error amplified reverse current signal. The capacitor charging signal flows to the capacitor. The error amplified reverse current signal flows through the second output terminal of the error amplifier into the error amplifier. The error amplified reverse current signal is larger than the capacitor charging signal.

The present disclosure relates to a 5G communication system or a 6G communication system for supporting higher data rates beyond a 4G communication system such as long term evolution (LTE). A low noise amplifier (LNA) in a wireless communication system according to an embodiment of the disclosure includes a first transistor and a first feedback transformer in which a gate of the first transistor is connected to a primary coil of the first feedback transformer and a source of the first transistor is connected to a secondary coil of the first feedback transformer. The first feedback transformer is configured to implement positive feedback to maintain an in-phase signal at the gate of the first transistor and the source of the first transistor.

The invention provides a photoelectric front-end amplifying circuit and photoelectric imaging equipment, the photoelectric front-end amplifying circuit comprises an amplifying module and a T-shaped feedback module, differential input signals are amplified through the amplifying module, and differential output signals are output outwards; the T-type feedback module is connected in series between the input end and the output end of the amplification module, the gain of the amplification module is adjusted through a pseudo resistor in the T-type feedback module, and the linear dynamic range of the whole circuit is expanded through a quasi floating gate structure in the T-type feedback module. The T-type feedback module is arranged between the input end and the output end of the amplification module, the wide-range adjustable feedback resistance value is achieved through a pseudo resistor of a gated PMOS tube, and the output current requirements of various detectors are met; through the quasi-floating gate and quasi-floating N-Well technology, high-frequency noise introduced by high-order distortion and junction capacitance is remarkably suppressed, and the linear dynamic range is widened; the T-type feedback module is low in noise, wide in bandwidth and low in power consumption; the circuit integration level is high and the silicon wafer area is compact.

This application provides an operational amplifier, a chip, and an electronic device, and relates to the field of integrated circuit technologies. The operational amplifier includes a first power voltage end, a second power voltage end, a first-stage operational amplification circuit, and a second-stage operational amplification circuit. The first power voltage end is configured to receive a first power voltage signal, the second power voltage end is configured to receive a second power voltage signal, and a voltage value of the first power voltage signal is greater than a voltage value of the second power voltage signal. The first-stage operational amplification circuit is configured to: receive an input signal via a signal input end, and amplify the input signal under enabling control of the first power voltage signal, to generate a first drive signal. The second-stage operational amplification circuit is configured to: generate an output signal based on the first drive signal under enabling control of the second power voltage signal, and output the output signal via a signal output end. The operational amplifier has performance like low noise, low power consumption, high rate, and small area, and can be used in a chip.

A system-on-chip contactless physiological sensor (10) is provided which comprises a capacitive-sensor electrode (14) having a first capacitance (C1) and an amplifier device (18) connected to the capacitive-sensor electrode (14), the capacitive-sensor electrode (14) and amplifier device (18) at least in part forming an amplifier circuit for the physiological sensor (10). An artefact-reducing capacitor (20) is then connected in series between the capacitive-sensor electrode (14) and an input of the amplifier device (18), the artefact-reducing capacitor (20) having a second capacitance (C2) which is less than the first capacitance (C1). In this sensor (10), there is no impedance boosting input between the capacitive-sensor electrode (14) and the input of the amplifier device (18).

This application provides an operational amplifier, a chip, and an electronic device, and relates to the field of integrated circuit technologies. The operational amplifier includes a first power voltage end, a second power voltage end, a first-stage operational amplification circuit, and a second-stage operational amplification circuit. The first power voltage end is configured to receive a first power voltage signal, the second power voltage end is configured to receive a second power voltage signal, and a voltage value of the first power voltage signal is greater than a voltage value of the second power voltage signal. The first-stage operational amplification circuit is configured to: receive an input signal via a signal input end, and amplify the input signal under enabling control of the first power voltage signal, to generate a first drive signal. The second-stage operational amplification circuit is configured to: generate an output signal based on the first drive signal under enabling control of the second power voltage signal, and output the output signal via a signal output end. The operational amplifier has performance like low noise, low power consumption, high rate, and small area, and can be used in a chip.

This application provides an output amplifier circuit and an arbitrary waveform generator, belonging to the field of electronic circuit technology. The output amplifier circuit includes: a radio frequency amplifier circuit, including a first common-emitter amplifier sub-circuit and a second common-emitter amplifier sub-circuit, for amplifying high-frequency signals in the AC input signal from the input node; the second common-emitter amplifier sub-circuit includes a second transistor, the collector of which is connected to the output node through a current-sampling resistor; an output bias voltage circuit for superimposing an output bias voltage onto the output node; a static bias voltage circuit for providing a static bias voltage to the second transistor and outputting a reference voltage to the integrator circuit; a feedback amplifier circuit for outputting a feedback signal based on the static operating current of the second transistor; and an integrator circuit for outputting an integrated signal based on the reference voltage and the feedback signal. This output amplifier circuit can solve the problems of small output bias voltage range and performance degradation in ultra-high bandwidth AWGs.

The application discloses a parallel negative feedback ultra-wideband low noise amplifier based on a cross knot type microstrip matching, wherein an input of the cross knot type input matching network is connected with a radio frequency signal, and an output is connected with a segmented negative feedback amplification circuit; the segmented negative feedback amplification circuit amplifies the received radio frequency signal and outputs the radio frequency signal through two ports of the cross knot type output matching network; a gate DC bias circuit and a drain DC bias circuit are connected with a gate and a drain of a transistor respectively, and are used for providing a working voltage and blocking the radio frequency signal from flowing into a power supply; and the parallel negative feedback circuit realizes a wideband characteristic by connecting a capacitor, an inductor and a microstrip line in parallel between the drain and the gate of the transistor. The application greatly improves a working bandwidth and a circuit design complexity of the circuit, simplifies a structure and reduces a volume of the circuit while improving a noise performance and a gain flatness of the low noise amplifier.

The invention belongs to the technical field of blocking capacitor matching of double transimpedance amplifiers, and discloses a blocking capacitor-based double-path transimpedance amplifier, which comprises a direct current leakage circuit module for receiving light current input from a reverse bias APD (avalanche photodiode) and converting the light current input into a current pulse signal for output; the two blocking capacitors are respectively coupled to the output end of the direct-current bleeder circuit module, receive current pulse signals output by the direct-current bleeder circuit module and respectively transmit the signals to the two negative feedback trans-impedance amplifiers which are connected in parallel; the two negative feedback type transimpedance amplifiers are connected in parallel and respectively receive the current pulse signals from the corresponding blocking capacitors and convert the current pulse signals into voltage pulse signals; and the signal fusion amplifier receives the voltage pulse signal, carries out fusion processing and then outputs a final voltage pulse signal. By means of the two blocking capacitors, the effect of resisting APD process changes is achieved, and meanwhile the core performance of the whole circuit can be adjusted by adjusting the specific value of the two capacitors.

This disclosure discloses a Class E amplifier symmetrical amplifier topology circuit for an RF generator and relates to the field of RF power amplifiers to address the problems of low efficiency and poor stability of current symmetrical amplifier topology circuits for RF generators. In the Class E amplifier symmetrical amplifier topology circuit, one input of the first power divider is connected to an output of a power supply; one output of the first power divider is sequentially connected in series with the 90-degree phase shifter, the second power divider, the first Class E matching network, and the first power combiner; the other output of the first power divider is sequentially connected in series with the third power divider, the second Class E matching network, and the second power combiner.The outputs of the first and second power combiners are each connected to a coupling terminal and an input terminal of the quadrature coupler; a co-source terminal of the quadrature coupler is connected to a load; the first Class E matching circuit and the second Class E matching circuit each have N Class E reference matching circuits; the Class E reference matching circuit has an input matching circuit, a Class E RF power amplifier, and an output matching circuit connected in series.

The invention discloses a Ka-band broadband low-noise amplifier based on a mixed feedback mode and a design method and device thereof. The Ka-band broadband low-noise amplifier comprises an input matching network, a single-section microstrip line coupling feedback network, an inter-stage matching network, a resistance negative feedback network, a three-section microstrip line coupling feedback network and an output matching network. And an active bias network is assisted to ensure the working stability. The circuit is composed of two stages of circuits, the preceding stage circuit adopts a cascode transistor amplifier to minimize noise, and the backward stage circuit adopts a cascode structure to improve linearity and bandwidth. Simulation results show that in the frequency band of 25-40 GHz, the amplifier achieves the excellent performance that the gain is higher than 20 dB, the flatness is 0.6 dB, the noise coefficient is 1.43-1.75 dB, the output 1dB compression point is larger than 5.5 dBm, and the direct-current power consumption is only 40.6 mW. According to the low-noise amplifier, the problems of gain roll-off, high noise, limited bandwidth and the like of a traditional low-noise amplifier in broadband application are solved by innovatively combining a resistance negative feedback technology and a microstrip line coupling feedback technology.

The invention discloses a transimpedance amplification circuit and a photoelectric signal detection system. The transimpedance amplification circuit is applied to a photodiode and comprises a bootstrap input stage and a capacitance feedback transimpedance amplification stage. The bootstrap input stage comprises a bootstrap amplifier and a first coupling capacitor; the in-phase input end of the bootstrap amplifier is connected with the cathode of the photodiode, and the output end is connected with the anode of the photodiode through the first coupling capacitor to form bootstrap feedback. The capacitance feedback transimpedance amplification stage at least comprises a first-stage integral amplification circuit, and the input end of the first-stage integral amplification circuit is connected with the cathode of the photodiode. According to the circuit, approximately equal-amplitude in-phase voltage changes are generated at the two ends of a parasitic capacitor of a photodiode through bootstrap feedback, the shunt effect of the parasitic capacitor is effectively inhibited, and the noise gain of a system is reduced; and meanwhile, the integral amplification circuit directly performs high-bandwidth conversion on the current signal, so that the high-speed processing capability is guaranteed. According to the circuit, noise performance is remarkably improved while high bandwidth and high sampling rate are maintained, and collaborative optimization of high bandwidth, high sampling rate and low noise is achieved.

The utility model provides a built-in IEPE circuit used for a piezoelectric type shock wave pressure sensor, comprising a high gain amplifier, a feedback capacitor and a constant current source, the high gain amplifier is composed of an N channel enhanced field effect transistor, a P channel enhanced field effect transistor, a resistor R1, a resistor R2, a feedback resistor R3 and a resistor R4, the two ends of the high-gain amplifier are connected with the constant current source, the positive electrode of the constant current source is an output end, and the constant current source is connected to the P-channel enhanced field effect transistor; the piezoelectric sensor sensitive element is connected with the input end and receives a charge signal generated by the piezoelectric sensor sensitive element through the input end; the feedback capacitor is installed between the input end and the output end to form negative feedback to form a charge amplifying circuit, a small number of electronic components are used for constructing a complete IEPE circuit, and the charge amplifying circuit has the advantages of being high in integration level, small in size and high in anti-interference capacity and can be integrated in a sensor to amplify charge signals.