300results about "Negative-feedback-circuit arrangements" patented technology

A system and method are used to maintain a variance in feedback factors of an amplifier between the first and second phases either below a threshold value or within a specified range. The system includes the amplifier and first through third capacitances. The amplifier is coupled between an input node and an output node that operates during first and second phases of operation. The first capacitance is coupled across the amplifier and between the input node and the output node during the first and second phases of operation. The second capacitance is coupled to the input node during the first phase of operation. The third capacitance is coupled to one of the input and output nodes during one or both of the first and second phases of operation.

The invention discloses a multi-channel common-mode feedback high-gain amplification circuit. The circuit comprises a differential amplification module, an output end of which is connected with a load; the input end of the common-mode detection module is connected with the output end of the differential amplification module; the first input end of the error amplification module is connected with the output end of the common-mode detection module, and the second input end of the error amplification module receives reference voltage; and the multi-path feedback control module comprises at least two feedback branches which are connected in parallel, the input ends of the feedback branches are jointly connected with the output end of the error amplification module, the output ends of the feedback branches are respectively connected with different bias nodes in the differential amplification module, and the feedback branches have path impedance with gradient change. Through a dynamic division mechanism of a feedback branch, and in combination with a gain boosting unit and a hybrid compensation network, high-precision rapid establishment under a high-speed load is realized.

Circuits and methods for providing ESD protection, particularly for LNAs lacking a DC blocking input capacitor (“capless LNAs”). Novel circuitry provides both improved ESD protection and an improved Noise Figure compared to conventional designs. One embodiment includes an integrated circuit including a voltage source pin and a plurality of low-noise amplifiers lacking a respective DC blocking input capacitor, each of the plurality of low-noise amplifiers including: a voltage source terminal coupled to the voltage source pin, an input terminal configured to receive a signal to be amplified, an output terminal configured to output an amplified version of the received signal to be amplified, an ESD protection circuit coupled to the input terminal and to both the voltage source terminal and a reference potential, and a distributed ESD clamp coupled between the reference potential and a node located between the ESD protection circuit and the voltage source terminal.

The utility model relates to the technical field of satellite navigation, in particular to a satellite navigation anti-interference signal intensifier, which comprises a receiving antenna, a prefilter, a fixed amplification module and an automatic gain module which are sequentially connected, the output end of the fixed amplification module is further connected with a control module, and the control module comprises a peak value detection unit and a switch control unit. Two output ends of the switch control unit are connected with a control end of the automatic gain module, the peak detection unit is used for detecting a signal peak value, and the switch control unit controls the amplification factor of the automatic gain module based on the signal peak value output by the peak detection unit. According to the utility model, the prefilter is used for filtering interference signals, then the peak value detection unit is used for judging the magnitude of the signals, and then the switch control unit is used for selecting different resistors, so that the amplification factor of the automatic gain module is changed, the signals are enhanced, the final signals are in a proper range, subsequent signal processing is facilitated, and the practicability is higher.

The invention belongs to the technical field of integrated circuits, and particularly discloses a numerical control programmable gain amplifier chip, which adopts an SIP (Session Initiation Protocol) packaged operational amplifier, a digital potentiometer, an input end Vin and an output end Vout, and is characterized in that an alternating current signal is input from the Vin end and is connected to an inverted input end of the operational amplifier through a capacitor C1 and an input resistor R1; a positive power supply pin of the operational amplifier is connected with a power supply positive electrode VDD, a negative power supply pin is grounded, and a VDD / 2 direct current bias voltage is obtained by an in-phase input end through a precision resistance voltage dividing network and is accessed after low-pass filtering; the high end of the digital potentiometer is connected with the Vout end, the low end is connected with the inverting input end of the operational amplifier, and a feedback path is formed through a sliding end. The digital potentiometer and the operational amplifier are integrated, high integration and modularization of the programmable gain amplification circuit are achieved, and the problems that in a traditional discrete scheme, due to analog switch conduction resistance, gain precision is insufficient, reliability of a multi-element system is lowered, and the circuit size is large are solved.

The invention discloses a high-linearity low-noise amplifier based on harmonic suppression, relates to the field of communication and the technical field of electronic devices, and is used for solving the problem that the noise coefficient of an existing Darlington structure is large. Comprising a noise matching and input matching network, a linearity enhancement structure, a negative feedback structure and a pre-distortion structure. Wherein the linearity enhancement structure at least comprises a first amplification transistor and a second amplification transistor which are arranged in parallel, and is used for improving the linearity of the circuit through harmonic cancellation; the negative feedback structure is connected with the noise matching and input matching network and the pre-distortion structure and is used for expanding circuit bandwidth and optimizing output matching; the pre-distortion structure is used for stabilizing the bias voltage of the third amplification transistor. According to the invention, the linearity of the whole circuit is effectively improved, and the source microstrip lines of the two circuits are utilized to improve the minimum noise matching and improve the noise performance. Noise is reduced, linearity is improved, low-frequency gain is suppressed, and bandwidth of the whole circuit is improved.

Provided is a buffer circuit that can realize a wide dynamic range, a reduced area, and a reduced power consumption amount while maintaining low output impedance. The buffer circuit includes a first transistor, a current source, a second transistor, an output terminal, and first and second capacitors. The first transistor has a gate to which an input signal is input. The current source is connected to one terminal of the first transistor. The second transistor is connected to the other terminal of the first transistor. The output terminal is connected to the one terminal or the other terminal of the first transistor. The first and second capacitors are between the current source and the gate of the second transistor. The first transistor, the second transistor, and the first capacitor form a first feedback circuit. The first transistor, the current source, and the second capacitor form a second feedback circuit.

Provided are an audio playing module and an audio processing circuit thereof, and an electronic device, which belong to the technical field of electronics. In the audio processing circuit, by adding a feedback control circuit between a power circuit and an audio amplifier, the feedback control circuit can control, according to a change in the amplitude of an audio signal received by the audio amplifier, the power circuit to adjust a power supply voltage provided for the audio amplifier. Thus, when the amplitude of the audio signal changes, an appropriate power supply voltage can be matched for the audio amplifier by means of the feedback control circuit, thereby solving the problem of the audio playing module generating whistling when the amplitude of the audio signal changes, and thus optimizing the sound quality of played sounds.

The invention relates to a buffer and an integrated circuit. The buffer includes: an operational amplifier; the first end of the voltage-voltage feedback network is coupled to the positive phase / negative phase input end of the operational amplifier; the first end of the isolation resistor is coupled to the output end of the buffer; the first group of switches and the second group of switches are controlled to be closed when the first capacitive load is driven, the second group of switches are disconnected when the second capacitive load is driven, and the first group of switches are disconnected and the second group of switches are closed when the second capacitive load is driven; in the first load, the output end of the operational amplifier is coupled to the output end of the buffer through at least one switch in the first group of switches, and the second end of the voltage-voltage feedback network is coupled to the output end of the buffer through at least one switch in the first group of switches. In the second load, the output end of the operational amplifier is coupled to the second end of the isolation resistor through at least one switch in the second group of switches, and the second end of the voltage-voltage feedback network is coupled to the output end of the operational amplifier through at least one switch in the second group of switches.

The invention provides an error amplifier for peak current mode control and a converter system. The error amplifier comprises a transconductance amplifier, a voltage clamping module, a voltage-current converter, a slope compensation module, a current clamping module and a mirror image tube, the negative end of the transconductance amplifier is used for loading feedback voltage, and the positive end is used for loading reference voltage; the output end of the transconductance amplifier, the output end of the voltage clamping module and the input end of the voltage-current converter are electrically connected; the voltage-current converter generates error current; the slope compensation module is used for performing slope compensation on the error current to generate a compensated current; the output end of the slope compensation module, the output end of the current clamping module and the positive end of the high-side comparator are electrically connected with a second reference node; and the mirror image tube is used for loading the comparison voltage to the positive end of the high-side comparator. The error amplifier provided by the invention can realize more stable mode switching and more accurate current limiting control.

The utility model relates to the technical field of radio frequency and microwave, in particular to a linearization circuit of a power amplifier, which comprises the power amplifier used for amplifying an input signal and providing required output power; the bias circuit is used for providing bias voltage for the power amplifier and controlling the change characteristic of a quiescent operating point of the power amplifier along with the temperature and the power; the active feedback circuit comprises a first connection point P1, a second connection point P2 and a third connection point P3, the active feedback circuit effectively reduces nonlinear distortion of the power amplifier through a negative feedback mechanism, and the nonlinear distortion of the power amplifier is effectively reduced by adjusting a first resistor R5, a second resistor R4, a third resistor R1 and a fourth resistor R3. The feedback circuit can be controlled to work in a critical region of a saturation region and a linear region, so that the linearity of the power amplifier can be optimized.

The utility model relates to the technical field of electronics, in particular to a sensor signal processing circuit and a signal processing device. The signal processing circuit comprises a signal amplification circuit, a filter circuit, an analog-to-digital conversion circuit and a power supply circuit. The input end of the signal amplification circuit is used for receiving a sensor, the output end of the signal amplification circuit is connected with the input end of the filter circuit, and the output end of the filter circuit is connected with the input end of the analog-to-digital conversion circuit; the output end of the power supply circuit is connected with power supply terminals of the signal amplification circuit, the filter circuit and the analog-to-digital conversion circuit. Firstly, a signal amplification circuit is adopted to amplify an analog voltage signal output by an ultrasonic sensor, then a filter circuit is adopted to filter the amplified analog voltage signal, and finally an analog-to-digital conversion circuit is adopted to convert the filtered analog signal into a digital signal which can be directly read by a microprocessor. And the application scene of the ultrasonic sensor is expanded.

The invention relates to the technical field of guide rail meter testing, in particular to a proportional operational amplifier circuit for simulating Rogowski coil signal output and a testing device, which comprises a current sampling loop for converting input current into voltage analog signal output, and a proportional amplification loop connected with the output end of the current sampling loop, and the analog module is used for amplifying an input voltage analog signal by an amplification coefficient K and then outputting the amplified voltage analog signal, and the amplification coefficient K is matched with the sensitivity coefficient S of the Rogowski coil to be simulated. Through the collaborative design of the high-precision current transformer and the proportional operational amplifier circuit, the primary side test current is reduced to below 50A, and meanwhile, a voltage signal which is equal to a Rogowski coil in proportion is accurately generated through the proportional operational amplifier circuit. According to the design scheme, the final test effect can be achieved by applying the current of 0.04-50A, the test environment is safer compared with the test environment with the large current of 500A, and the service life of the test bench body is protected.

A signal processing device comprises an amplifier, a first switch assembly, a second switch assembly and a microcontroller. The first switch assembly is configured to receive a first signal; the second switch assembly is configured to receive a second signal; when the microcontroller is configured to turn on the first switch assembly, the first switch assembly is configured to transmit the first signal to the amplifier; when the microcontroller is configured to turn on the second switch assembly, the second switch assembly is configured to transmit the second signal to the amplifier.

In an embodiment, a method includes connecting a first subset of a set of stages of a power amplifier to a supply voltage, connecting a second subset of the set of stages to a reference voltage different than the supply voltage, switching a third subset of the set of stages according to a switching frequency, assigning numbers of stages in the first subset, the second subset, and the third subset based on a power requirement of the power amplifier, and amplifying a transmit signal using the first subset, the second subset, and the third subset to generate an amplified transmit signal.

An amplifier device may include a signal input for receiving a reference signal and amplifier circuitry. The amplifier device has a feed-forward signal path providing a feed-forward signal. First signal combining circuitry is configured to generate an error signal representative of a difference between the reference signal and a signal proportional to an amplified signal. Signal processing circuitry is configured to process the error signal to obtain a first signal. Second signal combining circuitry is configured to combine the first signal and the feed-forward signal to obtain a combined signal which is applied to an input of the amplifier circuitry. The signal processing circuitry has a limiter coupled to a loop filter. The limiter is configured to limit an amplitude of a second signal to a predetermined value thereby obtaining a limited signal. The loop filter is configured to obtain the first signal based on the limited signal.

The present application provides a kind of power amplifier circuit and semiconductor device.Power amplifier circuit has the 1st amplifier of signal distribution from input signal is amplified, the 2nd amplifier of signal with different phase is amplified, the 3rd amplifier, the 4th amplifier and matching circuit, matching circuit has: the 1st wiring, with the output terminal of the 1st amplifier is connected with the 1st end and the input terminal of the 3rd amplifier is connected with the 2nd end;The 2nd wiring, with the input terminal of the 3rd amplifier is connected with the 1st end and the 2nd end of power supply is connected, and with the 1st wiring is electromagnetically coupled;The 3rd wiring, with the output terminal of the 2nd amplifier is connected with the 1st end and the input terminal of the 4th amplifier is connected with the 2nd end;And the 4th wiring, with the input terminal of the 4th amplifier is connected with the 1st end and the 2nd end of power supply is connected, and with the 3rd wiring is electromagnetically coupled.

The invention provides a current multiplexing type output amplifier. The current multiplexing type output amplifier comprises a current multiplexing type input stage, a first self-biased diode pair, a second self-biased diode pair, a first AB type output stage and a second AB type output stage, wherein the first self-biased diode pair and the second self-biased diode pair are connected with the current multiplexing type input stage; the first AB type output stage is connected with the first self-biased diode pair; according to the invention, two self-biased diode pairs are adopted to replace a floating voltage source in the prior art. When a large pulse signal is input, one diode in each of the two diode pairs is in a cut-off state, transient change current I only flows into or out of the output end from a certain branch, and compared with a traditional amplifier, the slew rate is multiplied under the same bias current condition. In addition, the input stage adopts a current multiplexing type architecture combining a PMOS (P-channel Metal Oxide Semiconductor) and an NMOS (N-channel Metal Oxide Semiconductor), under the same bias current, the equivalent input transconductance is the sum of the transconductance of the PMOS and the transconductance of the NMOS, and the unity gain bandwidth is also multiplied.

The present invention discloses a reconfigurable ultra-wideband, high-precision variable-gain amplifier core circuit. The core circuit primarily comprises a three-stage wideband variable-gain unit and a digitally controllable current source array. This circuit utilizes a novel gain control method, achieving not only high-precision gain control but also complete independence between coarse and fine gain adjustments. This significantly reduces circuit complexity and improves broadband performance. Furthermore, the bandwidth remains constant across the entire variable gain range, ensuring that the core circuit maintains constant group delay at varying gains. Furthermore, the core circuit features configurable gain and bandwidth, enabling configuration of both gain and bandwidth without affecting the variable gain range, thus meeting the gain-bandwidth and other performance requirements of diverse broadband systems.

A solid-state power amplifier architecture comprises a plurality of switched mode with gate driver circuit and digital input power amplifier modules, and a digital control circuit configured to drive the plurality of switched mode with digital input power amplifier modules with corresponding digital signals, whereby the digital control circuit is further configured for adjusting the phase of the digital signals relative to each other. The solid-state power amplifier architecture further comprises an RF or MW power combiner with load terminations that are equipped each with a corresponding directional coupler that is configured to sample the signal into the load terminations, and a feedback system implemented in the digital control circuit that uses the sample signals to adjust the phase of the digital signals to each other according to a method that maximises the efficiency of the power combination by minimising the signal into the load terminations by adjusting the phase of the digital signals into the power amplifier modules relative to each other.

A reception apparatus includes a reception circuit configured to receive reception signals, and a control circuit configured to control the reception signals to be input to the reception circuit by executing a feedback control according to a current consumption of the reception circuit.

Low noise amplifier (LNA) architectures addressing the parasitic challenges in the circuit in order to meet the high gain and bandwidth requirement at higher frequencies are disclosed. The described LNAs include cascode transistors and implement a tunable inductor (Lgate) in series with the gate terminal of a transistor (M2) of the cascode transistors to improve the gain and bandwidth of the LNAs and achieve high gain wideband switching LNAs.

The utility model discloses a digital signal processor (DSP) sampling conditioning circuit, which relates to the technical field of digital signal processing, and is characterized in that the output end of a voltage stabilizing circuit is connected with the input end of an anti-phase proportion operation circuit, and the output end of the anti-phase proportion operation circuit is connected with one input end of an adder circuit; the other input end of the adder circuit is connected with the output end of the sensor, and the output end of the adder circuit is connected with the input end of the DSP. According to the utility model, the measurement precision of the DSP can be improved.

The present invention relates to the field of integrated circuit technology, and more particularly to an LVDS transmitter with slew control. The present invention utilizes the characteristics of resistor and capacitor delay to output a portion of the data signal output by the LVDS circuit after a delay controlled by slew control resistors (RD1 and RD2) and the parasitic capacitance of the gate of the switch tube (M3 and M4). This process absorbs the external load resistor R L The reflection of the output signal (OUTN and OUTP) is then controlled to control the voltage swing of the output signal. On the one hand, the introduction of the slew control circuit does not increase the extra power consumption of the circuit. On the other hand, the introduction of the slew control circuit can improve the ringing phenomenon of the signal at the inversion point. Secondly, due to the use of a much larger than R L RCM1 and RCM2 thus avoid increasing the current flowing through the internal matching resistor, thereby reducing the power consumption of the transmitter. Ultimately, the present invention solves the ringing phenomenon while reducing the power consumption of the LVDS transmitter.

This buffer circuit comprises a first transistor that has a power source terminal to which a first voltage is applied, a control terminal which is connected to an output terminal of an operation amplifier, and an output terminal which is connected to a second input terminal of the operation amplifier. The buffer circuit comprises: a second transistor that has a power source terminal to which a second voltage is applied, a control terminal which is connected to the output terminal of the operation amplifier, and an output terminal which is connected to the second input terminal of the operation amplifier; and a control transistor that has a first connection terminal which is connected to the control terminal of the second transistor, a detection terminal which is connected to the second input terminal of the operation amplifier, and a second connection terminal which is connected to the output terminal of the operation amplifier. The second input terminal of the operation amplifier is connected to the output terminal of the buffer circuit, and when an output voltage of the buffer circuit is in the range from the first voltage to the second voltage on the basis of the potential difference between the operation amplifier and the output terminal of the buffer circuit, the control transistor switches a state between the control terminal of the second transistor and the output terminal of the operation amplifier to a conducting state.

A power amplifier circuit includes a first transistor, a second transistor, and a biasing circuit. The first transistor has a base configured to receive a first signal. The second transistor has an emitter connected to a collector of the first transistor, and a collector configured to output a second signal. The biasing circuit is coupled to the first transistor and the second transistor. The biasing circuit is configured to provide a direct current (DC) voltage at the collector of the second transistor that is about twice a DC voltage at the collector of the first transistor. The biasing circuit is configured to provide an alternating current (AC) or radio frequency (RF) voltage at the collector of the second transistor that is about twice an AC or RF voltage at the collector of the first transistor.

Provided are feedforward amplifier circuit, audio amplifier and audio playing device, including: a main amplifier circuit, an adder circuit, a sub-amplifier circuit and a subtractor circuit, wherein the main amplifier circuit adds distortion to a first input signal to output a distorted signal, and inputs the distorted signal to the adder circuit and the subtractor circuit for performing feedforward correction; the sub-amplifier circuit amplifies a second input signal and serves as a positive input of the subtractor, so that a signal gain output by the subtractor is equal to a signal gain of the main amplifier; the subtractor circuit, with the distorted signal as a negative input, reversely amplifies the distorted signal and afterwards performs feedforward; and the adder circuit superimposes the distorted signal output by the main amplifier circuit and the reversely amplified distorted signal output by the subtractor, so as to output a distortion-free signal.

The application belongs to the technical field of integrated circuits, and specifically discloses a digital control programmable gain amplifier chip, which adopts an SIP packaged operational amplifier, a digital potentiometer, an input end Vin and an output end Vout, an alternating current signal is input from the Vin end, is connected to the inverting input end of the operational amplifier through a capacitor C1 and an input resistor R1, a positive power supply pin of the operational amplifier is connected to a positive electrode VDD of a power supply, a negative power supply pin is connected to the ground, a same-phase input end obtains a VDD / 2 direct current bias voltage through a precision resistor voltage dividing network and is connected after low-pass filtering, a high end of the digital potentiometer is connected to the Vout end, a low end is connected to the inverting input end of the operational amplifier, and a feedback path is formed through a sliding end. The operational amplifier and the digital potentiometer are integrated, high integration and modularization of the programmable gain amplification circuit are realized, and the problems of insufficient gain precision, decreased reliability of a multi-element system and large circuit volume caused by the on-resistance of an analog switch in a traditional discrete scheme are solved.

A compensation circuit of realizing equivalent capacitance amplification is provided. The compensation circuit includes an error amplifier, a resistor and a capacitor. A first terminal of the resistor is connected to a first output terminal of the error amplifier. A second terminal of the resistor is connected to a second output terminal of the error amplifier and the capacitor. An amplified error current signal outputted from the first output terminal of the error amplifier flows through the resistor, and is then divided into a capacitor charging signal and an error amplified reverse current signal. The capacitor charging signal flows to the capacitor. The error amplified reverse current signal flows through the second output terminal of the error amplifier into the error amplifier. The error amplified reverse current signal is larger than the capacitor charging signal.