53 results about "Class-D amplifier" patented technology

An example apparatus includes: class D amplifier circuitry having a first input, a second input, a third input, and an output, the first input of the class D amplifier circuitry coupled to the output of the class D amplifier circuitry; and class AB amplifier circuitry having a first input, a second input, a third input, and an output, the first input of the class AB amplifier circuitry coupled to the first input of the class D amplifier circuitry and the output of the class D amplifier circuitry, the second and third inputs of the class AB amplifier circuitry coupled to the second and third inputs of the class D amplifier circuitry, and the output of the class AB amplifier circuitry.

A class D amplifier circuit receives an analog audio signal with a first reference voltage as its center level, and outputs an output pulse signal having a duty cycle that corresponds to the analog audio signal. A bias circuit generates a second reference voltage having a voltage level obtained as a division of the first reference voltage and the power supply voltage. A periodic voltage generating circuit of the class D amplifier circuit generates a periodic voltage having a triangle waveform or otherwise a sawtooth waveform having an amplitude that corresponds to the second reference voltage.

The invention provides a closed-loop D-class amplifier loop, a differential closed-loop D-class amplifier loop, audio equipment and electronic equipment, the loop comprises a first-stage integrator, a second-stage integrator, a pulse width modulation module and an H-bridge module which are electrically connected in sequence, and a feedback module, the first end of the feedback module is coupled to the input end of the first-stage integrator, and the second end of the feedback module is coupled to the input end of the second-stage integrator. The second end of the feedback module is coupled to the output end of the H-bridge module, the feedback module comprises a feedback capacitor and a feedback resistor which are connected in parallel, a zero point is formed, and the zero point is designed within the frequency range between one time and two times of the gain bandwidth product. The feedback capacitor is connected to the feedback resistor in parallel, so that zero points in a loop are increased, and the system stability of the class-D amplifier is improved when the class-D amplifier is in a no-load state or the connected inductive load is large.

An audio amplifier that implements current mode control without the use of an explicit or separate current mode sensor is disclosed. The audio amplifier may include a pair of feedback loops that provide current from a node located before an inductor of an output filter and current from a node located after the inductor of the output filter to an integrator circuit. The integrator circuit may be formed from existing circuitry of the audio amplifier controller. Thus, current mode control can be implemented without a separate current mode sensor. Further, the audio amplifier can be implemented as a half bridge or as a full bridge design without increasing the number of operational amplifiers compared to the half bridge.

The present invention is in the field of underlying electronic circuits, in particular audio amplifiers, more particularly class D amplifiers, such as for digital audio converters and digital amplifier controllers, chips comprising said audio amplifiers, and devices comprising said audio amplifiers or said chips.

To provide a class D amplifier circuit capable of accurately detecting abnormality even if delay process is performed.SOLUTION: A class D amplifier circuit includes a PWM modulation processing part for performing a PWM modulation process for an inputted signal, a signal amplification part for amplifying the PWM modulated signal with a switching element, and an abnormality detection part for detecting, as an abnormality, the occurrence of a continuous voltage drop for a set time or more in a signal after passing through the signal amplification part.SELECTED DRAWING: Figure 1

An input signal may be converted to a first PWM signal and a second PWM signal at a PWM controller circuit. The first PWM signal and the second signal output may drive a driver circuit. The driver circuit may receive a high voltage power supply from a boost converter or other power supply circuit. The driver circuit may include a high side device and a low side device. The output of the driver circuit may drive a filter circuit that includes a filter capacitor, an inductor, and a haptic actuator. The haptic actuator may generate a desired haptic response at the haptic actuator.

A class D amplifier including a pulse width modulation (PWM) control loop, an H-bridge driver, a PWM controller having a PWM pulse generator to generate PWM pulses supplied to the H-bridge driver in response to an ADC value output by an analog-to-digital converter of the PWM control loop, and a comparator. The comparator is configured to trigger a cutoff of a PWM pulse generated by the PWM pulse generator during a respective loop cycle of the PWM control loop and to trigger generation of at least one counter PWM pulse with an opposite polarity in the respective loop cycle such that a net pulse energy of the cutoff PWM pulse and of the at least one generated counter PWM pulse corresponds to a pulse energy representing the ADC value provided by the analog-to-digital converter of the PWM control loop during the respective loop cycle.

The invention provides a class-D amplifier and a method for operating the class-D amplifier. The class-D amplifier comprises a p-type output transistor; an n-type output transistor connected in series with the p-type output transistor; and a driving circuit connected to a gate of the p-type output transistor and a gate of the n-type output transistor. The driving circuit receives an input signal, generates a p-type output transistor control signal applied to the gate of the p-type output transistor, and generates an n-type output transistor control signal applied to the gate of the n-type output transistor. When the input signal becomes logically high, the control signal of the n-type output transistor quickly becomes logically low, and the control signal of the p-type output transistor gradually becomes logically low. When the input signal becomes logically low, the control signal of the p-type output transistor quickly becomes logically high, and the control signal of the n-type output transistor gradually becomes logically high.

The embodiment of the invention discloses a modulator, a modulation method and a class-D amplifier. According to the embodiment of the invention, the delay parameter is dynamically controlled according to the envelope of the input signal, and dynamic duty ratio reduction is carried out on the pulse width modulation signal obtained through preliminary modulation, so that the duty ratio of the pulse width modulation signal obtained through audio signal modulation can be effectively reduced when the signal is small, the conduction loss and the switching loss of a class-D amplifier are reduced, and the power consumption of the class-D amplifier is reduced. And the power consumption is optimized.

The invention provides a carrier signal spectrum spreading method, a carrier signal generator, a medium and electronic equipment. The method comprises the following steps: determining the lowest frequency of a target signal; based on the lowest frequency of the target signal, determining a modulation frequency corresponding to the carrier signal, the modulation frequency being greater than 0, and the modulation frequency being less than or equal to a half of the lowest frequency of the target signal; presetting a frequency offset range corresponding to the carrier signal; based on the modulation frequency and the frequency offset range, spectrum spreading is carried out on the carrier signal, the carrier signal after spectrum spreading is used for modulating the target signal, the method remarkably improves the modulation coefficient, the energy of the fundamental wave of the carrier signal after spectrum spreading approaches 0, the spectrum spreading effect is good, the peak value of EMI can be reduced, the performance of the system can be optimized, and the performance of the system can be improved. Moreover, the carrier signal is prevented from entering the frequency range of the target signal during modulation, and the influence on the quality of the target signal is avoided.

An audio circuit is configured to allow an analog voltage to be input via its volume setting pin. A power supply pin receives a power supply voltage. A bias circuit generates a first reference voltage that corresponds to the analog voltage. A D / A converter converts a digital audio signal into an analog audio signal. AD / A converter has a variable voltage range with a full scale that can be changed according to the first reference voltage. A class D amplifier outputs an output pulse signal having a duty cycle that corresponds to the analog audio signal output from the D / A converter and having an amplitude that corresponds to the power supply voltage.

This application discloses a DC detection circuit and electronic device suitable for Class D amplifiers. A charge / discharge circuit controls the supply of charging current to a capacitor to establish a pre-charge voltage or controls the supply of discharge current required for capacitor discharge. A PWM signal processing circuit controls the charge / discharge circuit based on the duty cycle difference between a first pulse width modulation signal and a second pulse width modulation signal. A reset circuit is connected between the charge / discharge node and the common terminal. A comparator compares the voltage of the charge / discharge node with a reference voltage. The reset circuit is used to reset the voltage of the charge / discharge node when the input signal is a normal audio signal at a zero-crossing point; or, when the input signal is a DC signal, not to perform a reset operation; or, when the input signal switches from a normal audio signal to a DC signal, to end the reset operation. This application incorporates a reset circuit to avoid misjudgment during normal audio signal and DC signal switching, improving the accuracy and reliability of the DC detection circuit.

The application provides a class D amplifier and a method of operating the same, the class D amplifier including an output driver stage configured to output an output signal at an output node. The class D amplifier also includes a current sense circuit coupled to the output node of the output driver stage, and the current sense circuit may include: a peak detector coupled to the output node of the output driver stage, the peak detector configured to retrieve a peak of the output signal; and a current sensor coupled to the peak detector and configured to receive the peak of the output signal and generate a sensing current based on the peak of the output signal.

A class D amplifier includes a signal processing block. The signal processing block generates a first processed signal indicating a difference between a first differential signal and a second differential signal when a duty cycle of the first differential signal is greater than a duty cycle of the second differential signal. The signal processing block generates a first processed signal indicating a reference DC level when a duty cycle of the first differential signal is less than a duty cycle of the second differential signal. The signal processing block generates a second processed signal indicating a difference between the second differential signal and the first differential signal when a duty cycle of the second differential signal is greater than a duty cycle of the first differential signal, and generates a second processed signal indicating a reference DC level when a duty cycle of the second differential signal is less than a duty cycle of the first differential signal.

A class-D amplifier for generating an output signal having PWM according to an input signal based on a DC voltage during a normal mode (NM) includes: a first integrator for generating a first integrated signal by integrating the difference of the input signal and a feedback signal during the NM; a final-stage integrator for generating a final-stage integrated signal by integrating the first integrated signal during the NM; a superposition circuit for generating a loop filter signal by buffering the final-stage integrated signal during the NM; and a modulation and driving circuit for generating the output signal by comparing the loop filter signal and a triangle wave. During a clipping mode, the first integrator enters a reset or a hold state, and the final-stage integrator enters the hold state, and the superposition circuit is configured to superimposes the final-stage integrated signal and a feedforward signal to generate the loop filter signal.

The present invention is in the field of underlying electronic circuitry, in particular for audio amplifiers, more particularly for class D amplifiers, for example for digital audio converters and digital amplifier controllers, chips comprising said audio amplifiers, and devices comprising said audio amplifiers or said chips.

The present invention discloses a class D amplifier, comprising: a loop filter, a control signal generator, a first power driver and a first feedback circuit, configured to establish a first loop for signal amplification; a stabilization circuit, configured to combine with the loop filter and the control signal generator to establish a second loop, so as to stabilize the loop filter and the control signal generator before enabling the first loop; and a pre-charging circuit, configured to pre-charge the positive output terminal and the negative output terminal of the first power driver, respectively, the positive output terminal and the negative output terminal being the first positive feedback terminal and the first negative feedback terminal, respectively. The implementation of the present invention can eliminate popping and clicking noises.

The invention provides a class D amplifier with load current sensing and an operation method thereof. The class D amplifier includes an output driver stage and a current sensing circuit. The current sensing circuit includes: an operational amplifier having a positive input terminal and a negative input terminal; the source electrode of the positive input composite transistor is connected to the positive input terminal, and the drain electrode and the grid electrode of the positive input composite transistor are respectively connected to the drain electrode and the grid electrode of a first n-type output transistor; the source electrode of the negative input composite transistor is connected to the negative input terminal, and the drain electrode and the grid electrode of the negative input composite transistor are respectively connected to the drain electrode and the grid electrode of the second n-type output transistor.

The present invention discloses a class-D amplifier, comprising: a loop filter, a pulse-width modulation signal generator, a gate driver, a power driver, and a feedback circuit for establishing a closed amplification loop; wherein, the feedback circuit is used to establish a feedback path; and a feedback breaker for interrupting the feedback path in response to a no-signal information condition of the class-D amplifier. Therefore, when there is no meaningful signal in the signal amplification circuit, noise will not be fed into the signal amplification circuit through the feedback path, and the signal-to-noise ratio performance is significantly improved.

The invention relates to a self-biased low-harmonic high-efficiency inverse class-D RF power amplifier circuitry. Power amplifier circuitry is disclosed having an inverse class D amplifier acting as a power amplifier and self-biasing circuitry that generates a gate bias voltage for a switched-mode power transistor within the power amplifier. The self-biasing circuitry includes a low dropout regulator that generates and applies a gate bias voltage in response to a feedback current scaled according to an operating current of the power amplifier. The current-based digital-to-analog converter is configured to generate a reference current based on the received digital value. In addition, a digital processor is configured to generate the digital value in response to the gate bias voltage. The power amplifier circuitry enhances performance and efficiency while ensuring precise control of power transistor operation, providing advantages for various applications requiring radio frequency signal amplification.

To provide a self-oscillating Class-D amplifier device which implements the improvement of acoustic performance, the reduction of distortion and the improvement of stability.SOLUTION: An amplifier device 300 for amplifying an input signal Sx at a device input X to an output signal Sy at a device output Y, for driving reactive load such as a loudspeaker, comprises a self-oscillating Class-D power amplifier stage K with transfer function KA(s). The amplifier stage includes a comparator, a power stage, a second-order low-pass output filter and a time delay unit. The time delay unit provides a delay determined by the comparator, the power stage, and a first feedback filter Hosc. The output signal Sy is fed back to the comparator via a first feedback path. A correction stage comprises a second feedback path that feeds the output signal Sy to a virtual ground input of a transimpedance amplifier. A third feedback path for further enhancing correction includes a passive network which applies a first transfer function H2 to the output signal Sy and applies a second transfer function H3 to the input signal Sx.SELECTED DRAWING: Figure 2

The present application relates to a class-D amplifier. The class-D amplifier includes a loop filter configured to receive first and second feedback signals, and receive first and second input signals through first and second resistors, respectively, and filter the first and second input signals and the first and second feedback signals to generate first and second filtered signals; a triangle wave generator configured to generate a triangle wave based on first and second reference voltages; first and second comparators configured to compare the first and second filtered signals to the triangle wave to generate first and second pulse width modulation signals, respectively; first and second driver circuits configured to generate first and second output signals based on the first and second pulse width modulation signals, respectively; and a reference voltage generator circuit configured to generate the first and second reference voltages based on a control signal.

The invention provides a common-mode level generation circuit with a buffer module, an electronic circuit and electronic equipment. The circuit comprises the buffer module, a transconductance operational amplifier module and a first resistor. The buffer module carries out level shift on the first output voltage and the second output voltage output by the integrator and the first reference voltage and the second reference voltage and outputs the voltages to the operational transconductance amplifier, and the operational transconductance amplifier is used for carrying out transconductance amplification on the input voltages and adding the voltages to obtain a first current and a second current. And if the first current is greater than the second current, the transconductance operational amplifier module outputs a step-down current, and the step-down current flows through the first resistor to generate voltage drop so as to reduce the output common-mode level. Therefore, according to the single-side modulation technology, the power consumption of the power supply is greatly reduced under the no-load condition of the D-type power amplifier, the efficiency is greatly improved when the D-type power amplifier is low in power, and the THDN performance of the circuit is prevented from being influenced by oversaturation of the first output voltage and the second output voltage.

High-efficiency dual-frequency homologous frequency-modulated radio broadcast modulation and transmission system, which relates to the field of radio and television technology and solves the problem of low power efficiency of existing multi-program homologous transmitters. The system includes a frequency modulator and a power amplifier circuit. The power amplifier circuit includes an amplitude modulator and a carrier amplifier. The frequency modulator includes a processor, a V oscillator, a U oscillator, a pulse generator, a pulse modulator, an inverter, a phase detector, and a data selector. The power amplification circuit of the present invention not only has the function of signal amplification, but also participates in the frequency synthesis of frequency-modulated programs in the form of high-power amplitude modulation, which is a new technical route. Therefore, the power amplifier circuit can use class C or higher class D amplifiers with higher power efficiency, and the output high-power program signal can be directly transmitted.

The present invention provides a method, device, and medium for detecting audio output of a Class D amplifier in the field of Class D amplifier technology. The method includes: step S10, inputting a sine wave signal of a preset frequency into the Class D amplifier; step S20, connecting a filter circuit to the load end of the Class D amplifier and setting the cutoff frequency of the filter circuit; step S30, the Class D amplifier superimposes the sine wave signal on a carrier signal and outputs the signal through the filter circuit; step S40, sampling the output signal of the filter circuit through an ADC and performing a fast Fourier transform to obtain a complex sequence corresponding to the sampling points, thereby calculating the effective value of the input signal; step S50, multiplying the sine wave signal by the amplification factor of the Class D amplifier, comparing the value obtained with the corresponding effective value, and analyzing the complex sequence to determine whether the output of the Class D amplifier is normal. The advantage of the present invention is that it greatly improves the accuracy of audio output detection of the Class D amplifier.

Provided is a class D amplifier circuit (30) capable of outputting an output signal having a desired characteristic even if the voltage of a signal input to a capacitor (1) of a low-pass filter changes. A low-pass filter circuit (36) of a class D amplifier circuit (30) is provided with an inductor (40), a first capacitor, and a second capacitor, the low-pass filter circuit (36) is provided with an input terminal (50) connected to a drive circuit (34), a first potential terminal connected to a first potential (E1), a second potential terminal connected to a second potential (E2), and an output terminal (56) connected to the first potential (E1). The first potential terminal is connected to a first potential (E1), the second potential terminal is connected to a second potential (E2) lower than the first potential (E1), the output terminal (56) is connected to the load circuit (62), one external electrode (20) of the first capacitor is connected to the first potential terminal, one external electrode (20) of the second capacitor is connected to the second potential terminal, and the other external electrode (20) of the second capacitor is connected to the load circuit (62). The other external electrode (20) of the first capacitor and the other external electrode (20) of the second capacitor are connected to the output terminal (56), one external electrode (20) of the inductor is connected to the input terminal (50), and the other external electrode (20) of the inductor (40) is connected to the output terminal (56).

To reduce distortion contained in an output signal while reducing application cost by incorporating an externally arranged current limiting resistor.SOLUTION: A class-D amplifier circuit includes: a first input terminal and a second input terminal to which a 3-value PWM signal can be inputted; and a first output terminal and a second output terminal to which a capacitive load is connected. The class-D amplifier circuit further includes: a first class-D driver circuit having a first driver output terminal capable of changeover based on a signal level at the first input terminal; and a second class-D driver circuit having a second driver output terminal capable of changeover based on a signal level at the second input terminal. A first current limiting resistor is connected between the first driver output terminal and the first output terminal, and a second current limiting resistor is connected between the second driver output terminal and the second output terminal. Changeover state of a first switch connected to the first current limiting resistor in parallel and the second switch connected to the second current limiting resistor in parallel are controlled so that an applied voltage to the capacitive load becomes the power supply voltage or less, based on the first signal level and the second signal level.SELECTED DRAWING: Figure 1

The present application describes a time coded modulator circuit (200), and in particular, describes a PWM modulator suitable for use in a class D amplifier. A forward signal path receives a digital input signal (Din) and outputs an output PWM signal (Sout) and includes a first PWM modulator (101). A feedback path provides feedback to an input of the first PWM modulator (101). The feedback path includes an ADC (203) that receives a first PWM signal (Sa) derived from the output PWM signal. The ADC (203) includes a second PWM modulator (401) that generates a second PWM signal (Sb) based on the first PWM signal. A controller (201) controls the second PWM modulator so that a PWM carrier of the second PWM signal matches a PWM carrier phase and frequency of the output PWM signal.

This invention provides a CMOS ultra-wideband high-gain high-power amplifier, relating to the field of power amplifier technology. It includes a multi-drive improved Class D amplifier and a multi-stage compact coupled peaking distributed amplifier. The multi-stage compact coupled peaking distributed amplifiers are connected sequentially. The input RF signal is connected to the first-stage compact coupled peaking distributed amplifier via an input line. The output of the Nth-stage compact coupled peaking distributed amplifier is connected to the input of the multi-drive improved Class D amplifier via an output line. The output of the multi-drive improved Class D amplifier outputs the RF signal. The advantage of this invention is that it solves the problems of large area, low gain, and low output power in traditional distributed amplifiers.