2989results about "Amplifier modifications to raise efficiency" patented technology

The invention provides a broadband Doherty power amplification circuit based on a coupler balun active load modulation network, which belongs to the field of radio frequency integrated circuits and comprises an input matching network, a self-adaptive biasing circuit, a main power amplifier, an auxiliary power amplifier and an output matching network. And the output matching network consists of two pairs of differential couplers and a section of 30-degree transmission line, so that the Doherty power amplifier has a broadband active load modulation function. Under a 65-nanometer CMOS (complementary metal-oxide-semiconductor transistor) process, in a working frequency range of 40% of relative bandwidth, the power back-off characteristic is good, and the back-off efficiency is high in a broadband range.

Aspects of this disclosure relate to symbol based envelope tracking. A voltage modulator circuit can generate an output bias voltage that tracks a root mean square symbol power of a radio frequency signal. A crest factor reduction circuit in a signal path that provides the radio frequency signal can adjust a crest factor reduction threshold such that the crest factor reduction threshold corresponds to the output bias voltage.

Amplifier circuitry is provided that includes a splitter circuit, a combiner circuit, a first amplifier path coupled between the splitter circuit and the combiner circuit, and a second amplifier path coupled between the splitter circuit and the combiner circuit. The first amplifier path can include a first amplifier of a first type and a second amplifier of a second type different than the first type. The second amplifier path can include a third amplifier of the first type and a fourth amplifier of the second type. The first, second, third, and fourth amplifiers can be single-ended amplifiers with shunt inductors coupled at their outputs. The shunt inductors associated with the first and second amplifiers can be partially overlapped to save area. The shunt inductors associated with the third and fourth amplifiers can be partially overlapped to save area.

Aspects of this disclosure relate to symbol based envelope tracking. A voltage modulator circuit can generate an output bias voltage that tracks a root mean square symbol power of a radio frequency signal. A digital predistortion system in a signal path that provides the radio frequency signal can adjust a digital predistortion based on a symbol based envelope tracking state.

Described are concepts, systems, system architectures, circuits, methods, and techniques directed toward power management and control. In particular, described are concepts, systems, system architectures, circuits, methods, and techniques for implementing power converters that may not have a right-hand pole zero in their linearized, averaged control-to-output transfer function, but that may still have buck and boost functionality.

A power amplifier circuit includes a differential amplifier circuit configured to amplify a radio-frequency signal, a transformer disposed on an output side with respect to the differential amplifier circuit and including a primary winding and a secondary winding, and a dispersion circuit coupled to a midpoint of the primary winding of the transformer and configured to operate as an adjustment circuit. The dispersion circuit is configured to adjust, based on a supply voltage controlled in accordance with the envelope of the radio-frequency signal, a bias (bias current or bias voltage) to be supplied to the differential amplifier circuit.

The invention provides a common-mode feedback circuit and a differential amplifier thereof, the common-mode feedback circuit comprises a sampling circuit and an amplifier circuit, the sampling circuit comprises a first input end, a second input end and a first output end, the first input end receives a first differential signal Voutp, and the second input end receives a second differential signal Voutn; the level shift module comprises a third input end, a fourth input end and a second output end, receives a common-mode signal VCMS and a reference common-mode signal VOCM output by the sampling circuit, and adjusts the common mode of the common-mode signal VCMS and the reference common-mode signal VOCM to enable the second output end to output a common-mode feedback signal VCMFB processed by the level shift module; the amplifier circuit receives a common mode feedback signal VCMFB. After the technical scheme is adopted, the same speed as that of a differential loop can be realized, the current of a main operational amplifier can be multiplexed, the power consumption of a common-mode loop is far lower than that of a main loop, and meanwhile, the common-mode level can be randomly adjusted.

A device includes a package body including a central flange and an amplifier module mounted to the central flange of the surface-mount device. The amplifier module includes a module substrate mounted to the central flange. The module substrate includes a first die mount window, a first circuitry on a first surface of the module substrate, a second circuitry on the first surface of the module substrate, and a first amplifier die mounted on the central flange. The first amplifier die is at least partially disposed within the first die mount window and the first amplifier die is electrically connected to the first circuitry and the second circuitry. The first circuitry is electrically connected to a first lead of the package body and the second circuitry is electrically connected to a second lead of the package body.

The invention discloses a circuit for simultaneously switching transimpedances of multiple channels by adopting a shift register. The circuit is characterized in that an FPGA (Field Programmable Gate Array) is connected with a signal acquisition and conversion circuit module through an analog-to-digital converter and a clock generation and distribution module; the signal acquisition and conversion circuit module comprises a bias voltage setting module, a pi-type filter, a photoelectric sensor and a transimpedance amplification module which are connected in series; the input end of a transimpedance amplifier in the transimpedance amplification module is connected with a transimpedance gain access circuit, the transimpedance gain access circuit is connected with the output end of the transimpedance amplifier through an analog switch, and the control end of the analog switch is connected with the FPGA through a shifting register. According to the circuit and the method for simultaneously switching the transimpedances of the multiple channels by adopting the shift register, the transimpedance gain of the transimpedance amplifier is judged and switched according to the size of the signal, the range of the input signal is expanded, the resolution is improved, and the IO resources of the FPGA are saved and the cost is reduced by utilizing the storage function and the serial-parallel conversion function of the shift register.

A signal amplifier includes a driver and a network of switches forming a power converter coupled to a H-bridge circuit. The power converter has a flying capacitor and an inductor. The H-bridge circuit receives a converted voltage from the power converter and applies an output modulated voltage to a load, for instance a loudspeaker. The driver drives the network of switches in a neutral state, a first state and a second state. In the neutral state no voltage is applied to the load. In the first state, an input voltage supply and the inductor are serially coupled, and the flying capacitor is coupled in parallel with the serially coupled input voltage supply and inductor. In the second state, the flying capacitor is coupled in series with at least one of the input voltage supply and the inductor. The signal amplifier may be a multi-level class D or class H amplifier.

Disclosed are a power amplifier and a method for controlling a power amplifier. The method includes providing an input signal to the first amplification path and the second amplification path; and supplying a first DC bias voltage and a second DC bias voltage to a control port of the third transistor and a control port of the fourth transistor respectively, where current conduction trenches of the third transistor and the fourth transistor comprise same materials and the first DC bias voltage is higher than the second DC bias voltage.

A transimpedance amplifier device for an optical receiver disclosed by the present invention comprises a bias circuit, a transimpedance amplifier and an amplification driving circuit which are connected in sequence, the bias circuit comprises an upper bias structure and a lower bias structure, and the upper bias structure and the lower bias structure are both connected with the transimpedance amplifier to generate different bias currents. It is ensured that the photodiode PD1 can be conducted and generate light current when light passes through the photodiode PD1, the transimpedance amplifier is used for converting the current into voltage to be output, and the amplification driving circuit is used for amplifying the voltage. According to the optical receiver circuit, micro current generated by the photodiode can be converted into output voltage in a relatively high output range through the transimpedance amplifier, and compared with a traditional optical receiver circuit, the optical receiver circuit is relatively low in cost in circuit structure and has the advantages of low power consumption and high reliability. The driving capability of the circuit can be improved under the condition that a complex amplifier loop and a photoelectric conversion module are not needed, the output voltage in a high range is output, and the performance and the stability are further enhanced.

The present disclosure discloses a Doherty power amplifier, including: a quadrature coupler including a first coupled inductor and a second coupled inductor, the quadrature coupler being configured to split an input signal into a first signal and a second signal; a first amplifier circuit, configured to amplify the first signal; a second amplifier circuit, configured to amplify the second signal; and a load modulation network, which is an output voltage-combined Doherty load modulation network using a T equivalent model. An overlapping part of the coupled inductors is used to provide distributed parasitic capacitance, thereby eliminating the need to set an additional capacitor in the quadrature coupler, and therefore reducing an area. Through the T equivalent model, a quarter-wavelength transmission line is equated to the load modulation network of the embodiments of the present disclosure, multiple inductors are combined into transformers with small areas.

Apparatus and methods for load modulated power amplifiers are provided. In certain embodiments, a load modulated power amplifier system includes a power amplifier that receives a radio frequency signal at an input and provides an amplified radio frequency signal at an output, and a controllable load impedance coupled to the output of the power amplifier. The controllable load impedance receives an envelope signal that changes in relation to an envelope of the radio frequency signal, and the envelope signal is operable to control an impedance of the controllable load impedance to modulate a load at the output of the power amplifier.

The invention relates to the technical field of radio-frequency signal processing, and discloses a 5G radio-frequency signal amplification method and system, and the method comprises the steps: decomposing an obtained radio-frequency signal into a high-frequency sub-band and a low-frequency sub-band through a multilayer wavelet packet, judging whether the radio-frequency signal is sparse in a wavelet packet domain, and carrying out the sparse reconstruction of an LI norm minimization problem if the radio-frequency signal is sparse; obtaining feature data of each sub-band, extracting a nonlinear transfer function of each sub-band through a CNN-GRU network, and carrying out transfer learning pre-training and dynamic adaptation updating; on the basis of dynamic adaptation update ending, layered memory polynomial calculation and layered model joint output construction, layered model parameter optimization is converted into a least square problem to obtain an error compensation function, and resource allocation is dynamically adjusted according to the peak-to-average power ratio of an input signal; and based on power amplifier state data, holographic sensing is performed on nonlinear parameters of the device through a fusion model, and dynamic changes of the device are compensated through multi-stage calibration and calibration delay is controlled.

A power amplifier includes a 3-dB coupler which splits a first signal into a second signal and a third signal lagging behind the second signal by 90°, a carrier amplifier, a peak amplifier, and a hybrid coupler. The carrier amplifier amplifies the second signal and outputs a fourth signal when the first-signal power level is a first level or higher. The peak amplifier amplifies the third signal and outputs a fifth signal when the first-signal power level is a second level or higher, which is higher than the first level. The hybrid coupler includes a first transmission line receiving the fourth signal at its first terminal, and a second transmission line receiving the fifth signal at its first terminal and being open at its second terminal. The first transmission line outputs, from its second terminal, an amplified first signal obtained by combining the fourth and fifth signals.

An amplifier circuit includes a carrier amplifier connected between a signal input terminal and a signal output terminal, a peak amplifier connected between the signal input terminal and the signal output terminal, a first phase shift circuit connected between the carrier amplifier or the peak amplifier and the signal output terminal, an auxiliary amplifier connected between the signal input terminal and the carrier amplifier, and a second phase shift circuit connected between the signal input terminal and the carrier amplifier.

The embodiment of the invention provides a power amplification system, a radio frequency emission system and a signal emission device. The power amplification system comprises a hybrid coupler, a first amplifier, a second amplifier, a first impedance conversion line and a second impedance conversion line. The output end of the first amplifier is coupled with the hybrid coupler through a first impedance conversion line. And the output end of the second amplifier is coupled with the hybrid coupler through a second impedance conversion line. Wherein the first amplifier and the second amplifier are used for outputting radio frequency signals. And the hybrid coupler is used for performing impedance conversion with the first impedance conversion line and / or the second impedance conversion line. And outputting the synthesized radio frequency signal from the fourth end of the hybrid coupler. The synthesized radio frequency signal is synthesized by a plurality of radio frequency signals. According to the embodiment of the invention, the hybrid coupler is combined with the wavelength line serving as the impedance conversion line to realize impedance conversion and load traction, so that the area overhead caused by the wavelength line is reduced on the basis of reducing the power consumption of the power amplification system.

An amplifier includes a first stage amplifier circuit configured to receive an input voltage and a first multi-stage amplifier circuit and a second multi-stage amplifier circuit branching off from an output terminal of the first stage amplifier circuit and each including a second stage and a third stage. Each of the first multi-stage amplifier circuit and the second multi-stage amplifier circuit may be configured to sample a voltage corresponding to a first bias current corresponding to the second stage and a voltage corresponding to a second bias current corresponding to the third stage in a first phase, and bias the second stage with the voltage corresponding to the first bias current and bias the third stage with the voltage corresponding to the second bias current in a second phase.

The invention discloses a multi-channel common-mode feedback high-gain amplification circuit. The circuit comprises a differential amplification module, an output end of which is connected with a load; the input end of the common-mode detection module is connected with the output end of the differential amplification module; the first input end of the error amplification module is connected with the output end of the common-mode detection module, and the second input end of the error amplification module receives reference voltage; and the multi-path feedback control module comprises at least two feedback branches which are connected in parallel, the input ends of the feedback branches are jointly connected with the output end of the error amplification module, the output ends of the feedback branches are respectively connected with different bias nodes in the differential amplification module, and the feedback branches have path impedance with gradient change. Through a dynamic division mechanism of a feedback branch, and in combination with a gain boosting unit and a hybrid compensation network, high-precision rapid establishment under a high-speed load is realized.

A power amplifier device includes a transistor die with an elongated bondpad coupled to a terminal of an integrated transistor. The device also includes a substrate formed from a stack of alternating dielectric and patterned conductive layers. An elongated die contact is exposed at a first substrate surface and is attached to the elongated bondpad to provide a uniform connection between the die contact and the elongated bondpad. A vertical interconnect structure is connected to the die contact and extends towards the second substrate surface. A circuit includes passive component(s) coupled to the second substrate surface and to the vertical interconnect structure. An encapsulation material layer covers the passive component(s) and the second substrate surface. A plurality of device interconnects are coupled to the substrate, electrically coupled to the power transistor die, and exposed at a contact surface of the power amplifier device.

An example apparatus includes: current source circuitry having a first terminal, a second terminal, a third terminal, and a fourth terminal; current sink circuitry having a first terminal, a second terminal, a third terminal, and a fourth terminal; common mode voltage circuitry having a first terminal and a second terminal, the first terminal of the common mode voltage circuitry coupled to the first terminal of the current source circuitry and the first terminal of the current sink circuitry, the second terminal of the common mode voltage circuitry coupled to the second terminal of the current source circuitry and the second terminal of the current sink circuitry; idle current source circuitry having a terminal coupled to the third terminal of the current source circuitry; and feedback current source circuitry having a terminal coupled to the fourth terminal of the current source circuitry.

The invention provides a voltage amplifier and a preparation method thereof, which can be applied to the technical field of voltage amplifiers. The voltage amplifier method includes: a noise matching transformer including a primary winding, a secondary winding, and a magnetic core, the noise matching transformer being configured with a target number of turns of the primary winding and a target number of turns of the secondary winding, thereby reducing noise of the active amplifier, the target number of turns of the primary winding is determined according to at least one of the first number of turns and the second number of turns, the target number of turns of the secondary winding is determined according to the signal source resistance, the resistance of the primary winding and the single-turn average resistance of the secondary winding, and the primary winding comprises a first tap and a second tap, the secondary winding comprises a positive tap, a negative tap and a center tap; the active amplifier is used for amplifying the signal source voltage according to the gain of the active amplifier, and the gain of the active amplifier is determined according to the target number of turns of the primary winding and the target number of turns of the secondary winding.

The invention discloses a low-voltage gallium nitride power amplifier based on second harmonic suppression. The low-voltage gallium nitride power amplifier is used for solving the technical problem that the overall efficiency of a radio frequency system is low due to an existing radio frequency power amplifier. The amplifier comprises an input stage circuit, an input stage low-voltage gallium nitride transistor, an intermediate stage circuit, an intermediate stage low-voltage gallium nitride transistor, an output stage circuit, an output stage low-voltage gallium nitride transistor group, a drain bias capacitor, a drain bias voltage port and a secondary harmonic suppression output matching network, by arranging an input-stage low-voltage gallium nitride transistor, an intermediate-stage low-voltage gallium nitride transistor, an output-stage low-voltage gallium nitride transistor group, a secondary harmonic suppression output matching network and a corresponding connection relationship, the secondary harmonic suppression output matching network can be used for suppressing a low-voltage gallium nitride transistor on the basis of a low-voltage gallium nitride process technology. Harmonic suppression is directly carried out on the second harmonic, so that the output power and the power additional efficiency of the radio frequency power amplifier are improved, and the overall efficiency of a radio frequency system is improved.

In an audio amplifier circuit, a power supply terminal receives a power supply voltage. A voltage source generates an internal power supply voltage obtained by multiplying the power supply voltage by a first gain and a bias voltage obtained by multiplying the power supply voltage by a second gain. An input gain circuit amplifies an analog audio signal with reference to the bias voltage. The input gain circuit has an input stage and a gain stage. A phase compensation capacitor is connected to the gain stage. A withstand voltage protection circuit clamps an output voltage of the gain stage to a predetermined clamp voltage.

In at least one embodiment, a method for operating a receiver includes configuring a receiver front-end circuit of the receiver according to a selected power consumption configuration. The method includes adjusting a quiescent current of a programmable flat gain stage coupled to the receiver front-end circuit according to the selected power consumption configuration to compensate for any gain loss of the receiver front-end circuit in the selected power consumption configuration. The selected power consumption configuration may be a reduced power consumption configuration and the programmable flat gain stage may be configured to at least partially compensate for the gain loss of the receiver front-end circuit in the reduced power consumption configuration.

An amplifier includes a first amplifier circuit, and a second amplifier circuit that amplifies an output signal of the first amplifier circuit. The first amplifier circuit includes a first divider that divides an input signal into a first signal and a second signal, a control amplifier that amplifies the first signal and output an amplified signal as a third signal, a second divider that divide the second signal into a fourth signal and a fifth signal having different phases at a center frequency of an operation band, a first auxiliary amplifier that amplifies the fourth signal and outputs an amplified signal as a sixth signal, a second auxiliary amplifier that amplifies the fifth signal and outputs an amplified signal as a seventh signal, and a hybrid coupler including a first end, a second end, a third end, and a fourth end.

The invention provides a four-frequency-band reconfigurable load modulation balanced amplifier structure and a regulation and control method thereof, and aims to solve the problems that in the existing power amplifier technology, the efficiency is low during power back-off, and multi-scene requirements cannot be met. The four-frequency-band reconfigurable load modulation balanced amplifier comprises a 90-degree Lange coupler of an input port and a 90-degree Lange coupler of an output port; a two-stage reconfigurable balanced power amplifier composed of an input matching network, a reconfigurable inter-stage matching network and an output-stage pre-matching network and a two-stage control signal power amplifier are combined through an active load modulation technology and a reconfigurable technology, a compact matching network is utilized, and a reconfigurable power amplifier is formed. The efficiency of output power rollback is greatly improved, and the system requirements in different frequency band application scenes can be met.

An electronic device may include wireless circuitry. The wireless circuitry can include a first input transistor, a first capacitance neutralization having a source terminal coupled to a tail node, and a second order intermodulation generation circuit configured to produce second order intermodulation signals at the tail node. The wireless circuitry can further include a second input transistor and a second capacitance neutralization transistor having a source terminal coupled to the tail node. The first and second capacitance neutralization transistors can be cross-coupled with the input transistors. A fixed or adjustable current source can be coupled to the tail node. The second order intermodulation generation circuit can include a transistor biased in a weak inversion mode.

The present disclosure provides a system for a wideband coupler balun with a load modulated power amplifier wherein the system can comprise a first port, a second port, a differential port, a differential main power amplifier, and an auxiliary power amplifier. The first port can be electrically connected to a first coupled line coupler. The second port can be electrically connected to a second coupled line coupler. The differential port can be electrically connected to the first and second coupled line coupler. The differential main amplifier can be configured to be electrically connected to the differential port. The auxiliary power amplifier can be configured to be electrically connected to the first port.