2203results about "Amplifier modifications to raise efficiency" patented technology

Described are concepts, systems, system architectures, circuits, methods, and techniques directed toward power management and control. In particular, described are concepts, systems, system architectures, circuits, methods, and techniques for implementing power converters that may not have a right-hand pole zero in their linearized, averaged control-to-output transfer function, but that may still have buck and boost functionality.

The invention provides a common-mode feedback circuit and a differential amplifier thereof, the common-mode feedback circuit comprises a sampling circuit and an amplifier circuit, the sampling circuit comprises a first input end, a second input end and a first output end, the first input end receives a first differential signal Voutp, and the second input end receives a second differential signal Voutn; the level shift module comprises a third input end, a fourth input end and a second output end, receives a common-mode signal VCMS and a reference common-mode signal VOCM output by the sampling circuit, and adjusts the common mode of the common-mode signal VCMS and the reference common-mode signal VOCM to enable the second output end to output a common-mode feedback signal VCMFB processed by the level shift module; the amplifier circuit receives a common mode feedback signal VCMFB. After the technical scheme is adopted, the same speed as that of a differential loop can be realized, the current of a main operational amplifier can be multiplexed, the power consumption of a common-mode loop is far lower than that of a main loop, and meanwhile, the common-mode level can be randomly adjusted.

A transimpedance amplifier device for an optical receiver disclosed by the present invention comprises a bias circuit, a transimpedance amplifier and an amplification driving circuit which are connected in sequence, the bias circuit comprises an upper bias structure and a lower bias structure, and the upper bias structure and the lower bias structure are both connected with the transimpedance amplifier to generate different bias currents. It is ensured that the photodiode PD1 can be conducted and generate light current when light passes through the photodiode PD1, the transimpedance amplifier is used for converting the current into voltage to be output, and the amplification driving circuit is used for amplifying the voltage. According to the optical receiver circuit, micro current generated by the photodiode can be converted into output voltage in a relatively high output range through the transimpedance amplifier, and compared with a traditional optical receiver circuit, the optical receiver circuit is relatively low in cost in circuit structure and has the advantages of low power consumption and high reliability. The driving capability of the circuit can be improved under the condition that a complex amplifier loop and a photoelectric conversion module are not needed, the output voltage in a high range is output, and the performance and the stability are further enhanced.

The present disclosure discloses a Doherty power amplifier, including: a quadrature coupler including a first coupled inductor and a second coupled inductor, the quadrature coupler being configured to split an input signal into a first signal and a second signal; a first amplifier circuit, configured to amplify the first signal; a second amplifier circuit, configured to amplify the second signal; and a load modulation network, which is an output voltage-combined Doherty load modulation network using a T equivalent model. An overlapping part of the coupled inductors is used to provide distributed parasitic capacitance, thereby eliminating the need to set an additional capacitor in the quadrature coupler, and therefore reducing an area. Through the T equivalent model, a quarter-wavelength transmission line is equated to the load modulation network of the embodiments of the present disclosure, multiple inductors are combined into transformers with small areas.

The invention relates to the technical field of radio-frequency signal processing, and discloses a 5G radio-frequency signal amplification method and system, and the method comprises the steps: decomposing an obtained radio-frequency signal into a high-frequency sub-band and a low-frequency sub-band through a multilayer wavelet packet, judging whether the radio-frequency signal is sparse in a wavelet packet domain, and carrying out the sparse reconstruction of an LI norm minimization problem if the radio-frequency signal is sparse; obtaining feature data of each sub-band, extracting a nonlinear transfer function of each sub-band through a CNN-GRU network, and carrying out transfer learning pre-training and dynamic adaptation updating; on the basis of dynamic adaptation update ending, layered memory polynomial calculation and layered model joint output construction, layered model parameter optimization is converted into a least square problem to obtain an error compensation function, and resource allocation is dynamically adjusted according to the peak-to-average power ratio of an input signal; and based on power amplifier state data, holographic sensing is performed on nonlinear parameters of the device through a fusion model, and dynamic changes of the device are compensated through multi-stage calibration and calibration delay is controlled.

A power amplifier includes a 3-dB coupler which splits a first signal into a second signal and a third signal lagging behind the second signal by 90°, a carrier amplifier, a peak amplifier, and a hybrid coupler. The carrier amplifier amplifies the second signal and outputs a fourth signal when the first-signal power level is a first level or higher. The peak amplifier amplifies the third signal and outputs a fifth signal when the first-signal power level is a second level or higher, which is higher than the first level. The hybrid coupler includes a first transmission line receiving the fourth signal at its first terminal, and a second transmission line receiving the fifth signal at its first terminal and being open at its second terminal. The first transmission line outputs, from its second terminal, an amplified first signal obtained by combining the fourth and fifth signals.

The invention discloses a multi-channel common-mode feedback high-gain amplification circuit. The circuit comprises a differential amplification module, an output end of which is connected with a load; the input end of the common-mode detection module is connected with the output end of the differential amplification module; the first input end of the error amplification module is connected with the output end of the common-mode detection module, and the second input end of the error amplification module receives reference voltage; and the multi-path feedback control module comprises at least two feedback branches which are connected in parallel, the input ends of the feedback branches are jointly connected with the output end of the error amplification module, the output ends of the feedback branches are respectively connected with different bias nodes in the differential amplification module, and the feedback branches have path impedance with gradient change. Through a dynamic division mechanism of a feedback branch, and in combination with a gain boosting unit and a hybrid compensation network, high-precision rapid establishment under a high-speed load is realized.

A power amplifier device includes a transistor die with an elongated bondpad coupled to a terminal of an integrated transistor. The device also includes a substrate formed from a stack of alternating dielectric and patterned conductive layers. An elongated die contact is exposed at a first substrate surface and is attached to the elongated bondpad to provide a uniform connection between the die contact and the elongated bondpad. A vertical interconnect structure is connected to the die contact and extends towards the second substrate surface. A circuit includes passive component(s) coupled to the second substrate surface and to the vertical interconnect structure. An encapsulation material layer covers the passive component(s) and the second substrate surface. A plurality of device interconnects are coupled to the substrate, electrically coupled to the power transistor die, and exposed at a contact surface of the power amplifier device.

An example apparatus includes: current source circuitry having a first terminal, a second terminal, a third terminal, and a fourth terminal; current sink circuitry having a first terminal, a second terminal, a third terminal, and a fourth terminal; common mode voltage circuitry having a first terminal and a second terminal, the first terminal of the common mode voltage circuitry coupled to the first terminal of the current source circuitry and the first terminal of the current sink circuitry, the second terminal of the common mode voltage circuitry coupled to the second terminal of the current source circuitry and the second terminal of the current sink circuitry; idle current source circuitry having a terminal coupled to the third terminal of the current source circuitry; and feedback current source circuitry having a terminal coupled to the fourth terminal of the current source circuitry.

In at least one embodiment, a method for operating a receiver includes configuring a receiver front-end circuit of the receiver according to a selected power consumption configuration. The method includes adjusting a quiescent current of a programmable flat gain stage coupled to the receiver front-end circuit according to the selected power consumption configuration to compensate for any gain loss of the receiver front-end circuit in the selected power consumption configuration. The selected power consumption configuration may be a reduced power consumption configuration and the programmable flat gain stage may be configured to at least partially compensate for the gain loss of the receiver front-end circuit in the reduced power consumption configuration.

An amplifier includes a first amplifier circuit, and a second amplifier circuit that amplifies an output signal of the first amplifier circuit. The first amplifier circuit includes a first divider that divides an input signal into a first signal and a second signal, a control amplifier that amplifies the first signal and output an amplified signal as a third signal, a second divider that divide the second signal into a fourth signal and a fifth signal having different phases at a center frequency of an operation band, a first auxiliary amplifier that amplifies the fourth signal and outputs an amplified signal as a sixth signal, a second auxiliary amplifier that amplifies the fifth signal and outputs an amplified signal as a seventh signal, and a hybrid coupler including a first end, a second end, a third end, and a fourth end.

An electronic device may include wireless circuitry. The wireless circuitry can include a first input transistor, a first capacitance neutralization having a source terminal coupled to a tail node, and a second order intermodulation generation circuit configured to produce second order intermodulation signals at the tail node. The wireless circuitry can further include a second input transistor and a second capacitance neutralization transistor having a source terminal coupled to the tail node. The first and second capacitance neutralization transistors can be cross-coupled with the input transistors. A fixed or adjustable current source can be coupled to the tail node. The second order intermodulation generation circuit can include a transistor biased in a weak inversion mode.

The present disclosure provides a system for a wideband coupler balun with a load modulated power amplifier wherein the system can comprise a first port, a second port, a differential port, a differential main power amplifier, and an auxiliary power amplifier. The first port can be electrically connected to a first coupled line coupler. The second port can be electrically connected to a second coupled line coupler. The differential port can be electrically connected to the first and second coupled line coupler. The differential main amplifier can be configured to be electrically connected to the differential port. The auxiliary power amplifier can be configured to be electrically connected to the first port.

The invention discloses an ultra-wideband high-linearity power amplifier with a negative feedback structure. The ultra-wideband high-linearity power amplifier comprises an input matching network, a driving-stage amplifying circuit, an inter-stage matching network, a power-stage amplifying circuit, an output matching network, a negative feedback RLC (Radio Link Control) network and a self-adaptive biasing circuit, an input radio-frequency signal is transmitted to the driving-stage amplification circuit through the input matching network for primary amplification, transmitted to the power-stage amplification circuit through the inter-stage matching network for secondary amplification and output through the output matching network, and the driving-stage amplification circuit comprises a first transistor and a second transistor. The power level amplification circuit comprises a third transistor and a fourth transistor; the self-adaptive bias circuit is used for providing self-adaptive bias voltage for the first transistor and the third transistor; the negative feedback RLC network is used for controlling the gain and bandwidth of the amplifier and comprises a driving-stage negative feedback network and a power-stage negative feedback network. The working bandwidth of the power amplifier can be widened, and the gain, the output power and the linearity of the amplifier can be improved.

The invention discloses a gain boosting type floating anti-phase dynamic amplifier circuit, and relates to the technical field of integrated circuits, the gain boosting type floating anti-phase dynamic amplifier circuit comprises a power supply, a main amplifier, a first auxiliary amplifier and a second auxiliary amplifier, and the main amplifier and the auxiliary amplifiers both adopt a cascode floating anti-phase dynamic amplifier structure; the main amplifier comprises a first power supply capacitor, a second power supply capacitor, a plurality of first common-source transistors and a plurality of first common-gate transistors; a plurality of drain electrodes of the plurality of first common-source transistors are respectively connected with the input ends of the first auxiliary amplifier and the second auxiliary amplifier, and a plurality of grid electrodes of the first common-gate transistors are respectively connected with the output ends of the first auxiliary amplifier and the second auxiliary amplifier; the first auxiliary amplifier and the second auxiliary amplifier each comprise a plurality of second common-gate transistors, and a plurality of gates of the second common-gate transistors are directly connected to the common-mode level. According to the amplifier circuit, the gain of the amplifier is improved on the premise that the speed and the stability are guaranteed.

Implementations of disclosed systems and methods are capable of changing the frequency or other waveform characteristics dynamically based on receiving feedback about the effect of an electromagnetic pulse radiation on a target electronic device. Various implementations can be configured to emit electromagnetic pulses at a single radio frequency or a plurality of radio frequencies. For example, the frequency of the carrier electromagnetic radiation in a single pulse can change during the pulse interval. As another example, a single electromagnetic pulse can comprise a frequency comb with two or more frequencies.

Described are concepts, systems, system architectures, circuits, methods, and techniques directed toward power management and control. In particular, described are concepts, systems, system architectures, circuits, methods, and techniques for implementing power converters that may not have a right-hand pole zero in their linearized, averaged control-to-output transfer function, but that may still have buck and boost functionality.

An audio amplifier includes a loop filter, at least one high pass filter (HPF) circuit, a pulse width modulation (PWM) generator, and a power stage. The loop filter is arranged to receive an audio signal and a feedback signal, and includes a first amplifier and a second amplifier, wherein the first amplifier has a first output node, and is arranged to process the audio signal and the feedback signal; the second amplifier has a first input node, and is arranged to receive a first amplifier input and a second amplifier input; and the first amplifier input is obtained from a signal path coupled between the first output node and the first input node. The at least one HPF circuit is coupled between the first amplifier and the second amplifier, and is arranged generate and output the second amplifier input according to an amplifier output of the first amplifier.

Described are concepts, systems, system architectures, circuits, methods, and techniques directed toward power management and control. In particular, described are concepts, systems, system architectures, circuits, methods, and techniques for implementing power converters that may not have a right-hand pole zero in their linearized, averaged control-to-output transfer function, but that may still have buck and boost functionality.

A power amplifier device includes a substrate, a power transistor die, and one or more surface mount components. The substrate has substrate die contacts exposed at a first substrate surface, and additional substrate contacts exposed at a second substrate surface. The power transistor die includes an integrated transistor. The transistor includes a control terminal and a first current conducting terminal coupled, respectively, to first and second die contacts at the first die surface, and a second current conducting terminal coupled to a third die contact at a second die surface. The surface-mount components are connected to the additional substrate components, and the surface-mount components are electrically coupled through the substrate to the first and second die contacts. The power amplifier device also includes an encapsulation material layer covering the surface-mount components and the second substrate surface.

A power amplification circuit may comprise a power distributor configured to receive a radio frequency (RF) signal and output a first RF signal and a second RF signal, a first power amplifier configured to receive the first RF signal from the power distributor and amplify the first RF signal based on a first bias, a second power amplifier configured to receive the second RF signal from the power distributor and amplify the second RF signal based on a second bias, an impedance matching circuit configured to receive the first RF signal amplified by the first power amplifier and the second RF signal amplified by the second power amplifier, and a protection circuit configured to identify a current input to a bias terminal of the second power amplifier and, control a magnitude of the current input to the bias terminal based on the identified input current.

A tracker circuit is provided that includes a switched-capacitor circuit configured to generate a plurality of discrete voltages and a supply modulator configured to selectively output at least one discrete voltage of the plurality of discrete voltages to a power amplifier. The switched-capacitor circuit generates the plurality of discrete voltages based on a difference between a first input voltage and a second input voltage that is variable and that is lower than the first input voltage.

Certain aspects of the present disclosure generally relate to electronic components and, more particularly, to circuitry for signal amplification for transmission. One example apparatus generally includes: a modem; a controller; a feedforward path coupled between the modem and the bias controller; and an amplifier having a main amplification path and an auxiliary amplification path, wherein the controller is configured to provide at least one bias signal for biasing the auxiliary amplification path based on information associated with a transmission signal, the information being provided by the modem to the controller via the feedforward path.

A virtual radio frequency (VRF) equalizer for an envelope tracking integrated circuit (ETIC) is disclosed. In one aspect, an ETIC provides envelope tracking (ET) for a barely Doherty (BD) power amplifier stage. The VRF equalizer includes circuitry that provides ripple cancelation that is caused by load modulation of the BD power amplifier stage. Additional circuitry is included to compensate for an amplifier within the ETIC. By canceling the ripple within the ETIC, the overall performance and efficiency of the BD power amplifier stage is improved, resulting in better performance of a transmitter in a wireless communication device.

Certain aspects of the present disclosure are directed towards techniques and apparatus for implementing concurrent matching for a transmitter and a receiver. An example transceiver may include a first amplifier, a second amplifier, a third amplifier, a first transformer, a second transformer, a first switch, and a third transformer. The first switch is coupled between a terminal of a secondary winding of the first transformer and a reference potential node.

The invention relates to a current multiplexing radio-frequency amplifier circuit which comprises an input-stage amplification unit, an output-stage amplification unit and an intermediate-stage amplification component, and the current of the power supply is input from the input-stage amplification unit or the output-stage amplification unit or the intermediate-stage amplification assembly. The power supply can be fed in from any front, middle and rear positions, and when the power supply is fed in from the front or the rear, the grounding position of the circuit can be placed on a middle stage, so that the circuit can be flexibly selected to be connected to a certain middle stage according to the linearity and power consumption requirements; and the reconfigurable current multiplexing can be realized by switching the switch configuration according to an actual application scene, so that the high-low gain mode switching, the gain dynamic adjustment and the system power consumption reduction are realized.

Composite cascode power amplifiers for envelope tracking applications are provided herein. In certain embodiments, an envelope tracking system includes a composite cascode power amplifier that amplifies a radio frequency (RF) signal and that receives power from a power amplifier supply voltage, and an envelope tracker that generates the power amplifier supply voltage based on an envelope of the RF signal. The composite cascode power amplifier includes an enhancement mode (E-MODE) field-effect transistor (FET) for amplifying the RF signal and a depletion mode (D-MODE) FET in cascode with the E-MODE FET.

In on example, an apparatus includes: a first power amplifier (PA) to receive a first input radio frequency (RF) signal and output a first amplified RF signal; a second PA to receive a second input RF signal and output a second amplified RF signal; and a transformer circuit coupled to an output of the first PA and an output of the second PA. The transformer circuit is to provide, to a load circuit, an RF output signal comprising the first amplified RF signal and the second amplified RF signal.

The present disclosure is an open-loop digital PWM envelope tracking system with dynamic boost function. Systems, apparatuses, and methods are described for dynamically boosting (increasing) the supply voltage of an envelope tracking (ET) modulator in a transmitter system when the target / desired PA supply voltage exceeds a pre-determined threshold (e.g., the pre-determined threshold is equal to the available supply voltage of the system, such as the battery voltage). By boosting the supply voltage input to the ET modulator, the modulated supply provided to the power amplifier (PA) is also increased. As such, voltage clipping, which typically occurs when the target / desired PA supply voltage is higher than the available supply voltage, is mitigated or avoided, and the distortion of the transmitted signal is reduced.

The present power amplifier linearizing module linearizes operation of a power amplifier and operates in parametrizing mode and operation mode. A processing module executes a feed-forward transfer functions set, which includes at least: a transfer function P and a summing function. The transfer function P derives a change signal ΔVa relative to the control signal component received and the summing function summing the incremental change signal ΔVa to an input signal to generate an adjusted input signal. A transfer function G uses the adjusted input signal to generate an RF signal representative of the amplifying of the adjusted input signal based on the control signal component. The processing module determines a linearizing control signal component based on the generated RF signal representative.