723results about "Amplifier modifications to raise efficiency" patented technology

An electronic device may include wireless circuitry. The wireless circuitry can include a first input transistor, a first capacitance neutralization having a source terminal coupled to a tail node, and a second order intermodulation generation circuit configured to produce second order intermodulation signals at the tail node. The wireless circuitry can further include a second input transistor and a second capacitance neutralization transistor having a source terminal coupled to the tail node. The first and second capacitance neutralization transistors can be cross-coupled with the input transistors. A fixed or adjustable current source can be coupled to the tail node. The second order intermodulation generation circuit can include a transistor biased in a weak inversion mode.

In on example, an apparatus includes: a first power amplifier (PA) to receive a first input radio frequency (RF) signal and output a first amplified RF signal; a second PA to receive a second input RF signal and output a second amplified RF signal; and a transformer circuit coupled to an output of the first PA and an output of the second PA. The transformer circuit is to provide, to a load circuit, an RF output signal comprising the first amplified RF signal and the second amplified RF signal.

A method includes determining whether an audio signal processed in a class-D amplifier is clipping. Responsive to clipping of the audio signal, a speaker voltage is estimated as a ratio of a power supply voltage of the class-D amplifier to a resistance of a speaker driven by the class-D amplifier. An amplitude of the audio signal is controlled based on the speaker voltage.

A current leakage mitigation circuit is provided. The circuit includes a charge storage circuit for receiving a control signal output, and a correction circuit connected to a bottom plate of the charge storage device. The control signal is output by an amplifier circuit connected to the current leakage mitigation circuit. The correction circuit samples the control signal, applies a filter to the control signal for to extracting a predefined frequency component, amplifies the filtered control signal, and applies the amplified control signal to the bottom plate of the current storage device.

An amplifier circuit includes first and second amplifiers, first and second input-side coils, first and second output-side coils, a resistance element, a first switch including first to fourth terminals, and a second switch including fifth to seventh terminals. The first input-side coil is connected between the first amplifier and the first terminal, the second input-side coil is connected between the second amplifier and the third terminal, the first output-side coil is connected between a signal output terminal and the second terminal, the second output-side coil is connected between the fifth terminal and the fourth terminal, and the resistance element is connected between the sixth terminal and the ground.

A radio frequency (RF) power amplifier based on transformer matching is provided. The RF power amplifier includes: a first-stage amplification circuit configured with an input terminal and an output terminal, wherein the output terminal of the first-stage amplification circuit is configured to be connected to one terminal of a main coil of a first transformer; the first transformer configured to include the main coil and a secondary coil, wherein one terminal of the secondary coil is grounded and the other terminal of the secondary coil is connected to a medium-low power mode input terminal of a power switch; the second-stage amplification circuit configured with an input terminal for receiving the amplified RF signal from the first-stage amplification circuit, wherein an output terminal of the second-stage amplification circuit is configured to be connected to a high power mode input terminal of the power switch.

The invention provides an error amplifier for peak current mode control and a converter system. The error amplifier comprises a transconductance amplifier, a voltage clamping module, a voltage-current converter, a slope compensation module, a current clamping module and a mirror image tube, the negative end of the transconductance amplifier is used for loading feedback voltage, and the positive end is used for loading reference voltage; the output end of the transconductance amplifier, the output end of the voltage clamping module and the input end of the voltage-current converter are electrically connected; the voltage-current converter generates error current; the slope compensation module is used for performing slope compensation on the error current to generate a compensated current; the output end of the slope compensation module, the output end of the current clamping module and the positive end of the high-side comparator are electrically connected with a second reference node; and the mirror image tube is used for loading the comparison voltage to the positive end of the high-side comparator. The error amplifier provided by the invention can realize more stable mode switching and more accurate current limiting control.

Embodiments of the present disclosure include adaptive bias control of cascode drivers in envelope tracking power amplifier devices, systems, and methods. In some aspects, a wireless communication device is disclosed that includes a power amplifier. The power amplifier may include a driver stage configured to receive a variable voltage supply signal, and a power amplifier stage following the driver stage. In some embodiments, the driver stage includes a cascode gate bias circuit configured to receive a first signal that is based on the variable voltage supply signal; and a cascode amplifier stage comprising a first field effect transistor (FET) and a second FET in a stacked configuration. The cascode gate bias circuit may be further configured to adaptively convert the first signal into a bias signal for a gate of the first FET. The power amplifier stage may be configured to generate an amplified signal based on the intermediate output.

A power amplifier system is disclosed with a carrier amplifier having a carrier bias input and a carrier supply node and a peaking amplifier having a peaking bias input and a peaking supply node. Also included is an envelope tracking power supply having a modulated voltage supply output coupled to the peaking supply node. Further included is a peaking bias controller having a peaking bias control input coupled to the peaking supply node and a peaking bias control output coupled to the peaking bias input, wherein the peaking bias controller is configured to generate in response to a modulated peaking supply voltage generated by the envelope tracking power supply at the peaking supply node a modulated peaking bias signal that controls bias of the peaking amplifier.

The invention belongs to the technical field of stability compensation circuits, and particularly relates to a stability compensation circuit structure of a high-speed operational amplifier, which is characterized by comprising a function module, a first control module, a second control module, a third control module, a fourth control module and a fourth control module, and the function module comprises an input stage, a differential common-base gain stage, a common-base level converter module and an output stage, and the stability compensation assembly comprises a dual-frequency load unit which is matched with the functional module and comprises a low-frequency load branch and a high-frequency load branch which are connected in parallel. Through the synergistic effect of the double-frequency load unit and the pole regulation and control capacitor, gain segmentation regulation and control of low-frequency high gain and high-frequency fast attenuation are achieved, the open-loop gain of the operational amplifier breaks through the limitation of 30dB of an existing HBT single-stage operational amplifier, and meanwhile the problem that high-frequency phase shift changes too fast is effectively restrained; through simulation verification, the phase margin can reach 67 degrees, the stability requirement of 45-60 degrees and above of an analog circuit is met, and the core contradiction that the high-gain bandwidth and the phase margin of an HBT device are difficult to balance is thoroughly overcome.

A broadband Doherty power amplifier is provided, which includes a power divider, a carrier power amplifier circuit, a peak power amplifier circuit, and a load modulation network. The carrier power amplifier circuit includes a carrier input matching circuit, a carrier power amplifier, and a carrier output matching circuit. The peak power amplifier circuit includes a peak input matching circuit, a peak power amplifier and a peak output matching circuit. A resistance value of a system load is ZL. An output impedance of the carrier output matching circuit is Zm and meets Zm=ZL(n+1). An output impedance of the peak output matching circuit is Zp and meets Zp=ZL(n+1) / n. The load modulation network is configured to set an impedance of a combination point to be ZQ, whose resistance value is ZL. A method of implementing a broadband Doherty power amplifier is further provided.

A load modulation amplifier is disclosed having a first amplifier and a second amplifier. An input quadrature coupler and an output quadrature coupler are coupled between the first amplifier and the second amplifier. A splitter has a first splitter output, a splitter input coupled to a signal input, and a second splitter output coupled to a second port of the input quadrature coupler, and a variable attenuator is coupled between the first splitter output and a first port of the input quadrature coupler. An attenuation controller has a controller output that is coupled to an attenuation control input of the variable attenuator, wherein the attenuation controller autonomously generates a control signal in response to a power sample signal in proportion to a radio frequency signal received at the radio frequency signal input.

Envelope tracking power amplifiers with advanced gain shaping are provided. In certain implementations, a power amplifier system includes a power amplifier that amplifies a radio frequency (RF) signal and an envelope tracker that controls a voltage level of a supply voltage of the power amplifier based on an envelope of the RF signal. The power amplifier system further includes a gain shaping circuit that generates a gain shaping current that changes with the voltage level of the supply voltage from the envelope tracker. For example, the gain shaping circuit can include an analog look-up table (LUT) mapping a particular voltage level of the supply voltage to a particular current level of gain shaping current. Additionally, the gain shaping circuit biases the power amplifier based on the gain shaping current.

The invention discloses a communication method based on a low-noise high-dynamic full-wave radio frequency channel amplification circuit, and relates to the field of wireless communication and radio frequency integrated circuits. The method comprises the following steps: firstly, sampling a baseband signal and constructing a multi-dimensional time sequence feature vector containing a historical state and a change rate; predicting a signal envelope peak value in a future time window by using a lightweight long short-term memory network (LSTM); a dynamic bias control signal is then generated based on reverse mapping and parasitic parameter compensation. Digital delay is introduced into a radio frequency main path, so that bias voltage is pre-loaded to a grid electrode of an amplifier before a radio frequency signal arrives, and negative delay control is realized; and finally driving the amplifier through asymmetric filtering. According to the invention, the problem of signal truncation distortion caused by response lag in the traditional dynamic bias technology is solved, the amplifier is in a deep AB-class or B-class state of low quiescent current for a long time while ensuring no distortion in a high dynamic range, the power consumption and the thermal noise are greatly reduced, and the signal-to-noise ratio of the system is improved.

The invention provides a noise acquisition device and a noise measurement device of an operational amplifier. The noise acquisition device comprises a preset resistor matched with a target operational amplifier, a total noise acquisition circuit and a resistance noise acquisition circuit, the total noise acquisition circuit acquires the total noise of the current working environment and amplifies the total noise so as to output the amplified total noise to external preset measurement equipment; the resistance noise acquisition circuit acquires and amplifies first noise correspondingly generated by the preset resistor in the current working environment and carries out amplification processing so as to output the amplified first noise to preset measurement equipment. The total noise and the first noise are collected, the first noise is used for compensating the total noise to obtain the noise of the target operational amplifier, and the defects that measurement cannot be conducted due to the fact that the bottom noise of the spectrum analyzer is too large and the measurement accuracy is reduced due to the first noise are overcome; low-ripple positive and negative direct-current power supply voltage is provided, and the size is small; the spatial noise coupling interference is reduced, and the accuracy is improved.

A high voltage driver is provided that includes a PMOS stack of transistors arranged in series between a power supply node and an output node. The high voltage driver also includes an NMOS stack of transistors arranged between the output node and ground.

A transmitter is provided that determines a compression of an envelope-tracking amplifier using a function of the amplifier's power supply voltage, input signal voltage, and output signal voltage. An input signal adjustment circuit adjusts the input signal to the envelope-tracking amplifier responsive to a difference between the compression and a desired fixed value for the compression.

A Doherty amplifier includes: a carrier amplifier to amplify a first high frequency signal having a first higher harmonic and a second higher harmonic; a peak amplifier to amplify a second high frequency signal having the first higher harmonic and the second higher harmonic; a first series resonant circuit connected between an output end of the carrier amplifier and a ground, and configured to resonate at the frequency of the first higher harmonic; a second series resonant circuit connected between an output end of the peak amplifier and the ground, and configured to resonate at the frequency of the first higher harmonic; a first parallel resonant circuit configured to resonate at the frequency of the second higher harmonic; and a second parallel resonant circuit configured to resonate at the frequency of the second higher harmonic.

The application is suitable for the field of power electronics, and provides a high-voltage amplifier control method, device and equipment. The method generates a dynamic power supply voltage rail, and extracts an error signal of the target output. The error signal is decomposed into at least two frequency components, and is processed respectively by using differentiated amplification strategies. The processed components are combined into a compensation signal, which is superimposed with the power supply voltage rail, so as to generate a final output signal with high fidelity. The application improves the efficiency by using dynamic power supply, and at the same time, the residual error signal is divided into frequency and compensated by using differentiated strategies, so that various distortions and noises are effectively eliminated, and the unification of high efficiency and high precision is realized.

This Doherty amplifier is configured comprising: a first output circuit (6) having a first transmission line for transmitting a first signal output from a carrier amplifier (4), and outputting the first signal after transmission by the first transmission line to a load (9); and a second output circuit (7) having a second transmission line for transmitting a second signal output from a peak amplifier (5), and outputting the second signal after transmission by the second transmission line to the load (9). The first transmission line is provided with: a first T-type circuit (11) having one end connected to the output side of the carrier amplifier (4) and having the load (9) and the other end connected thereto; and a first capacitor (12) having one end connected to the other end of the first T-type circuit (11) and the other end grounded. The second transmission line is provided with: a second T-type circuit (21) having one end connected to the output side of the peak amplifier (5); a second capacitor (22) having one end connected to the other end of the second T-type circuit (21) and having a load (9) and the other end connected thereto; and a third capacitor (23) having one end connected to the other end of the second T-type circuit (21) and the other end grounded.

A method and apparatus for linearizing a transmission amplifier of a transmitter within a wireless network comprising the steps of transmitting (S1) a test signal which comprises a preamble and a ramp signal by the transmitter of the wireless network; receiving (S2) the test signal transmitted by the transmitter of the wireless network by at least one receiver of the wireless network; identifying (S3) the transmitter of the transmitted test signal by the at least one receiver of the wireless network on the basis of the preamble of the test signal received by the respective receiver of the wireless network; calculating (S4) a pre-distortion characteristic of the transmission amplifier of the identified transmitter by the at least one receiver of the wireless network on the basis of the distorted ramp signal of the test signal received by the receiver of the wireless network; transmitting (S5) a retransmission signal which comprises a preamble and the calculated pre-distortion characteristic of the transmission amplifier of the identified transmitter by the receiver of the wireless network to the identified transmitter of the wireless network; and linearizing (S6) the transmission amplifier of the transmitter on the basis of the pre-distortion characteristic of the retransmission signal received by the transmitter of the wireless network from the receiver of the wireless network.

Provided is a dual-drive based Doherty amplifier that includes a first power amplifier and a second power amplifier that is in parallel with the first power amplifier. The first power amplifier is configured to receive a first portion of a signal having a first phase, and the second power amplifier is configured to receive a second portion of the signal having a second phase that has a phase difference from the first phase. At least one of the first power amplifier or the second power amplifier includes a dual-drive power amplifier core.

A Doherty amplifier according to the present disclosure comprises a main amplifier, an auxiliary amplifier, a distribution circuit that distributes signals to the main amplifier and the auxiliary amplifier, and a phase compensation circuit. The main amplifier has a first input matching circuit and a plurality of main amplification stages. The auxiliary amplifier has a second input matching circuit and a plurality of auxiliary amplification stages. The distribution circuit has a first line connected to the first input matching circuit and a second line connected to the second input matching circuit. The electrical length of the first line is such that the input impedance of the first line is higher than the characteristic impedance of the first line and the imaginary component is less than 10% of the real component when a small signal is input. The electrical length of the second line is such that the input impedance of the second line is higher than the characteristic impedance of the second line and the imaginary component is less than 10% of the real component when a small signal is input. The phase compensation circuit is provided in an inter-stage matching circuit of the plurality of main amplification stages or the plurality of auxiliary amplification stages.

The present application can provide a voltage control device for controlling the supply voltage of a power amplifier, the voltage control device comprising: a first processing circuit configured to provide a first supply voltage to at least one driver stage amplifier of the power amplifier; and a second processing circuit configured to provide a second supply voltage to an output stage amplifier of the power amplifier, wherein the first supply voltage is generated according to an average power tracking mechanism related to an average power level of a radio frequency signal transmitted by the power amplifier. By using the present application, the supply voltage of the power amplifier can be better controlled.

A communication device includes a power amplifier that generates power signals according to one or more operating bands of communication data, with the amplitude being driven and generated in output stages of the power amplifier. The final stage can include an output passive network that suppresses suppress an amplitude modulation-to-phase modulation (AM-PM) distortion. During a back-off power mode a bias of a capacitive unit of the output power network component can be adjusted to minimize an overall capacitance variation. A output passive network can further generate a flat-phase response between dual resonances of operation.

Provided in the present application are a power amplification assembly, a power amplifier and a communication device, which relate to the technical field of communications, and are used for solving the problem of a relatively low degree of integration of a power amplifier not being conducive to realizing a compact design. In the power amplification assembly provided in the present application, both a carrier transistor and a peak transistor are located on a first surface of a substrate; a conductive layer is located on both the side of the carrier transistor that is away from the substrate and the side of the peak transistor that is away from the substrate; a first signal output terminal of the carrier transistor and a second signal output terminal of the peak transistor are connected to the conductive layer by means of a conductive structure; and the conductivity distance between the second signal output terminal and a combining point between the first signal output terminal and the second signal output terminal is less then or equal to λ / 16. In the power amplification assembly provided in the present application, a stacked structural design can be realized, and the conductive structure and the conductive layer can realize impedance matching and phase matching between the carrier transistor and the peak transistor, featuring relatively high degrees of integration and compactness.

Disclosed in the present invention is a floating inverter amplifier based on capacitor stacking, which boosts a power supply of the floating inverter amplifier to 2 times VDD by means of the capacitor stacking; under such condition, a transistor in the inverter may be better turned on, and a cascode structure can be applied to an inverting amplifier operating at a low power supply voltage. Furthermore, an ADC system employing the floating inverter amplifier of the present invention can process an input signal with a common-mode voltage of VDD and an amplitude up to 2 times VDD, which effectively addresses a problem of a reduced input signal amplitude under an ultra-low voltage, thereby increasing a signal-to-noise ratio of the system.

A power amplification system is provided herein. In certain embodiments, the power amplification system comprises: a power amplifier configured to amplify an input radio frequency (RF) signal to generate an output RF signal when powered by a supply voltage and biased by a biasing signal; an envelope tracker configured to generate an envelope signal that changes in relation to an envelope of the input RF signal; a mode controller configured to set an envelope tracking (ET) mode of the power amplification system based on a modulation bandwidth of the input RF signal; a supply voltage controller configured to control the supply voltage based on the envelope signal when the ET mode is set to a first mode; and a bias controller configured to control the biasing signal based on the envelope signal when the operation mode is set to a second mode.