1734 results about "Current mirror" patented technology

The invention discloses a power-on reset circuit, and relates to the technical field of integrated circuits, in order to eliminate static power consumption of the power-on reset circuit and reduce power consumption of the power-on reset circuit, the power-on reset circuit comprises a discharge delay circuit, a current mirror circuit and a buffer circuit; the discharge delay circuit comprises a capacitor and an NMOS (N-channel Metal Oxide Semiconductor) tube M4, and the NMOS tube M4 is used for discharging the capacitor; the current mirror image circuit comprises an NMOS tube M2, an NMOS tube M3 and a PMOS tube M9. The grid electrode of the NMOS tube M2 and the grid electrode of the PMOS tube M9 are respectively connected with the output end of the buffer circuit; the grid electrode of the NMOS tube M3 is respectively connected with the source electrode of the PMOS tube M9, the drain electrode of the NMOS tube M2 and the grid electrode of the NMOS tube M4; the current mirror image circuit is used for turning off the NMOS tube M2 after the reset signal is ended, and pulling up the drain electrode voltage of the NMOS tube M3 to the power supply voltage through the PMOS tube M9, so that the NMOS tube M3 enters a deep linear region, and a direct current path from the power supply to the ground in the current mirror image circuit is cut off; and the buffer circuit is used for outputting a reset signal according to the voltage change of the capacitor in the discharge delay circuit.

The invention relates to a high-precision temperature sensor based on complementary dynamic element matching and a zoom analog-to-digital converter and a working method, and belongs to the technical field of sensor improvement, and the sensor comprises an analog front end, an analog-to-digital converter, a digital rear end and a control logic. An improved chopping technology is adopted, and one clock signal is adopted to control two sub operational amplifiers, so that the output stability and precision of the analog front end are improved. A complementary dynamic element matching technology is utilized, errors caused by voltage drop at the two ends of a switch are reduced, the influence of channel charge injection is counteracted, a scaling type analog-to-digital converter design is provided for an analog-to-digital conversion part, and balance among power consumption, speed and precision is achieved. According to the method, a 10-bit successive approximation register analog-to-digital converter is used for measuring a numerical value and a change trend, and the numerical value and the change trend are analyzed, so that the expression effects of a current mirror structure, a transistor, a filter and the like are evaluated, the aging of the transistor is found in advance, and a clear direction is provided for future design improvement.

The invention discloses a low-output-ripple automatic-current-sharing interleaving buck converter and a control method thereof.The converter comprises a main power circuit and an auxiliary compensation circuit, and the main power circuit adopts two interleaving main branches to achieve voltage conversion and energy transmission; automatic current sharing of the circuit is realized through the integrated network switch module and PWM signal control; the auxiliary compensation circuit adopts a current mirror image compensation principle, and adjusts the magnitude of the compensation current by comparing the difference between the output current of the main power circuit and the reference current, so as to effectively suppress the output current ripple; the control method comprises the steps of output voltage monitoring, PI adjustment, duty ratio modulation and a complementary control mechanism, current ripple phase offset is ensured, and the system stability and efficiency are improved. Compared with the prior art, the method has the advantages that the complexity of a control system is reduced, the working efficiency is improved, the current ripples are effectively eliminated, and the method has relatively high practical value and popularization prospect.

The present disclosure provides for transimpedance amplifiers for crossbar circuits. A crossbar circuit may include a plurality of bit lines intersecting with a plurality of word lines and a plurality of cross-point devices. Each of the plurality of the cross-point devices is connected to at least one of the word lines and at least one of the bit lines. The crossbar circuit may further include a transimpedance amplifier to generate an output voltage representative of a sum of currents flowing through a first bit line of the plurality of bit line. The transimpedance amplifier may include an operational amplifier, a current mirror circuit connected to an output of the operational amplifier, and one or more resistors connected to the current mirror circuit and a supply voltage.

A turn-on circuit is configured to supply a current as a source to the gate of a high-side transistor. A first current source supplies an output current that is switchable between a first current amount and a second current amount that is smaller than the first current amount. A first switch is coupled between a first output node of a first current mirror circuit and the gate of the high-side transistor. A second current source generates a second current. A second switch is coupled between a first output node of a second current mirror circuit and the gate of the high-side transistor.

An ultra-low power consumption and high speed level shift circuit and method based on subthreshold conduction comprises an input shift circuit and a low power consumption output buffer, the input shift circuit comprises a pull-up network, a pull-down network and a feedback transistor, the pull-up network is of a current mirror structure, the pull-down network is composed of a first pull-down tube and a second pull-down tube, and the feedback transistor is connected with the first pull-down tube and the second pull-down tube. A feedback transistor is added, and when input signal high level conduction succeeds, the current mirror structure is switched off; and the second pull-down tube uses a common-gate transistor, and pulls down the output end of the input shift circuit to a low level by using the sub-threshold conduction principle of the common-gate transistor when the input signal is at a low level. According to the invention, the conversion speed of the falling edge signal in the circuit is effectively improved, the time delay is reduced, the static power consumption is ultralow, the wide voltage conversion range is provided, and meanwhile, the area is very small.

The invention discloses a rapid discharge circuit suitable for a high-voltage LDO and a discharge method thereof, the rapid discharge circuit comprises a PMOS tube M1, a PMOS tube M2, a PMOS tube M3, an NMOS tube M4, an NMOS tube M5, an NMOS tube M6, an NMOS tube M7, a current source I0 and a Zener diode Z2, the source electrodes of the PMOS tubes M1, M2 and M3 are connected with an input power supply Vin, the PMOS tubes M1, M2 and M3 form a current mirror, the drain electrode of the NMOS tube M4 and the NMOS tube M6 form a current mirror, an input signal EN controls the NMOS tube M7, and the Zener diode Z2 limits the grid voltage of the NMOS tube M5. According to the high-voltage LDO, the function of rapidly discharging the output signal Vout in the turn-off state of the high-voltage LDO can be achieved through a small turn-off current and a simple circuit structure.

In an example, a level shifter includes a low side having first and second inputs. The level shifter also includes a high side, where the high side has a latch having first and second terminals. The high side also includes a current comparator including first and second current mirrors. The high side includes isolation circuitry including first and second transistors, in which the first transistor has a first control terminal, the second transistor has a second control terminal, the first transistor is coupled between the first terminal and the first current mirror, the second transistor is coupled between the second terminal and the second current mirror, the first control terminal is coupled to the second current mirror, and the second control terminal is coupled to the first current mirror.

The invention discloses a frequency control type wide-range variable quiescent current source and a CT-sigma delta modulator, the frequency control type wide-range variable quiescent current source comprises a frequency control type bias generation circuit and a current mirror circuit, the frequency control type bias generation circuit comprises at least one capacitor bias diode circuit, and the current mirror circuit comprises at least one capacitor bias diode circuit. The bias circuit is used for generating bias voltage. The current mirror circuit is used for copying current flowing through a diode load in the capacitor bias diode circuit according to the bias voltage, and the current linearly changes along with the clock frequency. The frequency control type wide-range variable quiescent current source is simple in circuit, the scaling range of the generated variable quiescent current is large, control is easy and convenient, linear scaling of the CT-sigma delta modulator system power consumption along with the sampling frequency is achieved, and the high energy efficiency of the system under different sampling frequencies is guaranteed.

A level shifter includes: a low voltage domain configured to output non-overlapping first and second current pulses based on opposite edges of a logic input signal; and a high voltage domain comprising a latch and a current mirror circuit configured to mirror the non-overlapping first and second current pulses such that the latch is set when the first current pulse is active and reset when the second current pulse is active. The current mirror circuit includes a first mirroring path for the first current pulse and a second mirroring path for the second current pulse. The level shifter has a common mode slew current that is added to the non-overlapping first and second current pulses. The first mirroring path and the second mirroring path are cross-coupled such that the common mode slew current is reduced or cancelled before the non-overlapping first and second current pulses are input to the latch.

The present application discloses a computing-in-memory circuit, chip and electronic device, wherein the computing-in-memory circuit comprises: a resistive random access memory array, a clamping circuit, a current mirror and an analog-to-digital conversion circuit; the clamping circuit is connected between a signal input terminal and the resistive random access memory array, configured to input clamping voltage signal to the N resistive random access memories selected of the resistive random access memory array, wherein N is an integer and N≥2; the current mirror is connected between the resistive random access memory array and the analog-to-digital conversion circuit, configured to output convergence current to the analog-to-digital conversion circuit based on the N-way currents output from the N resistive random access memories selected; the analog-to-digital conversion circuit configured to convert the convergence current to a digital signal.

The invention discloses an LDO (Low Dropout Regulator) circuit compatible with a low-voltage domain and an overvoltage domain, which belongs to the technical field of LDO circuits and comprises PMOS (P-channel Metal Oxide Semiconductor) tubes P1-P14, NMOS (N-channel Metal Oxide Semiconductor) tubes N1-N17, an input IB1 and an output VOUT, wherein the PMOS transistors P1-P4 form a current mirror, the NMOS transistors N5-N9 are first voltage division structures connected by diodes, and the NMOS transistors N16-N17 are second voltage division structures connected by diodes; nMOS (N-channel metal oxide semiconductor) tubes N14-N15 and a PMOS (P-channel metal oxide semiconductor) tube P13 are used for dividing voltage under overvoltage, so that no MOS tube has overvoltage from the power supply AVDD to the ground GND; and meanwhile, the NMOS tubes N14-N15 and the PMOS tube P13 do not divide the voltage under the low voltage, so that the normal work of the LDO circuit is not influenced. According to the LDO structure compatible with the overvoltage and the low voltage at the same time through the low-voltage device, the overvoltage requirement can be met through the low-voltage device, and the requirement that the performance is not attenuated under the low voltage is met.

In an example, a system includes a first transistor having a first terminal coupled to a current mirror and a control terminal coupled to a first current source and a resistor. The system includes a second transistor having a first terminal coupled to the current mirror, a second terminal coupled to a second terminal of the first transistor, and a control terminal coupled to the resistor and a second current source. The system includes a third transistor having a first terminal coupled to a voltage terminal, a second terminal coupled to the control terminal of the second transistor, and a control terminal coupled to the first terminal of the second transistor. The system includes a fourth transistor having a control terminal coupled to the current mirror, first and second terminals coupled to one another and to the second terminal of the first transistor.

A radio frequency (RF) voltage limiter for a radio frequency identification (RFID) transponder is provided. The RF voltage limiter includes an envelope detector configured to track an envelope of a signal received at the antenna. The envelope detector has an output for providing an envelope signal. A peak detector is included and has an input coupled to the output of the envelope detector. The peak detector includes a current mirror having an input coupled to the output of the envelope detector, and an output configured to provide a control signal. A shunt circuit is coupled to provide an impedance to the antenna in response to the control signal. The impedance decreases with an increasing voltage of the control signal to limit a maximum voltage at the antenna. In another embodiment, a method is provided for limiting a RF voltage at the antenna.

The invention discloses a differential closed-loop negative feedback amplification circuit based on JFET geminate transistors, a low-noise amplifier is used for measuring weak voltage signals, discrete JFET field-effect transistors are used for forming an input stage of the low-noise amplifier, noise interference is reduced, meanwhile, extremely high input impedance can be provided by using the characteristic that the grid current of the JFET field-effect transistors is basically zero, and the differential closed-loop negative feedback amplification circuit based on the JFET geminate transistors is obtained. Mirror current is provided for a pair of JFET field effect transistors in the low-noise amplifier module through a current mirror of the low-noise amplifier, a closed-loop feedback structure of the low-noise amplifier can save one path of input for the JFET field effect transistors, so that the amplifying circuit can realize dual-channel input, and a dual-channel input structure can enable an accessed signal to be a differential signal, so that common-mode interference is effectively inhibited, and the reliability of the amplifying circuit is improved. Overall closed-loop negative feedback can achieve high gain stability, reduce nonlinear distortion, increase input impedance, reduce output impedance and improve the performance of the amplifier, and solves the problem of precise amplification and measurement of weak voltage signals in the aviation electromagnetic field.

A self-calibrating driver circuit (100, 300, 400, 500, 700) for a laser diode is disclosed. The circuit comprises a configurable current source (105, 305, 405, 505), a current mirror (115, 315, 415) configured to mirror a current from the configurable current source to a first transistor (120, 320, 420, 520, 720) and to a second transistor (125, 325, 425, 725), and a control circuit (140, 340, 440). The control circuit is configured to monitor a current through the first transistor at a first time, and to configure the current source based on the current through the first transistor to provide a desired current to the second transistor for driving the laser diode at a subsequent second time. A radiation-emitting device comprising one or more of the self-calibrating driver circuits and at least one radiation-emitting element is also disclosed.

The invention discloses a reference voltage generation module, a power supply system, an image sensor, equipment and a vehicle, the reference voltage generation module comprises a self-bias current source, a micro-current source, a first current mirror and a first reference circuit, the self-bias current source comprises the micro-current source used for generating bias current with a positive temperature coefficient, and the micro-current source is used for generating bias current with a negative temperature coefficient; the first current mirror is connected with the micro current source, and the first current mirror is of a low-voltage cascode structure and is used for performing mirror image output on the bias current; the first reference circuit is connected with the first current mirror, and the first reference circuit is used for generating a current with a negative temperature coefficient and generating a first reference voltage based on the bias current and the current with the negative temperature coefficient. The reference voltage generation module does not need to be compensated by a capacitor, so that the starting time and the response speed of the system are ensured.

The embodiment of the invention discloses a current compensation circuit, a logarithmic detector and a chip. The current compensation circuit comprises a current mirror, the current mirror comprises a first transistor and a second transistor, the first transistor and the second transistor respectively comprise a first end, a second end and a control end, and the current mirror is configured to mirror a first current flowing through the first end of the first transistor to the first end of the second transistor, the first end of the second transistor outputs compensation current; the resistance module is connected with the first end of the first transistor, and the resistance value of the resistance module and the first voltage of the first end of the first transistor are used for determining the size of the first current; the fuse module is connected with the resistor module and / or the first end of the first transistor and used for outputting a first control signal based on the fusing state, and the first control signal is used for calibrating the resistance value of the resistor module and / or the first voltage.

A capacitance measurement circuit includes an analog front-end (AFE) circuit with current mirror circuits, a parasitic capacitor, an AD converter, an output shift register, and a controller. The controller disconnects a capacitor to be measured and connects one current mirror circuit to record an AFE output voltage VN collected at an inverting input terminal of the AD converter, then connects the capacitor to be measured to collect an AFE output voltage VP at a non-inverting input terminal of the AD converter, and converts a value of (VP−VN) into a first digital signal; determines, based on the value of the first digital signal, a connection number m of the current mirror circuits, controls the analog front-end circuit to connect m current mirror circuits, and repeat the steps to obtain a second digital signal; and shift the second digital signal based on the connection number m to obtain a capacitance measurement value.

The invention discloses a low-temperature drift reference circuit, which belongs to the technical field of electronic circuits and comprises a starting unit, a reference core unit and a base current absorption unit, the starting unit is connected with the reference core unit and the base current absorption unit, and the reference core unit is connected with the base current absorption unit. According to the low-temperature-drift reference circuit, the T-type resistor network is adopted, negative temperature coefficient voltage is compensated depending on a positive temperature coefficient voltage expansion item, and low-temperature-drift reference voltage can be obtained; the magnitude of the reference voltage can be adjusted by changing the proportional relation between the resistance type and the resistance value of the resistance network and the current mirror.

An example cascode voltage regulator circuit includes a first transistor coupled to an input voltage terminal and configured as a source follower to provide an output voltage at a source terminal, a second transistor coupled in series between the source terminal of the first transistor and an output terminal, the second transistor configured as a current limiter, and a current mirror coupled between respective first and second control terminals of the first and second transistors, the current mirror configured to receive a first current indicative of a source follower current flowing through the first transistor and to turn off the second transistor by coupling the first and second control terminals together responsive to the source follower current exceeding a threshold. In an example, the first transistor is a drain-extended NMOS device and the second transistor is a drain-extended PMOS device.

The invention discloses a current sampling circuit and a current sampling method based on a gallium nitride power tube, and belongs to the technical field of circuits. A temperature compensation module in the current sampling circuit can ensure that the on-resistance proportions of a silicon sampling tube and an upper tube / a lower tube are kept consistent in different temperature ranges; when the upper tube is conducted, the first temperature compensation module controls the first negative feedback module to generate a positive current or a negative current in proportion to a sampling current, the first current mirror image module outputs the positive current or the negative current to the sampling module, and the sampling module calculates the sampling current of the upper tube according to the positive current or the negative current; when the lower tube is switched on, the second temperature compensation module controls the second negative feedback module to generate a positive current or a negative current in proportion to the sampling current, the second current mirror image module outputs the positive current or the negative current to the sampling module, and the sampling module calculates the sampling current of the lower tube according to the positive current or the negative current. According to the invention, temperature compensation can be carried out, and bidirectional current sampling can be realized.

A current leakage limit circuit connected to a circuit with current leakage and a leakage compensation circuit includes a first current mirror with a first transistor and a second transistor and a current source connected to the first transistor. The second transistor is connected between the circuit and the leakage compensation circuit and limits a compensation current flowing between the circuit and the leakage compensation circuit. The current flowing from the current source through the first transistor limits the current flowing through the second transistor.

The invention discloses a level shift circuit with a mixed structure, relates to the technical field of integrated circuits, and aims to solve the problems of long time delay and high power consumption of a level shift circuit in the prior art when the level shift circuit is converted between a low voltage domain and a high voltage domain. The circuit at least comprises a first current mirror level shift sub-circuit and a second current mirror level shift sub-circuit which are connected with a cross-coupling level shift sub-circuit; an output signal of the first current mirror level shift sub-circuit is used for reducing the pull-up strength of a first pull-up network in the cross-coupling level shift sub-circuit; the output signal of the second current mirror level shift sub-circuit is used for reducing the pull-up strength of a second pull-up network in the cross coupling level shift sub-circuit; the cross coupling level shift sub-circuit is used for cutting off quiescent current paths in the first current mirror level shift sub-circuit and the second current mirror level shift sub-circuit and realizing conversion between a low voltage domain and a high voltage domain of the circuit; therefore, level conversion between a low-voltage domain and a high-voltage domain is realized by picosecond-level delay and nanoampere-level static power consumption.

According to the feedback control circuit, the control method and the switching power supply applying the feedback control circuit, a secondary side controller serves as a main controller, and a current generation and mirror image module and a control signal generation module are arranged in the secondary side controller; the current generation and mirroring module generates a first current based on the output voltage or the signal representing the output voltage and the first voltage signal, and mirrors the first current into a second current; the control signal generation module generates a control signal based on the second current; and the secondary side controller realizes feedback control of the loop based on the control signal. Through the arrangement, an optocoupler is not needed, the current mirror image module can be compatible with an existing peripheral circuit structure, the structure is simple, and the transmission delay of the current mirror image module is far smaller than that of the optocoupler, so that unnecessary poles can be reduced, and a corresponding compensation network structure can be simplified; and the current mirror image module has better current and temperature stability and smaller temperature excursion, so that the light attenuation effect of an optocoupler can be avoided, and the service life of the current mirror image module is longer.

The invention provides a floating power supply, a circuit system and electronic equipment. The floating power supply comprises a voltage drop bias unit, a bias current source, a power supply transistor, a first voltage stabilizing transistor and a second voltage stabilizing transistor, the voltage drop bias unit carries out fixed voltage drop on an external input power supply according to the bias current of the bias current source to obtain a bias voltage and outputs the bias voltage; the power transistor follows the bias voltage to obtain a power supply voltage and outputs the power supply voltage to a load from a first end of the power transistor. The first voltage stabilizing transistor and the second voltage stabilizing transistor form a current mirror structure, and the width-to-length ratio of the first voltage stabilizing transistor and the second voltage stabilizing transistor is greater than 1, so that the load current flowing through the power supply transistor is at least doubled, and the area requirement on the power supply transistor is at least doubled, namely, the influence of power supply voltage jump on the bias of the power supply transistor is reduced; therefore, rapid stabilization of the power supply voltage can be realized through a current source with smaller output, and finally low-cost and low-power-consumption power supply voltage stabilization is realized.

A power converter for dynamically adjusting voltage headroom based on a current is provided. The power converter includes a high-side switch, a low-side switch, a sensor circuit, a current source, a mirror circuit, a reference voltage adjusting circuit and a control circuit. The sensor circuit senses a current flowing through a power receiving component to output a sensed current to a first terminal of a first transistor of a current mirror. A first terminal of the second transistor of the current mirror is connected to the current source. The reference voltage adjusting circuit sets a reference voltage according to a current from a node between the first terminal of the second transistor and the current source. The control circuit controls the high-side switch and the low-side switch according to the reference voltage.

In an example, a system includes an amplifier having an output stage configured to provide an output voltage, where the output stage includes a p-channel transistor and an n-channel transistor. The system includes a sense transistor having a gate coupled to a gate of the p-channel transistor, where the sense transistor is configured to sense a current of the p-channel transistor and produce a sense current. The system includes a current mirror coupled to the sense transistor and configured to provide the sense current to a gate of a control transistor, the control transistor having a source coupled to the gate of the p-channel transistor. The system includes a reference current source coupled to the control transistor and configured to provide a reference current. The control transistor is configured to adjust a gate current provided to the p-channel transistor based on comparing the sense current to the reference current.

The invention discloses a high-performance reference voltage implementation method and circuit. The method comprises the following steps: constructing a framework adaptive to low power supply voltage, and determining initial working parameters by selecting a conventional CMOS (Complementary Metal-Oxide-Semiconductor Transistor) process device; a low reference voltage value generation module is designed, a low-voltage NMOS device in a sub-threshold region is matched with a current mirror and a resistance network to output accurate low voltage, and interference is suppressed. First-order and second-order temperature compensation is implemented, and the temperature stability of the reference voltage is improved by utilizing devices with different temperature characteristics and specific NMOS electric leakage characteristics at high temperature. An ultra-low power consumption OP is designed, a low-voltage NMOS and a high-voltage native device are combined, and a bias circuit is optimized. The circuit integrates a low reference voltage module, a first-order temperature compensation module, a second-order temperature compensation module, an ultra-low power consumption OP module and the like. Finally, the working power supply voltage as low as 1V, the power consumption smaller than 100nA and the excellent second-order temperature compensation effect in the full-temperature range are achieved, and stable and accurate reference voltage is provided for related circuits.

A biasing circuit for biasing an output transistor in a radio frequency (RF) amplifier includes a first field-effect transistor (FET) monolithically integrated with the output transistor, the first FET being connected to the output transistor in a current mirror configuration, such that a gate-to-source voltage of the first FET is the same as a gate-to-source voltage of the output transistor, and a drain current in the first FET is matched to a drain current in the output transistor and scaled proportionally according to a size of the first FET relative to a size of the output transistor. The biasing circuit further includes a voltage divider integrated with the first FET and connected to a current source, the voltage divider being configured to generate a voltage that is substantially independent of process, voltage and / or temperature variations for controlling the drain current in the first FET.