199 results about "Charge injection" patented technology

The invention relates to a high-precision temperature sensor based on complementary dynamic element matching and a zoom analog-to-digital converter and a working method, and belongs to the technical field of sensor improvement, and the sensor comprises an analog front end, an analog-to-digital converter, a digital rear end and a control logic. An improved chopping technology is adopted, and one clock signal is adopted to control two sub operational amplifiers, so that the output stability and precision of the analog front end are improved. A complementary dynamic element matching technology is utilized, errors caused by voltage drop at the two ends of a switch are reduced, the influence of channel charge injection is counteracted, a scaling type analog-to-digital converter design is provided for an analog-to-digital conversion part, and balance among power consumption, speed and precision is achieved. According to the method, a 10-bit successive approximation register analog-to-digital converter is used for measuring a numerical value and a change trend, and the numerical value and the change trend are analyzed, so that the expression effects of a current mirror structure, a transistor, a filter and the like are evaluated, the aging of the transistor is found in advance, and a clear direction is provided for future design improvement.

The invention discloses a charge control method and a digital control system based on a dual-active bridge resonant converter, and belongs to the technical field of dual-active bridge resonant converter control. According to the method, a resettable integrating circuit is used for sampling resonance current and converting the resonance current into integrating voltage which is in a linear relation with charge injection quantity, and an integrating capacitor is discharged and reset before each time of injection; superposing the integral voltage and the ramp voltage; comparing the superposed signal with a threshold voltage output by a current loop through a comparator, and when the superposed signal reaches a threshold value, triggering to generate a PWM signal and switching the working mode of the converter; a switching tube is controlled to act according to a PWM signal, a switching time sequence is dynamically adjusted, effective control over transmission power is achieved, and a digital control system for achieving the method is established. According to the method, rapid dynamic response, efficient power transmission and stable operation of the dual-active bridge resonant converter are realized by controlling resonance current integration and a switching time sequence, and the energy conversion efficiency and the system reliability are effectively improved.

The invention belongs to the technical field of electrical experiments, and particularly relates to an insulating material charge accumulation and flashover device and method under different tangent and normal electric fields, an insulating sample wafer of the device is arranged on a surface flashover assembly, and the surface flashover assembly is provided with an electrode assembly with an adjustable inclination angle; a lower plate electrode is arranged in the middle of an insulating support, a supporting rod assembly vertically penetrates through a middle through hole of the lower plate electrode to make contact with a polytetrafluoroethylene insulating plate, an insulating sample piece is arranged above the polytetrafluoroethylene insulating plate, the polytetrafluoroethylene insulating plate is hinged to the lower plate electrode, and the lower end of the supporting rod assembly is connected with a rotary driving mechanism. The rotary driving mechanism drives the supporting rod assembly to move to incline the insulating sample, and the lifting driving mechanism drives the supporting rod assembly to vertically move to enable the insulating sample to be in contact with the electrode assembly; the device has the capabilities of charge injection and charge measurement of the insulation sample wafer and measurement of flashover voltage and initial voltage along the surface of the insulation material under different tangential and normal electric fields.

The invention belongs to the field of integrated circuits, and particularly relates to a charge pump circuit for a phase-locked loop, a charge pump module, the phase-locked loop and a communication chip. The charge pump circuit adopts a source switch single-end topology, and a numerical control current source DAC with an adaptive compensation circuit and two rail-to-rail operational amplifiers are applied. According to the source electrode switch single-end topology, the switch time sequence is dynamically optimized through a three-state working mode, and the charge injection effect and clock feed-through interference are remarkably reduced; the numerical control current source realizes multi-stage high-precision programmable current output according to a control code, responds to the change of output voltage in real time by utilizing a self-adaptive compensation mechanism, and maintains the stability of charging and discharging current; the rail-to-rail operational amplifier eliminates the common-mode constraint in a full-swing input range by connecting an NMOS-PMOS differential pair structure in parallel. The charge pump circuit overcomes the defects of a charge pump circuit adopted in an existing phase-locked loop in the aspects of output swing, stability and the like, static power consumption can be reduced to the microampere level, and the advantages are obvious.

The invention discloses a structure control piece of a crimping type interface connector and a manufacturing process, and the manufacturing process comprises the steps: enabling a plurality of inner conductor terminal monomers to be distributed and installed in a positioning bracket according to a preset array, and forming a preliminary positioning unit of a terminal; preassembling an interface connector and a heat dissipation type shielding cover, then integrally loading the positioning bracket and the terminal into a cavity of an injection mold, and carrying out secondary clamping and fixing on the terminal through a guide structure and an elastic micro-clamp which are arranged in the injection mold; a segmented injection molding mode is adopted, pre-filling injection molding is conducted on the peripheral area of a terminal at low pressure and low speed, a terminal array is preliminarily wrapped and fixed by melt, then the main injection molding stage is switched to fill a remaining cavity of a mold, the temperature of the mold is adjusted through a partition temperature control system in the process, and an integrated main body structure is formed; therefore, melt impact and residual stress are reduced, reliable sealing of the terminal and the shell is ensured, the conditions of inaccurate alignment and poor plugging during crimping assembly with a PCB are avoided, and the assembly consistency and the yield of a production line are improved.

The invention belongs to the technical field of gate voltage bootstrapped switches, and discloses a high-performance gate voltage bootstrapped switch for a Sigma-Delta ADC, a PMOS switch circuit is introduced into an NMOS type gate voltage bootstrapped switch circuit to form a complementary switch, and the complementary switch is used for counteracting an output error caused by a clock feed-through effect of an NMOS switch and the PMOS switch; virtual tubes are added to the input and output ends of the NMOS switch and the PMOS switch by using an inverter chain and are used for absorbing channel charges of the switch tubes; the substrate potential of the NMOS switch and the substrate potential of the PMOS switch are connected into the switching circuit, so that the substrate potential of the switching tube is switched between GND and input voltage Vin, and on the premise that sampling / maintaining precision is guaranteed, interference of clock feed-through and charge injection in the switching tube on output signals is restrained, and the linearity of the grid voltage bootstrapped switch is improved.

A wavelength-tunable optical filter includes a plate-like first component, a plate-like second component, a first reflective film, and a second reflective film. The wavelength-tunable optical filter also includes a first transparent electrode and a second transparent electrode that serve as a voltage applying part that applies a voltage in the thickness direction of the first component, and as a charge injecting part that injects electric charge into the first component. The first transparent electrode is formed on a first incident surface, and is ohmically connected to the first component. The second transparent electrode is formed between a first emission surface and the first reflective film, and is ohmically connected to the first component.

The present invention discloses a method and system for obtaining the charge injection barrier at a metal / polymer interface. The method comprises the following steps: obtaining a metal / polymer interface model based on first principles, according to the metal / polymer interface for which the charge injection barrier is to be obtained; obtaining the metal surface work function, vacuum energy level difference, polymer electron affinity, and ionization energy based on first principles, the polymer molecular chain structure model, and the metal / polymer interface model; and calculating the charge injection barrier at the metal / polymer interface based on the obtained physical quantities and the definition of the metal / insulating material charge injection barrier in energy band theory. This method solves technical problems in the prior art, such as the significant influence of external interference on the results; the difficulty in standardizing the experimental process for different polymer materials and metal electrode materials; and the lack of a complete theoretical basis for the method.

The invention provides an organic electrochemical transistor and stimulating electrode array based on PEDOT: PSS and a preparation method thereof. The electrode array comprises an OECT based on PEDOT: PSS and a stimulating electrode with a PEDOT: PSS coating, a PEDOT: PSS channel and the PEDOT: PSS coating which are made of the same modified PEDOT: PSS material are different in thickness, and the material is obtained through the following steps that ionic liquid is taken and diluted with deionized water, the diluted ionic liquid is doped into PEDOT: PSS dispersion liquid, then a cross-linking agent is added, and full stirring is conducted. A pit with submicron depth is etched in a stimulating electrode area on a poly-p-xylylene substrate, only one-time spin coating of a PEDOT: PSS solution is needed, or the poly-p-xylylene substrate is not etched, multiple times of spin coating are carried out through a photoresist mask, and OECT channels and stimulating electrode modified coatings with different thicknesses in an electrode array can be obtained at the same time. And the advantages of high signal-to-noise ratio of the OECT and strong charge injection capability of the modified stimulating electrode can be fully exerted, so that co-optimization of the collection performance of the OECT and the electrical stimulation performance of the stimulating electrode is realized.

The present application relates to a kind of organic electron transport material and its preparation method and application, which is with triazine group as center core, pyridine is the conjugated organic small molecule material of outer ring substitution, the synthetic route of the organic small molecule material is simple, low in cost, higher yield, less environmental pollution;With the organic small molecule as electron transport layer, the problem of charge injection imbalance is well solved, especially in quantum dot light emitting diode (QLEDs), greatly improves the QLEDs device performance and stability, which has extremely great significance to the application field of QLEDs.

Analog front-end (AFE) system with an anti-aliasing filter circuit including a filter bypass switch configured to provide charge injection and / or clock pass-through independent of an input signal, wherein the AFE system comprises: at least one sampling capacitor of an analog-to-digital converter (ADC) circuit configured to sample an output of the anti-aliasing filter circuit; an amplification or buffer circuit with an input for receiving the input signal; and the anti-aliasing filter circuit coupled to an output of the amplification or buffer circuit, wherein the filter circuit comprises the following: a filter resistor; a filter capacitor coupled to one terminal of the filter resistor; and the filter bypass switch, which is connected in a bootstrapped configuration to pull a control terminal of the filter bypass switch above or below a supply voltage, wherein the filter bypass switch is connected in parallel to the filter resistor, wherein the filter bypass switch has an ON state and an OFF state, wherein, when in the ON state, the filter bypass switch is configured to bypass the filter resistance, allowing the amplification or buffer circuit to drive the at least one sampling capacitor through the filter bypass switch; and wherein, when in the OFF state, the filter bypass switch is designed to cause the amplification or buffer circuit to drive the at least one sampling capacitor through the filter resistor.

To provide a storage device capable of holding data for a long period.SOLUTION: The semiconductor device includes a memory element and a transistor functioning as a switching element for controlling supply, holding, and release of electric charge in the memory element. The transistor includes a second gate electrode for controlling the threshold voltage in addition to a normal gate electrode and includes an oxide semiconductor in an active layer; therefore, the off-state current is extremely low. In the above memory device, data is stored not by injecting charge into a floating gate surrounded by an insulating film at high voltage but by controlling the amount of charge in a memory element through a transistor with extremely low off-state current.SELECTED DRAWING: Figure 1

The invention provides a Kelvin drip generator corona discharge enhancement-based friction nanometer generator and a preparation method thereof. Wherein the generator comprises a Kelvin water dripping machine, high voltages at two ends of the Kelvin water dripping machine are respectively coupled to a back gate electrode and a suspension needle, a non-uniform electric field is constructed in a needle tip-FEP area, corona discharge is triggered, charges are directionally injected into an FEP / liquid drop system, and the FEP / liquid drop system is charged. The injected charges are connected in parallel into the device through a multi-branch capacitor network formed by the back gate electrode, the upper electrode / the lower electrode and the FEP. According to the invention, through cooperation of exogenous pumping and liquid drop charge shuttling (DSG), single-drop transfer charge and open-circuit voltage are significantly improved, and direct-current stepped accumulative output is maintained.

The application relates to a method for evaluating space charge injection characteristics of a polypropylene elastomer blend material for cables. The method comprises: obtaining current information in a to-be-tested sample made of a polypropylene elastomer blend material and sensor signal information of a piezoelectric sensor corresponding to the to-be-tested sample under a preset test condition; determining space charge distribution information according to the sensor signal information; and determining a space charge injection characteristic evaluation result according to the current information and the space charge distribution information. The method can accurately analyze the real injected current based on the current in the to-be-tested sample under the preset test condition, obtain an accurate charge injection rate, accurately analyze the charge transport in the to-be-tested sample by using the charge injection rate, and thus improve the accuracy of the space charge injection characteristic evaluation result.

The present invention relates to compounds of formula (I) as well as to their use as organic doping agent, as transport layer as absorbing layer, as charge injection layer, as organic semiconductor itself, organic semiconductive matrix material or as hole transport layer. The invention also relates to organic semiconductive materials, electronic components, organic field-effect transistor, semiconductor unit and electroluminescent arrangement in which the compounds of formula (I) are used.

The present invention relates to the technical field of optoelectronic material applications, and discloses a polycyclic compound and an organic electroluminescent device thereof. By introducing a phenanthro-fused five-membered heterocyclic core structure with a relatively high triplet energy level and finely regulating the core structure using different types of electron donor-acceptor groups, the polycyclic compound provides a luminescent host material with excellent comprehensive performance, effectively solving the problems such as high driving voltage and low fluorescence quantum efficiency caused by difficult charge injection in current luminescent host materials, achieving the technical effect of balancing luminescence efficiency and driving voltage, and having significant application value as a luminescent host material in organic electroluminescent devices.

Disclosed is a silicon carbide junction barrier Schottky diode including: a first-conductivity-type substrate; a first-conductivity-type epitaxial layer formed by epitaxial growth of silicon carbide doped with a first-conductivity-type impurity on the first-conductivity-type substrate; a charge injection region formed on the first-conductivity-type epitaxial layer and doped with the first-conductivity-type impurity at a higher concentration than a concentration of the first-conductivity-type impurity of the first-conductivity-type epitaxial layer; a second-conductivity-type junction region formed on the first-conductivity-type epitaxial layer to contact the charge injection region; a Schottky metal layer formed on the charge injection region and the second-conductivity-type junction region; an anode electrode formed on the Schottky metal layer; and a cathode electrode formed under the first-conductivity-type substrate.

To provide an image forming apparatus capable of effectively removing deposits attached to a charged member. [Solution] The device comprises a photoreceptor having a charge injection layer containing conductive particles, a charging member in contact with the surface of the photoreceptor, a developing unit that develops an electrostatic latent image as a toner image, a transfer unit, and a control unit that controls the voltage applied to the charging member, and is capable of executing an image forming mode for transferring a toner image to a transfer member and a cleaning mode executed at a different timing from the image forming mode. In the cleaning mode, the control unit (i) periodically switches the voltage applied to the charging member within a range less than a discharge threshold relative to the surface potential of the photoreceptor before passing through the charging member, and (ii) sets the period of the voltage waveform pattern such that 0.05 ≤ Vpp_d / Vpp_t ≤ 0.865, where Vpp_t is the amplitude of the voltage and Vpp_d is the amplitude of the surface potential of the photoreceptor after passing through the charging member.

A charge-injection cell-based temperature sensor (1) is provided. The temperature sensor (1) comprises one or more charge-injection cells (3, 9). The temperature sensor (1) is configured to allow charge to be transferred from one or more source capacitors (Cs,n, Cs,p) to one or more output capacitors (Cout,n, Cout,p) once transistors (M1, M2, M3, M4) of the charge-injection cells are enabled to allow current to flow through them. The temperature sensor (1) further comprises a temperature sensing unit (7) configured to determine one or more charge-injection cell output voltage values to thereby derive a temperature value from the one or more first charge-injection cell output voltage values.

The invention relates to a passivation layer film material for a photovoltaic cell and a preparation method of the passivation layer film material, and belongs to the technical field of photovoltaic cells. The passivation layer is a thin film of a SiNx-TiO2-SiOyNz sandwich laminated structure, SiNx hydrogen passivation and TiO2 field effect shielding are carried out, the interface state density is remarkably reduced, the service life of a device carrier is prolonged, the gradient oxygen-nitrogen ratio of SiOyNz is regulated and controlled, the fixed charge density is stabilized at the order of magnitude of 1010, the threshold voltage drift defect caused by the high fixed charge density of the traditional SiNx layer is weakened, and the performance of the device is improved. The laminated structure design inhibits the charge injection effect and enhances the dynamic stability, meanwhile, the atomic layer deposition process of a traditional Al2O3 layer is avoided, the passivation process complexity is reduced, the production equipment is simplified, the production efficiency is improved, and a new method is provided for industrial production of photovoltaic devices.

The invention discloses a reading circuit, an image sensor, a chip and a control method, and relates to the field of integrated circuits. The readout circuit includes: a capacitive feedback transimpedance amplifier circuit; and the signal conversion circuit comprises a phase inverter, is arranged at the input end, used for receiving a reset signal, in the capacitance feedback transimpedance amplifier circuit, and reduces the first voltage value and / or improves the second voltage value by adjusting the internal source end voltage of the phase inverter. Wherein the first voltage value represents a voltage value of a high level in the reset signal, and the second voltage value represents a voltage value of a low level in the reset signal. Based on the circuit design, the signal conversion circuit is arranged at the input end of the reset signal to reduce the first voltage value and / or improve the second voltage value, namely, the voltage difference between the high level and the low voltage in the reset signal is reduced, the noise caused by clock feed-through and charge injection effect in the CTIA circuit is reduced, and the reliability of the CTIA circuit is improved. And the reset noise is further reduced.

A sense amplifier circuit, a memory, and related operation methods are provided. The sense amplifier circuit includes an amplifier circuit for amplifying a voltage signal and a compensation circuit coupled to the amplifier circuit. The amplifier circuit includes a first inverter amplifier and a second inverter amplifier that are cross-coupled to each other, the first inverter amplifier being connected to a first bit line and the second inverter amplifier being connected to a second bit line. The compensation circuit includes a first switch circuit, a second switch circuit, a third switch circuit, and a fourth switch circuit, and is configured to generate a compensation voltage between the first bit line and the second bit line by operating the switch circuits to perform charge injection, so as to compensate for an input-related offset voltage of the amplifier circuit. The operation method takes into account the influence of charge propagation on the voltage on the bit line, and thus more accurately compensates for the input-related offset voltage.

The application discloses an iridium oxide modified fluorine-doped tin oxide electrode and a preparation method and application thereof. The electrode comprises a light-transmitting fluorine-doped tin oxide conductive glass substrate and an in-situ attached iridium oxide nano-modified layer. The preparation method comprises the following steps: preparation and aging of a precursor solution, alternating current electrochemical deposition, annealing and cleaning, and laser patterning treatment. The application further discloses a cell impedance sensor organ chip system comprising the electrode and application of the system in in-vitro drug screening. The application utilizes the low cost and light-transmitting property of the fluorine-doped tin oxide and the excellent charge injection capacity of the alternating current deposited iridium oxide nano layer to greatly reduce the interface impedance. The scheme meets the in-situ optical observation, realizes the high-sensitivity biological impedance monitoring comparable to gold electrodes, effectively solves the problems of high cost and complex process of the existing organ chip electrode, and is very suitable for popularization and application as a disposable high-throughput consumable.

A method for operating an analog-to-digital converter (ADC) is provided. The ADC includes a comparator, a sampling switch coupled between a device outputting an analog voltage and an input of the comparator, and a capacitor array including capacitors, wherein top plates of the capacitors are coupled between the sampling switch and the input of the comparator. The method includes, during a first phase, closing the sampling switch and coupling bottom plates of the capacitors to a common mode voltage, during a second phase, decoupling the bottom plates of the capacitors from the common mode voltage while the sampling switch is closed, during a third phase, opening the sampling switch while the bottom plates of the capacitors are decoupled from the common mode voltage, and, during a fourth phase, coupling the bottom plates of capacitors to the common mode voltage while the sampling switch is open.

A gate-induced leakage current that is independent of the location of the physical p-n junction between the semiconductor channel and the source / drain regions can be provided within a NAND string of a three-dimensional memory device by employing at least one leakage current control circuit activated during an erase operation. During the erase operation, an accumulation region and an inversion region can be formed between a pair of vertically adjacent conductive layers, with a depletion region therebetween. During the erase operation, the depletion region can generate and inject majority charge carriers into the semiconductor channel. The depletion region can be formed in the source region or the drain region and may not overlap with the physical p-n junction. Thus, the charge injection location can be independent of the location of the physical p-n junction.

A technique for reducing the effects of charge injection when a charge pump in a fractional-N frequency synthesizer switches from an error cancellation phase of error current generation to a full-scale phase of error current generation uses a dummy digital-to-analog converter to steer excess current from the error cancellation phase to a voltage regulated node. As a result, the voltage swing of an inactive branch of a digital-to-analog converter of the charge pump is the same as the voltage swing of the active branch of the charge pump, i.e., the device overlap capacitance charge injection is in phase for the branches of a digital-to-analog converter in the charge pump.

A developing apparatus including: a toner configured to have toner particle and external additive; a toner carrying member configured to carry the toner; and an charge injection member configured to inject electric charge into the toner, in which the external additive contain titanium atom-containing fine particles containing a compound containing titanium atoms, a presence ratio of the titanium atoms is 0.05 to 4.00 atomic % when a surface of the toner is measured using X-ray photoelectron spectroscopy, the toner carrying member is a developing roller having a substrate having a conductive outer surface and a resin layer on the outer surface of the substrate, impedance of the developing roller measured under specific conditions is 1.00×106 Ω or more, and a maximum value of a surface potential measured under specific conditions is less than 20.0 V.

This invention discloses a CMOS transmission gate sampling switch circuit, a charge injection compensation method, an electronic device, and a storage medium. The CMOS transmission gate sampling switch circuit includes: a CMOS transmission gate, an output compensation circuit, and an input compensation circuit. The CMOS transmission gate includes a first NMOS transistor MN1 and a first PMOS transistor MP1. The gate of MP1 is connected to a second logic signal, and the gate of MN1 is connected to a first logic signal. The output compensation circuit includes MP2 for compensating for charge injection in the MP1 channel and MN2 for compensating for charge injection in the MN1 channel. The input compensation circuit includes MP3 for compensating for charge injection in the MP1 channel and MN3 for compensating for charge injection in the MN1 channel. The CMOS transmission gate sampling switch circuit, charge injection compensation method, electronic device, and storage medium proposed in this invention can effectively suppress injection errors while maintaining a miniaturized structure, overcoming the performance limitations caused by charge injection in existing designs.

The invention relates to a charge injection device based on electric field-light irradiation. The charge injection device comprises a temperature controller, a refrigerator, a power supply controller, a high-voltage source, a metal electrode, an electro-optical crystal, a laser source, a beam-expanding collimating lens group, a reflective mirror and a signal line; the power supply controller outputs a control signal and transmits the control signal to the high-voltage source; the high-voltage source outputs voltage to two ends of the metal electrode under the triggering of the control signal; ohmic contact is formed between the metal electrode and the electro-optical crystal to ensure that the electric field injects electrons into the electro-optical crystal; the temperature controller controls the temperature of the refrigerator respectively, so that the electro-optical crystal is in a set constant-temperature environment; the laser outputs laser which is changed into wide parallel light beams through the beam-expanding collimating lens group and then is input into the spatial light modulator. The control system controls the spatial light modulator to change the intensity distribution of the laser and output the laser, and the laser irradiates the crystal light passing surface in the direction perpendicular to the electric field, so that the electron injection efficiency obtains a gain effect.

This invention relates to the field of dielectric materials and energy storage materials, specifically to a self-assembled nanoscale multi-interface all-polymer nanostructure dielectric thin film and its preparation method. The composition of the thin film material meets the following requirements: the mass ratio of thermoplastic resin to bismaleimide resin is 95:5-65:35; the amount of catalyst added is 0.05wt%-2wt% of the weight of the bismaleimide resin. The thin film provided by this invention can meet the application requirements at 150℃ and above 600MV / m. The thermoplastic resin component in the film imparts good flexibility, suitable for the winding and stacking processes of thin film capacitors; while the bismaleimide (BMI) nanoscale multi-interface structure effectively blocks charge injection and excitation, significantly reducing leakage current under high temperature and strong electric field conditions, thereby improving its dielectric energy storage performance under high temperature and strong electric field conditions.