100 results about "Charge injection" patented technology

The invention belongs to the technical field of electrical experiments, and particularly relates to an insulating material charge accumulation and flashover device and method under different tangent and normal electric fields, an insulating sample wafer of the device is arranged on a surface flashover assembly, and the surface flashover assembly is provided with an electrode assembly with an adjustable inclination angle; a lower plate electrode is arranged in the middle of an insulating support, a supporting rod assembly vertically penetrates through a middle through hole of the lower plate electrode to make contact with a polytetrafluoroethylene insulating plate, an insulating sample piece is arranged above the polytetrafluoroethylene insulating plate, the polytetrafluoroethylene insulating plate is hinged to the lower plate electrode, and the lower end of the supporting rod assembly is connected with a rotary driving mechanism. The rotary driving mechanism drives the supporting rod assembly to move to incline the insulating sample, and the lifting driving mechanism drives the supporting rod assembly to vertically move to enable the insulating sample to be in contact with the electrode assembly; the device has the capabilities of charge injection and charge measurement of the insulation sample wafer and measurement of flashover voltage and initial voltage along the surface of the insulation material under different tangential and normal electric fields.

The invention belongs to the technical field of gate voltage bootstrapped switches, and discloses a high-performance gate voltage bootstrapped switch for a Sigma-Delta ADC, a PMOS switch circuit is introduced into an NMOS type gate voltage bootstrapped switch circuit to form a complementary switch, and the complementary switch is used for counteracting an output error caused by a clock feed-through effect of an NMOS switch and the PMOS switch; virtual tubes are added to the input and output ends of the NMOS switch and the PMOS switch by using an inverter chain and are used for absorbing channel charges of the switch tubes; the substrate potential of the NMOS switch and the substrate potential of the PMOS switch are connected into the switching circuit, so that the substrate potential of the switching tube is switched between GND and input voltage Vin, and on the premise that sampling / maintaining precision is guaranteed, interference of clock feed-through and charge injection in the switching tube on output signals is restrained, and the linearity of the grid voltage bootstrapped switch is improved.

A wavelength-tunable optical filter includes a plate-like first component, a plate-like second component, a first reflective film, and a second reflective film. The wavelength-tunable optical filter also includes a first transparent electrode and a second transparent electrode that serve as a voltage applying part that applies a voltage in the thickness direction of the first component, and as a charge injecting part that injects electric charge into the first component. The first transparent electrode is formed on a first incident surface, and is ohmically connected to the first component. The second transparent electrode is formed between a first emission surface and the first reflective film, and is ohmically connected to the first component.

The present application relates to a kind of organic electron transport material and its preparation method and application, which is with triazine group as center core, pyridine is the conjugated organic small molecule material of outer ring substitution, the synthetic route of the organic small molecule material is simple, low in cost, higher yield, less environmental pollution;With the organic small molecule as electron transport layer, the problem of charge injection imbalance is well solved, especially in quantum dot light emitting diode (QLEDs), greatly improves the QLEDs device performance and stability, which has extremely great significance to the application field of QLEDs.

Analog front-end (AFE) system with an anti-aliasing filter circuit including a filter bypass switch configured to provide charge injection and / or clock pass-through independent of an input signal, wherein the AFE system comprises: at least one sampling capacitor of an analog-to-digital converter (ADC) circuit configured to sample an output of the anti-aliasing filter circuit; an amplification or buffer circuit with an input for receiving the input signal; and the anti-aliasing filter circuit coupled to an output of the amplification or buffer circuit, wherein the filter circuit comprises the following: a filter resistor; a filter capacitor coupled to one terminal of the filter resistor; and the filter bypass switch, which is connected in a bootstrapped configuration to pull a control terminal of the filter bypass switch above or below a supply voltage, wherein the filter bypass switch is connected in parallel to the filter resistor, wherein the filter bypass switch has an ON state and an OFF state, wherein, when in the ON state, the filter bypass switch is configured to bypass the filter resistance, allowing the amplification or buffer circuit to drive the at least one sampling capacitor through the filter bypass switch; and wherein, when in the OFF state, the filter bypass switch is designed to cause the amplification or buffer circuit to drive the at least one sampling capacitor through the filter resistor.

To provide a storage device capable of holding data for a long period.SOLUTION: The semiconductor device includes a memory element and a transistor functioning as a switching element for controlling supply, holding, and release of electric charge in the memory element. The transistor includes a second gate electrode for controlling the threshold voltage in addition to a normal gate electrode and includes an oxide semiconductor in an active layer; therefore, the off-state current is extremely low. In the above memory device, data is stored not by injecting charge into a floating gate surrounded by an insulating film at high voltage but by controlling the amount of charge in a memory element through a transistor with extremely low off-state current.SELECTED DRAWING: Figure 1

The invention provides a Kelvin drip generator corona discharge enhancement-based friction nanometer generator and a preparation method thereof. Wherein the generator comprises a Kelvin water dripping machine, high voltages at two ends of the Kelvin water dripping machine are respectively coupled to a back gate electrode and a suspension needle, a non-uniform electric field is constructed in a needle tip-FEP area, corona discharge is triggered, charges are directionally injected into an FEP / liquid drop system, and the FEP / liquid drop system is charged. The injected charges are connected in parallel into the device through a multi-branch capacitor network formed by the back gate electrode, the upper electrode / the lower electrode and the FEP. According to the invention, through cooperation of exogenous pumping and liquid drop charge shuttling (DSG), single-drop transfer charge and open-circuit voltage are significantly improved, and direct-current stepped accumulative output is maintained.

The application relates to a method for evaluating space charge injection characteristics of a polypropylene elastomer blend material for cables. The method comprises: obtaining current information in a to-be-tested sample made of a polypropylene elastomer blend material and sensor signal information of a piezoelectric sensor corresponding to the to-be-tested sample under a preset test condition; determining space charge distribution information according to the sensor signal information; and determining a space charge injection characteristic evaluation result according to the current information and the space charge distribution information. The method can accurately analyze the real injected current based on the current in the to-be-tested sample under the preset test condition, obtain an accurate charge injection rate, accurately analyze the charge transport in the to-be-tested sample by using the charge injection rate, and thus improve the accuracy of the space charge injection characteristic evaluation result.

The present invention relates to compounds of formula (I) as well as to their use as organic doping agent, as transport layer as absorbing layer, as charge injection layer, as organic semiconductor itself, organic semiconductive matrix material or as hole transport layer. The invention also relates to organic semiconductive materials, electronic components, organic field-effect transistor, semiconductor unit and electroluminescent arrangement in which the compounds of formula (I) are used.

To provide an image forming apparatus capable of effectively removing deposits attached to a charged member. [Solution] The device comprises a photoreceptor having a charge injection layer containing conductive particles, a charging member in contact with the surface of the photoreceptor, a developing unit that develops an electrostatic latent image as a toner image, a transfer unit, and a control unit that controls the voltage applied to the charging member, and is capable of executing an image forming mode for transferring a toner image to a transfer member and a cleaning mode executed at a different timing from the image forming mode. In the cleaning mode, the control unit (i) periodically switches the voltage applied to the charging member within a range less than a discharge threshold relative to the surface potential of the photoreceptor before passing through the charging member, and (ii) sets the period of the voltage waveform pattern such that 0.05 ≤ Vpp_d / Vpp_t ≤ 0.865, where Vpp_t is the amplitude of the voltage and Vpp_d is the amplitude of the surface potential of the photoreceptor after passing through the charging member.

A charge-injection cell-based temperature sensor (1) is provided. The temperature sensor (1) comprises one or more charge-injection cells (3, 9). The temperature sensor (1) is configured to allow charge to be transferred from one or more source capacitors (Cs,n, Cs,p) to one or more output capacitors (Cout,n, Cout,p) once transistors (M1, M2, M3, M4) of the charge-injection cells are enabled to allow current to flow through them. The temperature sensor (1) further comprises a temperature sensing unit (7) configured to determine one or more charge-injection cell output voltage values to thereby derive a temperature value from the one or more first charge-injection cell output voltage values.

The application discloses an iridium oxide modified fluorine-doped tin oxide electrode and a preparation method and application thereof. The electrode comprises a light-transmitting fluorine-doped tin oxide conductive glass substrate and an in-situ attached iridium oxide nano-modified layer. The preparation method comprises the following steps: preparation and aging of a precursor solution, alternating current electrochemical deposition, annealing and cleaning, and laser patterning treatment. The application further discloses a cell impedance sensor organ chip system comprising the electrode and application of the system in in-vitro drug screening. The application utilizes the low cost and light-transmitting property of the fluorine-doped tin oxide and the excellent charge injection capacity of the alternating current deposited iridium oxide nano layer to greatly reduce the interface impedance. The scheme meets the in-situ optical observation, realizes the high-sensitivity biological impedance monitoring comparable to gold electrodes, effectively solves the problems of high cost and complex process of the existing organ chip electrode, and is very suitable for popularization and application as a disposable high-throughput consumable.

A method for operating an analog-to-digital converter (ADC) is provided. The ADC includes a comparator, a sampling switch coupled between a device outputting an analog voltage and an input of the comparator, and a capacitor array including capacitors, wherein top plates of the capacitors are coupled between the sampling switch and the input of the comparator. The method includes, during a first phase, closing the sampling switch and coupling bottom plates of the capacitors to a common mode voltage, during a second phase, decoupling the bottom plates of the capacitors from the common mode voltage while the sampling switch is closed, during a third phase, opening the sampling switch while the bottom plates of the capacitors are decoupled from the common mode voltage, and, during a fourth phase, coupling the bottom plates of capacitors to the common mode voltage while the sampling switch is open.

A technique for reducing the effects of charge injection when a charge pump in a fractional-N frequency synthesizer switches from an error cancellation phase of error current generation to a full-scale phase of error current generation uses a dummy digital-to-analog converter to steer excess current from the error cancellation phase to a voltage regulated node. As a result, the voltage swing of an inactive branch of a digital-to-analog converter of the charge pump is the same as the voltage swing of the active branch of the charge pump, i.e., the device overlap capacitance charge injection is in phase for the branches of a digital-to-analog converter in the charge pump.

A developing apparatus including: a toner configured to have toner particle and external additive; a toner carrying member configured to carry the toner; and an charge injection member configured to inject electric charge into the toner, in which the external additive contain titanium atom-containing fine particles containing a compound containing titanium atoms, a presence ratio of the titanium atoms is 0.05 to 4.00 atomic % when a surface of the toner is measured using X-ray photoelectron spectroscopy, the toner carrying member is a developing roller having a substrate having a conductive outer surface and a resin layer on the outer surface of the substrate, impedance of the developing roller measured under specific conditions is 1.00×106 Ω or more, and a maximum value of a surface potential measured under specific conditions is less than 20.0 V.

This invention discloses a CMOS transmission gate sampling switch circuit, a charge injection compensation method, an electronic device, and a storage medium. The CMOS transmission gate sampling switch circuit includes: a CMOS transmission gate, an output compensation circuit, and an input compensation circuit. The CMOS transmission gate includes a first NMOS transistor MN1 and a first PMOS transistor MP1. The gate of MP1 is connected to a second logic signal, and the gate of MN1 is connected to a first logic signal. The output compensation circuit includes MP2 for compensating for charge injection in the MP1 channel and MN2 for compensating for charge injection in the MN1 channel. The input compensation circuit includes MP3 for compensating for charge injection in the MP1 channel and MN3 for compensating for charge injection in the MN1 channel. The CMOS transmission gate sampling switch circuit, charge injection compensation method, electronic device, and storage medium proposed in this invention can effectively suppress injection errors while maintaining a miniaturized structure, overcoming the performance limitations caused by charge injection in existing designs.

The invention relates to a charge injection device based on electric field-light irradiation. The charge injection device comprises a temperature controller, a refrigerator, a power supply controller, a high-voltage source, a metal electrode, an electro-optical crystal, a laser source, a beam-expanding collimating lens group, a reflective mirror and a signal line; the power supply controller outputs a control signal and transmits the control signal to the high-voltage source; the high-voltage source outputs voltage to two ends of the metal electrode under the triggering of the control signal; ohmic contact is formed between the metal electrode and the electro-optical crystal to ensure that the electric field injects electrons into the electro-optical crystal; the temperature controller controls the temperature of the refrigerator respectively, so that the electro-optical crystal is in a set constant-temperature environment; the laser outputs laser which is changed into wide parallel light beams through the beam-expanding collimating lens group and then is input into the spatial light modulator. The control system controls the spatial light modulator to change the intensity distribution of the laser and output the laser, and the laser irradiates the crystal light passing surface in the direction perpendicular to the electric field, so that the electron injection efficiency obtains a gain effect.

This invention relates to the field of dielectric materials and energy storage materials, specifically to a self-assembled nanoscale multi-interface all-polymer nanostructure dielectric thin film and its preparation method. The composition of the thin film material meets the following requirements: the mass ratio of thermoplastic resin to bismaleimide resin is 95:5-65:35; the amount of catalyst added is 0.05wt%-2wt% of the weight of the bismaleimide resin. The thin film provided by this invention can meet the application requirements at 150℃ and above 600MV / m. The thermoplastic resin component in the film imparts good flexibility, suitable for the winding and stacking processes of thin film capacitors; while the bismaleimide (BMI) nanoscale multi-interface structure effectively blocks charge injection and excitation, significantly reducing leakage current under high temperature and strong electric field conditions, thereby improving its dielectric energy storage performance under high temperature and strong electric field conditions.

The invention belongs to the technical field of ferroelectric memory devices, and particularly relates to a method for improving read-write operation reliability of a ferroelectric memory through electrostatic shielding. An electrostatic shielding conductive structure is introduced into a ferroelectric material of the ferroelectric memory and an electrode interface region, so that the charge injection speed of an interface layer is increased, a ferroelectric depolarization field is reduced, and the symmetry of positive and negative write voltages in a rapid operation process of the ferroelectric memory is realized; therefore, the read-write operation reliability of the high-density ferroelectric memory during high-speed operation is improved, and a ferroelectric memory with an electrostatic shielding structure is called as an electrostatic shielding ferroelectric memory. The invention is suitable for the ferroelectric memory cell, the plane crossing bar array and the three-dimensional stacking structure. According to the invention, a depolarization field can be effectively inhibited, the imprinting time is greatly shortened, the symmetry of a ferroelectric hysteresis loop is improved, the read-write speed of a memory is improved, and the method is compatible with a semiconductor process. Effective technical support is provided for large-scale manufacturing and application of high-speed, high-density and high-reliability ferroelectric memories.

The invention relates to a graphene-based high-switch-ratio vertical organic transistor and a preparation method thereof, and belongs to the technical field of organic semiconductor devices. The transistor comprises a first metal electrode, a rubrene single-crystal active layer, a second metal electrode, a single-layer graphene electrode, a silicon dioxide dielectric layer and a silicon substrate which are sequentially stacked from top to bottom, wherein the silicon substrate is also used as a grid electrode. The graphene electrode is prepared by a mechanical stripping method, and is transferred to the surface of silicon dioxide at a low temperature of 50-120 DEG C after being pretreated by ozone or plasma to form a porous structure so as to improve the vertical charge injection performance; the rubrene single crystal active layer is deposited through a two-step sublimation method, high crystal quality is obtained through annealing treatment, then the rubrene single crystal active layer is transferred to the surface of the graphene electrode by means of the flexible polymer microneedle, and interface defects are reduced. And finally, respectively depositing metal electrodes with the thickness of 20-80nm above and below the rubrene to construct a vertical organic transistor structure. The device shows excellent switching performance under the condition of low power consumption, the switching ratio is larger than 2.5 * 10 < 6 >, the off-state current density is not larger than 10 [mu] A / cm < 2 >, and the device is suitable for flexible logic devices and neuromorphic calculation application.

The invention provides a photoelectric neural electrode and a preparation method and application thereof. The photoelectric neural electrode sequentially comprises a substrate, an electrode layer and a heterostructure photoelectric active layer which are stacked from bottom to top, wherein the heterostructure photoelectric active layer sequentially comprises a p-type light absorption donor layer, a function regulation and control layer and an n-type electron acceptor layer which are stacked from bottom to top; the function regulation and control layer, the p-type light absorption donor layer and the n-type electron acceptor layer form a cascading relation or a bridging relation on an energy band, and the function regulation and control layer is a channel capable of providing in-plane direction charge transmission. The functional regulation and control layer is introduced between the donor layer and the acceptor layer to construct an energy band synergistic heterostructure, so that the photoelectric neural electrode prepared based on the heterostructure can realize higher photocurrent density and charge injection density, has quick response and excellent water phase stability, can realize bidirectional charging and discharging, and has a wide application prospect. The requirements of a nerve interface on sensitivity, time sequence and stability can be met, and the specific biological application prospect is achieved.

To provide an image forming apparatus capable of effectively injecting electric charges to toner over a long term.SOLUTION: The image forming apparatus includes a developer carrier, a developer container storing developer including developer particles and the developer carrier, a developing blade, an image carrier, and a charging member, the developer carrier includes a base body having a conductive outer surface and a resin layer on the outer surface, and the resin layer includes polyurethane having a polycarbonate structure. In the image forming apparatus, the developer carrier has an impedance within a predetermined range when measured by a predetermined method, the maximum value of the potential of the outer surface is less than a predetermined value, the surface of the developer particles is covered with surface particles having a predetermined conductivity, the coverage of the surface particles is 35% or more, and the fixing rate is 80% or more.SELECTED DRAWING: Figure 9

The application belongs to the technical field of display, and particularly relates to an organic electroluminescent device. The organic electroluminescent device provided by the application comprises at least two organic light-emitting layers between a cathode and an anode, and a charge generation layer is arranged between the two organic light-emitting layers. The charge generation layer comprises a structure shown in formula (1), and the coordination ability with a metal dopant is improved by further limiting the types of substituents, so that the stability of the charge generation layer is enhanced, and the matching degree with adjacent energy levels is improved. Meanwhile, the organic light-emitting layer comprises a structure shown in formula (2), which is helpful to reduce the interface charge accumulation and non-radiative recombination, and can match the charge injection behavior of the charge generation layer. The two structures synergistically optimize the charge injection, transmission and recombination processes in the device, so that the organic electroluminescent device has a lower driving voltage, a higher light-emitting efficiency and a longer service life.

A unit cell circuitry for a digital-to-analog converter (DAC) circuitry includes cascode circuitry, switch circuitry, and capacitor circuitry. The cascode circuitry is connected to a first output node and a second output node of the unit cell circuitry. The switch circuitry is connected to the cascode circuitry. The capacitor circuitry includes one or more capacitors connected to the switch circuitry. The switch circuitry connects the capacitor circuitry to the cascode circuitry to inject a charge onto the cascode circuitry. The unit cell circuitry outputs a signal based on the injected charge.

The embodiment of the invention provides a burst data recovery circuit, an integrated circuit, equipment and a method. The burst data recovery circuit comprises a first voltage-controlled oscillator and a second voltage-controlled oscillator, a first charge injection circuit of the first voltage-controlled oscillator is used for receiving recovered data; the positive output end of the first voltage-controlled oscillator is connected with the positive input end of the second charge injection circuit of the second voltage-controlled oscillator, and the negative output end of the first voltage-controlled oscillator is connected with the negative input end of the second charge injection circuit; the positive output end of the first voltage-controlled oscillator is connected with the negative input end of the third charge injection circuit of the second voltage-controlled oscillator, and the negative output end of the first voltage-controlled oscillator is connected with the positive input end of the third charge injection circuit; and the differential output end of the second voltage-controlled oscillator is used for outputting a clock signal corresponding to the recovered data. Since the polarities of the two pairs of injection signals of the second voltage-controlled oscillator are opposite, the phase noise can be counteracted, so that the phase noise of the clock can be effectively suppressed, the clock jitter can be reduced, and the clock of the data can be accurately recovered.

The application discloses a CMOS analog switch opening control method, and relates to the technical field of CMOS analog switch circuit control. The method performs pre-opening static bias calibration on paired NMOS and PMOS switch tubes, collects real-time parameters, and establishes a reference mapping relationship of device static working points; a multi-step gate opening pulse timing is generated, which is divided into three continuous timing stages of pre-charging, linear rising and steady-state locking; the gate voltages of the two tubes are synchronously controlled in each stage to start a gate voltage dynamic clamping mechanism; the opening process is corrected by closed-loop feedback of timing and voltage parameters; and after the opening is completed, the gate voltage dynamic fine adjustment of the steady-state conduction stage is performed. The application controls the channel charge injection through the multi-step timing, improves the opening control precision through the closed-loop feedback, guarantees the steady-state working stability through the two-stage clamping mechanism, and improves the switch conduction linearity and opening consistency through the parameter adaptation of the whole process, so that the application can be adapted to complex working conditions of wide temperature range and wide power voltage.

The invention relates to a method and apparatus for sensing an isolation state in gate driver circuitry. An example apparatus includes charge injection circuitry (160, 204) having a first terminal, a second terminal, and a control terminal; a first inductor-capacitor (LC) circuitry (248, 250, 252) having a first terminal and a second terminal, the first terminal of the first LC circuitry coupled to the first terminal of the charge injection circuitry, the second terminal of the first LC circuitry coupled to the second terminal of the charge injection circuitry; a second LC circuitry (256, 258, 260) magnetically coupled to the first LC circuitry; and current sensing circuitry (180, 208) having an input terminal coupled to the control terminal of the charge injection circuitry.

The invention relates to the technical field of electric power, in particular to a commutation detection method, a storage medium and equipment, and the method comprises the steps: achieving the dynamic dual-feature extraction and precise quantitative characterization of an exit valve energy mismatch index and a conduction valve charge injection efficiency in a commutation process through the collaborative analysis of dual-valve current signals; according to the method, the geometric constraint characteristics of the preset hyperbola criterion equation are utilized, commutation state judgment is converted into judgment of the geometrical relationship between the criterion value and the threshold boundary, the problem of insufficient robustness of single electrical quantity monitoring is effectively solved, meanwhile, the detection delay defect of an actual measurement method and the misjudgment risk of a prediction method are eliminated, and the detection accuracy is improved. According to the method, the reliability and the anti-interference capability are remarkably improved while the detection rapidity is guaranteed, collaborative optimization of the rapidity, the reliability and the robustness of commutation detection is achieved, and an effective technical solution is provided for real-time accurate monitoring of the commutation process of the high-voltage direct-current power transmission system.

The present invention relates to a medical electrode, including: a first layer made of a first material having a first electrochemical potential window, especially a first charge injection limit, and at least one second layer made of a second material having a second electrochemical potential window, especially a second charge injection limit, wherein the first layer and the second layer are located on a base substrate, wherein the second electrochemical potential window is lower than the first electrochemical potential window, and wherein the first layer is provided on top of the second layer and encapsulates the second layer, so that no electrical current directly flows from the second layer toward a target tissue.

Semiconductor devices for synchronizing networks are described. A semiconductor device can include a phase lock loop of a timing circuit. The phase lock loop includes a voltage-controlled oscillator, a sub-sampling phase lock loop circuit and a frequency correction loop circuit. The frequency correction loop circuit is configured to activate a charge pump to inject a charge into the voltage-controlled oscillator based on a phase difference between a reference signal and a feedback signal being greater in magnitude than a deadzone delay parameter plus a hysteresis delay parameter and de-activate the charge pump based on the magnitude of the phase difference between the reference signal and the feedback signal falling below the deadzone delay parameter.