1687results about How to "Improve device performance" patented technology

A transistor device (10), the transistor device (10) comprising a substrate (11, 14), a fin (3, 3A) aligned along a horizontal direction on the substrate (11, 14), a first source/drain region (4) of a first type of conductivity in the fin (3, 3A), a second source/drain region (5) of a second type of conductivity in the fin (3, 3A), wherein the first type of conductivity differs from the second type of conductivity, a channel region (33) in the fin (3, 3A) between the first source/drain region (4) and the second source/drain region (5), a gate insulator (6) on the channel region (33), and a gate structure (7, 8) on the gate insulator (6), wherein the sequence of the first source/drain region (4), the channel region (33) and the second source/drain region (5) is aligned along the horizontal direction.

A video endoscope system includes a reusable control cabinet and an endoscope that is connectable thereto. The endoscope may be used with a single patient and then disposed. The endoscope includes an illumination mechanism, an image sensor, and an elongate shaft having one or more lumens located therein. An articulation joint at the distal end of the endoscope allows the distal end to be oriented by the actuators in the control cabinet or actuators in a control handle of the endoscope. Fluidics, electrical, navigation, image, display and data entry controls are integrated into the system along with other accessories.

A video endoscope system includes a reusable control cabinet and an endoscope that is connectable thereto. The endoscope may be used with a single patient and then disposed. The endoscope includes an illumination mechanism, an image sensor, and an elongate shaft having one or more lumens located therein. An articulation joint at the distal end of the endoscope allows the distal end to be oriented by the actuators in the control cabinet or actuators in a control handle of the endoscope. Fluidics, electrical, navigation, image, display and data entry controls are integrated into the system along with other accessories.

Medical devices having one or more rotatable linkable components or segments, delivered in a first orientation relative to a component guide into a tissue cavity, such as the interbody vertebral space. After delivery, each segment may be rotated to a second, different orientation relative to the component guide, such as into a permanent vertical standing position. The segments achieve maximum distraction of the cavity space such as adjacent vertebra end plates, while using a minimal invasive surgical (MIS) approach. When the segments are tightened in place, the device provides long-term stability. The device can be used as a distraction instrument and/or permanent implant that can be used for interbody fusion, nuclear replacement, or anywhere in the body where a stable distraction of tissue and/or the implantation of material such as a device with an MIS approach is desired.

This disclosure describes a system for Single Root I/O Virtualization (SR-IOV) pass-thru for network packet processing via a virtualized environment of a device. The system includes a device comprising a virtualized environment and a plurality of virtual machines having a virtual network interface for receiving and transmitting network packets. A driver for the physical network interface of the device creates a plurality of virtual devices corresponding to the physical network interface, which appear as a Peripheral Component

Interconnect (PCI) device to the virtualized environment. A virtual device of the plurality of virtual devices is assigned via the virtualized environment to each virtual machine of the plurality of virtual machines. The virtual machine uses the virtual device assigned to the virtual machine, to receive and transmit network packets via the physical network interface of the device.

The present application discloses a semiconductor structure and a method for manufacturing the same. The semiconductor structure according to the present invention adjusts a threshold voltage with a common contact, which has a portion outside the source or drain region extending to the back-gate region and provides an electrical contact of the source or drain region and the back-gate region, which leads to a simple manufacturing process, an increased integration level and a lowered manufacture cost. Moreover, the asymmetric design of the back-gate structure further increases the threshold voltage and improves the performance of the device.

The present invention is directed to methods to harvest, integrate and exploit nanomaterials, and particularly elongated nanowire materials. The invention provides methods for harvesting nanowires that include selectively etching a sacrificial layer placed on a nanowire growth substrate to remove nanowires. The invention also provides methods for integrating nanowires into electronic devices that include placing an outer surface of a cylinder in contact with a fluid suspension of nanowires and rolling the nanowire coated cylinder to deposit nanowires onto a surface. Methods are also provided to deposit nanowires using an ink-jet printer or an aperture to align nanowires. Additional aspects of the invention provide methods for preventing gate shorts in nanowire based transistors. Additional methods for harvesting and integrating nanowires are provided.

The present invention is a wrist mechanism and a method for making robotic devices in which the transmission of motion, force and/or torque around a revolute joint can be accomplished without coupling. This construction allows mounting the actuators on the base or lower elements of a mechanism, so that only linkage elements move the end-effector. Thus reducing inertia of the moving elements and increasing performance of the device. The decoupled motion of the end-effector or links is achieved by routing their transmission cables around idler pulleys placed parallel to the joint rotation axis on an optimal position such any stretch on the transmission cable is minimized. In particular, this construction can be use for robotic surgical tools that have two independently driven jaws, decoupled and orthogonal from its articulating wrist.

A method for processing a request for content by a routing device in a communication network implementing a name-based routing. The device includes plural interfaces to receive a request for content and a data packet associated with a content, and a routing table adapted to determine, based on a content name, at least one interface to route the request. The method includes: receiving the request through a first interface; if the device is not able to provide said data packet, searching for the name of the content in a table of pending requests associated with the first interface; in case the content name does not appear in the table, storing the name of the content in the table; and transmitting the request through at least one second interface, the second interface being determined as a function of the name of the content on the basis of the routing table.

A method in which semiconductor-to-semiconductor direct wafer bonding is employed to provide a hybrid substrate having semiconductor layers of different crystallographic orientations that are separated by a conductive interface is provided. Also provided are the hybrid substrate produced by the method as well as using the direct bonding method to provide an integrated semiconductor structure in which various CMOS devices are built upon a surface orientation that enhances device performance.

A high-rise building with a large scale dot-matrix display device is disclosed. The glass panels arranged in rows and columns form a curtain wall structured transparent outer wall 12 extending over an exterior of a building 10. Each panel is installed apart from end portions of floor slabs to form a void space therebetween. A plurality of louver structured modules 22 are arranged within the void space in rows and columns to form a large scale display area. Each module 22 has a louver-like structure formed of a plurality of posts 24 arranged in substantially parallel relationship and a plurality of parallel, uniformly spaced beams 26 connecting said adjacent posts 24. A plurality of LED combination lamps 28 are mounted on each beam 26 at uniform pitches as those between the adjacent beams 26. The LEDs are driven by drive circuits disposed in each beam 26. The vertical guide members 44 are fixed to the end portions of the floor slabs 20. The guide members 44 are arranged substantially in parallel relationship so that the modules 22 are supported between the adjacent guides 44 at the both lateral sides thereof. A plurality of vertical mullion members 48 fixed to the vertical guide members 44 as spaced apart from each of the vertical guides 44, so that the glass panels 12 are supported therebetween.

A method of forming a composite gate structure for a planar MOSFET device, as well as for vertical, double gate, FINFET device, has been developed. The method features a composite gate structure comprised of an overlying silicon gate structure shape, and an underlying titanium nitride gate structure shape. The titanium nitride component allows a lower work function, and thus lower device operating voltages to be realized when compared to counterpart gate structures formed with only polysilicon. A novel, two step gate structure definition procedure, featuring an anisotropic first etch procedure for definition of the polysilicon gate structure shape, followed by a wet or dry isotopic second etch procedure for definition of the titanium nitride gate structure shape, is employed.

A semiconductor power device includes trenched semiconductor power device comprising a trenched gate surrounded by a source region encompassed in a body region above a drain region disposed on a bottom surface of a substrate. The semiconductor power device further includes an insulation layer covering the trenched semiconductor power device with a source-body contact trench opened therethrough the source and body regions and extending into an epitaxial layer below the body regions and filled with contact metal plug therein. The semiconductor power device further includes an embedded Schottky diode disposed near a bottom of the source-body contact trench below the contact metal plug wherein the Schottky diode further includes a Schottky barrier layer having a barrier height for reducing a leakage current through the embedded Schottky diode during a reverse bias between the drain and the source.

The present invention provides a method for forming a metal-oxide-semiconductor (MOS) device and the structure thereof. The method includes at least the steps of forming a silicon germanium layer by the first selective epitaxy growth process and forming a cap layer on the silicon germanium layer by the second selective epitaxy growth process. Hence, the undesirable effects caused by ion implantation can be mitigated.

The present invention is directed to methods to produce, process, and exploit nanomaterials, and particularly elongated nanowire materials. The invention provides a method for producing nanowires that includes providing a thin film of a catalyst material with varying thickness on a substrate, heating the substrate and thin film, such that the thin film disassociates at the relatively thinner regions and vapor depositing a semiconductor onto the substrate to produce nanowires. A method is also provided in which two or more thin films of different materials are overlayed over a substrate, selectively etching the first underlying thin film to create a plurality of islands of the second thin film that mask portions of the first thin film and expose other portions and growing nanowires on the first thin film. Additional methods for producing nanowires are provided.

A circuit and method for self-converging programming of a charge storage memory cell, such as NROM or floating gate flash. The method includes determining a data value from one of more than two data values to be stored in the memory cell, and applying a gate voltage to the control gate at one of a predetermined set of gate voltage levels selected in response to the determined data value. Programming parameters are controlled to establish a self-converging threshold state that is determined by the selected gate voltage. In this manner, the threshold voltage converges on a target threshold corresponding with the determined data value for the memory cell. Program verify operations are reduced or eliminated in various embodiments, reducing the overall time required for the program operation, and improving device performance. A second portion of the program operation can include verify operations to improve threshold margins across the array.