491 results about "Schottky diode" patented technology

The utility model discloses an intrinsic safety power supply circuit and a fuel electrochemical oxygen analyzer. The intrinsic safety power supply circuit comprises a first MOS tube, a first capacitor, a second capacitor, a first resistor, a first Schottky diode, a first Zener diode and a second Zener diode, the power supply module of the fuel electrochemical oxygen analyzer comprises the intrinsic safety power supply circuit and further comprises a sensor module, an AD conversion module, a key module, a single chip microcomputer module, an analog output module and a display driving module which are connected with the power supply module, and the single chip microcomputer module is connected with the AD conversion module, the key module, the analog output module and the display driving module. The sensor module is connected with the AD conversion module, and the analog output module is connected with external equipment; the fuel electrochemical oxygen analyzer adopts the intrinsically safe power supply circuit to limit the working current and voltage in the circuit so as to control the power consumption of the whole machine, so that explosion prevention is realized, and the fuel electrochemical oxygen analyzer can measure the oxygen concentration in a flammable and explosive environment.

The invention provides a process method for improving the performance of a beta-Ga2O3 device through low-energy proton irradiation, and relates to the technical field of electronic components, and the method comprises the following steps: carrying out low-energy proton irradiation on the basis of irradiation experiment parameters at a preset environment temperature; low-energy proton irradiation with different fluence is carried out on the beta-Ga2O3 Schottky diode in a preset incidence mode to determine irradiation process data, and in combination with deep level transient spectroscopy (DLTS) analysis and device simulation, defect evolution and a hydrogen passivation mechanism caused in a beta-Ga2O3 epitaxial layer after low-energy proton incidence are revealed. According to the method, the cognitive limitation that traditional radiation must cause performance degradation of devices is broken through, and the field of low-energy proton irradiation which is not fully researched is focused.

The invention relates to the technical field of Internet of Things, in particular to a circuit for simultaneously converting UART (Universal Asynchronous Receiver / Transmitter) to multi-path different level communication, which comprises a double-USB input module, a power supply processing module, a USB-UART core conversion module and a multi-path level conversion module, the double-USB input module comprises an MINI-USB interface J6 and a USB-B interface J8, VBUS pins of the two interfaces are connected in parallel through a Schottky diode and then output to the power supply processing module, and data differential pair pins are connected in parallel and then connected to the USB-UART core conversion module; and the power supply processing module comprises an LDO (Low Dropout Regulator) voltage stabilizing chip and a filter capacitor, and is used for converting 5V voltage output by the double-USB input module into 3.3 V stable voltage. The circuit design that the UART is connected with various different levels for communication is adopted, the tool integration technology is achieved, the design that the two USB ports are connected in parallel is adopted, the compatibility of the USB data line can be effectively improved, the demands of customers are met, and the technical difficulty that one UART bus is connected with multiple USB ports is broken through.

The invention discloses a frequency quasi-independent controllable double-frequency electrically small rectification circuit, and belongs to the field of radio frequency energy collection. The rectifying circuit comprises a double-frequency matching network, a blocking capacitor, two Schottky diodes, a filter capacitor and a resistive load. The dual-frequency matching network is composed of a capacitor, an inductor and a microstrip line and used for achieving impedance matching of two working frequency points and achieving quasi-independent regulation and control of the positions of the two frequency points by adjusting the value of the inductor and the length of the microstrip line. And the microstrip line is bent for five times so as to realize the miniaturization of the overall structure of the circuit. The blocking capacitor is used for blocking a direct current component and avoiding energy feedback; the two Schottky diodes are used for converting a radio frequency signal into direct current energy; the filter capacitor is used for improving the smoothness of output direct current energy and improving the energy conversion efficiency. The device is compact in structure, adjustable in frequency point position and suitable for a dual-band radio frequency energy collection scene.

The invention discloses a high-safety nanosecond-order delay transistor testing system and method, belongs to the field of transistor testing, and can test the characteristics of a transistor to be tested at any drain voltage stress value, drain voltage stress duration and load current based on nanosecond-order measurement delay on the basis of ensuring the safety of the testing system and experimenters. The circuit comprises switches S1, S2 and S3, resistors RA and RC, Schottky diodes D1 and D2, a power inductor L and a power supply VDD. The conduction time of the switch S1 can be controlled to control the duration of the post-stage circuit for bearing the high voltage VDD; the current value of the power inductor L at the end of charging can be controlled by controlling the conduction time of the switch S2; by testing the voltage and the current of the switch S3, the switch transient characteristic, the on-resistance characteristic and the like of the switch S3 can be obtained. Simulation and experiments prove that the measurement delay of switching to the test state after the voltage stress of the drain electrode is ended is nanosecond magnitude, and the situation of'large current connection caused by mistaken switching-on of a series switch 'does not exist, so that the circuit safety is higher.

The invention provides a high-voltage-resistant gallium oxide trench junction barrier Schottky diode. The high-voltage-resistant gallium oxide trench junction barrier Schottky diode comprises a cathode metal layer, a high-doping N-type gallium oxide substrate, a low-doping N-type gallium oxide epitaxial layer, an etching table top first dielectric layer, an etching table top second dielectric layer, a P-type nickel oxide layer, a dielectric layer and an anode metal layer which are sequentially stacked from bottom to top. According to the invention, P-type nickel oxide and gallium oxide are introduced to construct a heterostructure into a JBS structure, the JBS structure is combined with the etched trench to form a trench junction barrier Schottky diode, and the device has lower specific on-resistance, can bear higher reverse breakdown voltage, and is a gallium oxide JBS device with excellent performance.

The invention provides a chip electrostatic protection circuit and a protection method thereof.The chip electrostatic protection circuit comprises an electrostatic transmission module, a clamping module and a discharge protection module, electrostatic energy of an input port and an output port of a chip is transmitted through the electrostatic transmission module, and the clamping module is connected with the electrostatic transmission module and a power port; static energy is discharged through the clamping module, when chip control voltage is input into the chip input and output port, the clamping module is prevented from being mistakenly conducted through the discharging protection module, and on the basis of a reverse series connection structure of a diode in the static transmission module and a Schottky diode in the clamping module, the clamping module is prevented from being mistakenly conducted. And DC isolation between the input and output ports of the chip and the power port is realized. According to the protection circuit provided by the invention, the DC isolation of the chip input / output port and the power supply port is realized through the Schottky diode, the power-on time sequence requirement is avoided, and the voltage input range is expanded; in order to prevent the static discharge access from being opened mistakenly when the chip works normally, the discharge protection module controls the control voltage of the static discharge access.

The invention discloses a system for simultaneously suppressing second-order nonlinearity and third-order nonlinearity in a direct modulation laser (DML), which belongs to the field of optical communication, and can simultaneously suppress the second-order nonlinearity and the third-order nonlinearity in the system under the condition of DSP-FREE through the combined action of a broadband pre-distortion circuit and an optical path push-pull structure. Wherein at a transmitting end, a set of Schottky diodes and Chebyshev gradient transmission lines which are connected in parallel reversely are adopted to build a DC-10GHz broadband pre-distortion module, and a radio frequency signal generates a reverse third-order intermodulation (IMD3) component through an analog pre-distortion circuit so as to counteract forward third-order nonlinearity of a laser; at a receiving end, a second-order intermodulation (IMD2) component is differentially eliminated through an optical path push-pull modulation architecture. Compared with a traditional DSP scheme, digital signal processing is not needed, the method has the advantages of being low in complexity and wide in bandwidth, and nonlinear accurate compensation of an optical communication system can be achieved.

A high-safety transistor testing system and method with nanosecond-level delay is disclosed, belonging to the field of transistor testing. It enables transistor characteristic testing under arbitrary drain voltage stress values, drain voltage stress durations, and load currents based on nanosecond-level measurement delays, while ensuring the safety of the testing system and personnel. The circuit includes: a switch. S 1, S 2, S 3. Resistance R A , R C Schottky diode D 1, D 2. Power Inductor L ,power supply V DD Control switch S 1. The conduction time can control the high voltage that the subsequent circuit can withstand. V DD Duration; control switch S 2. On-time can control the power inductor L Current value at the end of charging; test switch S From the voltage and current of 3, we can determine the switch. S 3. Switching transient characteristics, on-resistance characteristics, etc. Simulation and experiments show that the measurement delay of switching to the test state after the drain voltage stress ends is on the order of nanoseconds, and there is no situation of "accidental opening of series switch leading to large current conduction", so the circuit safety is higher.

The invention discloses a silicon carbide power device junction temperature online accurate extraction method based on a double-sensor Kalman filtering weighted average algorithm, and the method comprises the following steps: 1, enabling a loss model of a power device to receive the phase current, the DC bus voltage, the duty ratio, the phase current and the DC bus voltage from an inverter; the on resistance of the SIC MOSFET, the reference direct current bus voltage, the on loss energy and the off loss energy under the on current and the on threshold voltage of the Schottky diode are obtained from a data manual of the chip, and the gate driving resistor is used for extracting the junction temperature and monitoring operation in real time; and step 2, obtaining an estimated junction temperature through loss calculation of a power device and a thermal network model, and weighting the junction temperatures estimated at different measurement points through a Kalman filtering weighted average algorithm to obtain a more accurate junction temperature for next iterative calculation. According to the method, the limitation of a traditional single sensor in a dynamic working environment can be effectively compensated, and the accuracy and the real-time performance of junction temperature monitoring are improved.

The invention belongs to the field of semiconductor devices, provides a gallium nitride high-electron-mobility transistor integrated with a Schottky diode and a preparation method of the gallium nitride high-electron-mobility transistor, and aims to solve the problem that a conventional gallium nitride high-electron-mobility transistor (GaN HEMT) lacks a body diode. According to the invention, monolithic integration of the SBD and the GaN HEMT is realized through structural design, a low-impedance path is provided for reverse current, and the integration mode not only retains the original high performance characteristic of a GaN device, but also additionally endows the GaN device with reverse conduction and reverse recovery capabilities; moreover, through the structural design, the SBD can be synchronously completed on the basis of the existing GaN HEMT process, a special process or new equipment is not needed, and the cost is effectively controlled while the performance improvement is ensured; compared with an external interconnection diode scheme, parasitic inductance caused by lead bonding is eliminated, the voltage overshoot and ringing phenomena in the switching process are remarkably reduced, high-frequency switching application is facilitated, and switching loss can be greatly reduced.

The invention relates to the technical field of electron Schottky diode testing methods, in particular to a method for verifying that a Schottky diode reaches junction temperature through high-temperature reverse bias. Transient leakage current testing and series resistor voltage division are carried out on the detected Schottky diode in a nominal junction temperature environment to prevent thermal collapse, and whether the nominal junction temperature is reached or not is finally judged by dynamically adjusting the environment temperature and the reverse voltage and monitoring the change of the leakage current and the voltage at the two ends of the Schottky diode in real time. The method can accurately verify the junction temperature state of the Schottky diode in the high-temperature reverse bias test, effectively avoids thermal runaway failure, is suitable for batch detection, and has the characteristics of simple operation and high reliability.

The invention discloses a groove Schottky diode of a composite P + structure and a manufacturing method of the groove Schottky diode, and belongs to the technical field of semiconductors. The epitaxial layer is located on the surface of one side of the substrate; the epitaxial layer comprises a wave-shaped groove and a plurality of P + columns; the depth of the wave-shaped groove is gradually reduced from the center of the cellular structure to the periphery, and the plurality of P + columns are uniformly distributed around the wave-shaped groove; an anode metal; schottky metal is deposited on the inner surface of the wave-shaped groove, the Schottky metal and the epitaxial layer form wave-shaped Schottky contact, and the anode metal is located in the wave-shaped groove covered by the Schottky metal and covers the surface of the side, away from the substrate, of the epitaxial layer. The cathode metal is located on the surface of the side, away from the epitaxial layer, of the substrate. According to the trench Schottky diode, the contradiction between the breakdown voltage and the break-over voltage of the trench Schottky diode in high-voltage and high-frequency application is solved, and the anti-surge capability of the device under the limiting condition can be improved.

An improved silicon carbide (SiC) planar MOSFET having at least one buried P-shield (BPS) region including one center portion and two side portions for the gate oxide electric field and saturation current reductions is disclosed. Two saturation current pitching (SCP) structures formed in two Junction Field Effect Transistor (JFET) regions sandwiched between the side portions and the center portion of the BPS region limit a saturation current of the device in a forward conduction stage for the short-circuit capability improvement. Moreover, a Junction barrier Schottky diode (JBSD) is integrated with the SiC MOSFET in a location between the two adjacent split gate electrodes for the reverse conduction switching loss reduction.

An image sensor pixel is provided that includes a semiconductor substrate having a front surface and a back surface opposing the front surface, a photosensitive element such as a photodiode formed in the front surface of the semiconductor substrate and configured to sense light in a first range of wavelengths, an interconnect stack formed on the front surface of the semiconductor substrate, and a thin-film diode formed in the interconnect stack and configured to sense light in a second range of wavelengths different than the first range of wavelengths. The thin-film diode may be a Schottky diode. The thin-film diode may include one or more rows of protruding or finger-like metal structures and semiconducting oxide material disposed directly on the protruding metal structures.

The invention discloses a groove SiC MOSFET device and a preparation method thereof. The preparation method comprises the following steps: epitaxial growth; performing P-type ion implantation for the first time; performing first-stage groove etching; performing N-type ion implantation; implanting P-type ions for the second time; carrying out second-stage groove etching; growing gate oxide, polycrystalline silicon and an interlayer insulating layer; carrying out metal deposition; the beneficial effects of the invention are that the multi-stage trench structure is combined with the plane gate and the trench gate, so that the channel density is increased, the current capability is provided, and the conduction loss is reduced; the MPS diode structure is integrated, the forward voltage drop of the body diode is reduced, the discharge capacity is improved when inrush current occurs in the circuit, the reverse follow current capacity can be improved through the parallel Schottky diode structure, and electronic elements needed by a peripheral circuit are reduced; by integrating the built-in field plate structure, the electric field concentration effect at the bottom of the trench gate is effectively relieved.

The invention discloses a W-band switching line MMIC phase shifter based on an aligned CNT Schottky diode. The phase shifter comprises a substrate, a radio frequency input port, a radio frequency output port, two transmission paths with different physical lengths, a switch selection network and a direct current bias circuit. Wherein the switch selection network adopts an aligned carbon nanotube Schottky diode and is configured at the input end and the output end of the transmission path. Complementary control voltage is applied through the direct-current bias circuit, the switch selection network is driven to enable the selected paths to be conducted at the two ends at the same time and the unselected paths to be cut off at the two ends at the same time, and therefore discrete switching of phases is achieved. The high-frequency characteristic of the aligned carbon nanotube device is combined with the double-end complementary selection topology, so that the problem that the amplitude imbalance and the phase precision are difficult to consider at the W wave band is effectively solved, the signal leakage and the parasitic resonance of a non-conducted branch are remarkably inhibited, and the low-insertion-loss high-isolation low-insertion-loss high-isolation low-insertion-loss high-isolation low-insertion-loss high-isolation low-insertion-loss high-isolation low-insertion-loss high-isolation low-insertion-loss high-isolation low-insertion-loss low

The present disclosure relates to a unidirectional transient voltage suppression device, comprising: a single crystalline semiconductor substrate doped with a first conductivity type and comprising a first opposite surface and a second opposite surface; a semiconductor region doped with a second conductivity type opposite the first conductivity type extending into the substrate from the first surface; a first conductive electrode in contact with the semiconductor region on a first side; and a second conductive electrode in contact with the substrate on a second side; a first interface forming a junction of a TVS diode between the substrate and the semiconductor region; and a second interface forming a junction of a Schottky diode between the first conductive electrode and the semiconductor region or between the substrate and the second conductive electrode.

The utility model discloses a low capacitance SCR structure ESD protection device, and relates to the safety protection field, the low capacitance SCR structure ESD protection device comprises a first conduction type substrate, and the first conduction type substrate is successively arranged above the first conduction type substrate; the beneficial effects of the utility model are that the Schottky diode auxiliary trigger structure adopted by the utility model can improve the problem of local overheating caused by delayed starting response speed and current concentration of a conventional low-capacitance SCR device of a PN junction auxiliary trigger structure formed by adopting high-concentration injected N-type and P-type impurities, thereby improving the reliability of the device; due to the fact that the Schottky junction is better in high-temperature performance and current capacity, the overall size of the auxiliary trigger structure can be further compressed during design, for example, the number of stripes or the size of the stripes is reduced, and the capacitance value of the SCR protection device is further reduced in this way.

The present invention belongs to the field of semiconductor power device technology and relates to a novel method for preparing metal contacts for silicon carbide power devices. Specifically, a method for preparing a silicon carbide field-effect power transistor with an integrated Schottky diode is provided, which simplifies the preparation process, reduces preparation costs, and shortens the manufacturing cycle, making it particularly suitable for large-scale industrial production. During the device electrode preparation process, the present invention uses a single mask to produce Schottky contact holes and gate contact holes through a single etching process. Ohmic contact is achieved above the source electrode using nickel metal through a photomask, and Schottky contact is formed above the Schottky region and gate using titanium metal through a photomask. This ensures that both ohmic and Schottky contacts achieve good performance, and not only saves manufacturing costs in large-scale production, but also reduces the device manufacturing cycle.

This invention discloses an automatically wake-up driving circuit for a test pen, comprising a detection module, a trigger module, a locking module, and a sampling module. The detection module includes a transistor powered by a battery via a field-effect transistor, connected to the main pen. Based on the connection state of the main pen, it outputs a detection signal. An operational amplifier acquires the detection signal and supplies it to a comparator for comparison. A Schottky diode outputs an external trigger signal. The trigger module conducts based on the external trigger signal, supplying operating current to the sampling module. The locking module maintains the conduction of the trigger module according to a power-locking signal. The sampling module samples and outputs an indicator signal. Thus, in standby mode, monitoring is maintained with minimal power consumption. When contact between the main pen and the auxiliary pen is detected, the circuit automatically conducts, generating a power-locking signal to maintain power supply. When the main pen and the auxiliary pen are disconnected, the circuit returns to standby mode. Therefore, manual power on / off is unnecessary; circuit testing can be triggered at any time, and the circuit returns to standby mode when idle, significantly reducing overall device power consumption and effectively extending device lifespan.

Disclosed are a Schottky diode and a manufacturing method thereof. The Schottky diode includes a substrate, a first semiconductor layer, a heterostructure layer, a passivation layer, and a cap layer stacked in sequence. The passivation layer includes a first groove and a second groove, and the first groove and the second groove penetrate through at least the passivation layer. A first electrode is arranged at least on the cap layer corresponding to the first groove; a second electrode is arranged in the second groove. A Schottky contact is formed between the first electrode and the cap layers, so that a direct contact area between the first electrode and the heterostructure layer may be avoided, a contradiction between the forward turn-on voltage and the reverse leakage of the Schottky diode may be balanced, and a leakage characteristic of the heterostructure layer in a high temperature environment may be suppressed.

An irradiation-resistant diamond Schottky diode and its fabrication method are disclosed. The purpose of this invention is to solve the problem of poor radiation resistance stability in Schottky diodes. In this irradiation-resistant diamond Schottky diode, p-type diodes are epitaxially grown on an intrinsic diamond substrate. + Diamond epitaxial layer, in p + An ohmic electrode is deposited in a portion of the upper surface of the diamond epitaxial layer, at p + p-type epitaxial growth is performed on the region of the diamond epitaxial layer where no ohmic electrode is deposited. ‑ Type II diamond drift layer, in p ‑ Easily oxidizable metal electrodes are deposited on a diamond drift layer, serving as Schottky electrodes. These electrodes are then terminated with oxygen. ‑ A metal oxide layer is formed between the drift layers of the diamond. This invention utilizes a low work function, easily oxidizable metal as a Schottky electrode. The low work function, easily oxidizable metal passivates the oxygen terminals on the diamond surface. The oxide layer formed on the diamond surface makes the oxygen terminals less susceptible to radiation-induced reconstruction, resulting in stronger radiation resistance.

The utility model discloses a conduction performance detection device for Schottky diode production, and relates to the technical field of Schottky diodes. The device comprises a workbench, a detection device and a fixed seat are installed on the upper surface of the workbench, a driving assembly is installed on the workbench, moving assemblies are installed at the two ends of the driving assembly, and detection assemblies are installed on the moving assemblies. According to the utility model, the diode main body is placed on the fixing seat, and the driving assembly can drive the detection assembly installed on the moving assembly to approach the fixing seat, so that the detection assembly is contacted with pins at two ends of the diode main body, and data is transmitted to a detection device through the detection assembly. Therefore, an operator is informed of whether the conduction performance of the diode main body is qualified through the detection device, tedious manual operation is not needed any more, the conduction performance of the diode can be simply detected through the device, time and labor are saved, and the working efficiency is improved.

The application discloses a trench Schottky diode with a composite P+ structure and a manufacturing method thereof, and belongs to the technical field of semiconductors. The cell structure comprises a substrate, an epitaxial layer on one side surface of the substrate, the epitaxial layer comprising a wave-shaped trench and a plurality of P+ columns, the depth of the wave-shaped trench gradually decreasing from the center to the periphery of the cell structure, the plurality of P+ columns being uniformly distributed around the wave-shaped trench, an anode metal, the inner surface of the wave-shaped trench being deposited with Schottky metal, the Schottky metal forming a wave-shaped Schottky contact with the epitaxial layer, the anode metal being located in the wave-shaped trench covered by the Schottky metal and covering the surface of the epitaxial layer away from the substrate, and a cathode metal located on the surface of the substrate away from the epitaxial layer. The application not only solves the contradiction between the breakdown voltage and the on-voltage of the trench Schottky diode in high-voltage and high-frequency applications, but also improves the surge resistance of the device under extreme conditions.

The utility model relates to a photovoltaic grid-connected inverter circuit and electronic equipment, and belongs to the technical field of inverters, an MPPT boost circuit is connected with photovoltaic direct current, and the MPPT boost circuit comprises a boost inductor, a boost SiC MOSFET and a SiC Schottky diode; the H4 bridge inverter circuit comprises an inverter inductor and an inverter SiC MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor); the first silicon carbide driving circuit is used for confirming the driving frequency of the boost SiC MOSFET according to the inductance value of the boost inductor; the second silicon carbide driving circuit is used for confirming the driving frequency of the inversion SiC MOSFET according to the inductance value of the inversion inductor; the silicon carbide power device is used in cooperation with a corresponding PWM modulation mode, the hardware design of the photovoltaic grid-connected inverter circuit is simplified, the size and switching loss are reduced, efficiency is improved, and EMI interference is restrained.

The invention relates to the technical field of chip packaging, in particular to a photovoltaic bypass chip, which is characterized in that a power switch, a photovoltaic bypass control chip and a self-storage capacitor required by the photovoltaic bypass control chip are packaged on the same insulating base, so that a high-integration photovoltaic bypass function monolithic system is realized, the complexity and the cost of a peripheral circuit are reduced, and the reliability and the reliability of the system are improved. And the reliability of the photovoltaic bypass function is improved, so that the stability and reliability of the solar optimizer and even the whole photovoltaic system are improved. Meanwhile, the packaging method does not limit the shape of an external packaging frame, is compatible with various packaging frames including traditional Schottky diode packaging, and has high universality.

Title: Microelectronic Power Device The invention relates to a power device comprising: - High electron mobility transistors (T1, T2, T3) formed on an active layer (11), each transistor (T1, T2, T3) comprising a source finger (S), a drain finger (D), and a gate finger (G), - A source contact (S') common to the source fingers (S), - A drain contact (D') common to the drain fingers (D), - A gate contact (G') common to the gate fingers (G). Advantageously, at least one gate finger is not connected to the gate contact (G') and forms a Schottky contact (CS) with the active layer (11). This gate finger (CS) advantageously forms, with the adjacent drain finger (D), a Schottky diode (DS) configured to measure an operating temperature within the power device. Figure for the abstract: Fig. 2A

The invention relates to a high-heat-dissipation vertical-structure Ga2O3 Schottky diode and a preparation method thereof, and the preparation method comprises the steps: S1, obtaining a single-crystal gallium oxide substrate, preparing a highly-doped gallium oxide layer on the single-crystal gallium oxide substrate, and depositing a Schottky contact metal layer on one surface, far away from the highly-doped gallium oxide layer, of the single-crystal gallium oxide substrate; s2, obtaining a heat-conducting and electric-conducting substrate, and depositing an ohmic contact metal layer on the heat-conducting and electric-conducting substrate; s3, bonding the deposited Schottky contact metal layer in the step S1 and the ohmic contact metal layer in the step S2 to obtain a heterostructure; and S4, depositing a cathode metal layer on the highly-doped gallium oxide layer with the heterostructure to obtain the high-heat-dissipation vertical-structure Ga2O3 Schottky diode. In the technical scheme of the invention, an efficient longitudinal heat conduction path is constructed, so that heat generated during working can be quickly conducted to the heat-conducting and electric-conducting substrate from the active region through the Schottky junction and the metal bonding layer, and the thermal resistance of the device during working is reduced.

The invention relates to a manufacturing method of a trench Schottky diode with an adjustable forward voltage. A Schottky diode includes a substrate having an active region. The grooves extend into the substrate epitaxial layer, the side walls and the bottom surfaces of the grooves are lined with insulating layers, and the rest part of each groove is filled with polycrystalline silicon (polycrystalline silicon) filler. A doped region having a dopant of the same conductivity type as the semiconductor substrate is implanted in the epitaxial layer at a position between adjacent trenches. A silicide is provided at each polysilicon filler and a Schottky barrier is provided at each doped region. An anode contact of the diode contacts the silicide and the Schottky barrier, and a cathode contact of the diode contacts the lower surface of the substrate. The dopant concentration level of the selected doped region controls the setting of the forward voltage (VF) level of the Schottky diode.