626 results about "Schottky diode" patented technology

The invention relates to the technical field of direct-current power supplies, in particular to a silicon carbide material-based high-power synchronous rectification direct-current power supply and a control method thereof, and the silicon carbide material-based high-power synchronous rectification direct-current power supply comprises an input filtering module, a high-frequency inversion module, a synchronous rectification module, an output filtering module and a control module; the output end of the high-frequency inversion module is connected with the input end of the synchronous rectification module, and the high-frequency inversion module is composed of a full-bridge inversion circuit composed of SiC MOSFETs. The output end of the synchronous rectification module is connected with the input end of the output filtering module, and the synchronous rectification module comprises a topological structure in which a SiC Schottky diode and a SiC MOSFET are connected in parallel; and the control module is in signal connection with the high-frequency inversion module and the synchronous rectification module, acquires input voltage, output voltage, current and temperature parameters in real time, and controls the on-off state of each module through a driving signal. The invention has the effects of effectively reducing the power supply energy loss and improving the power supply efficiency.

A SiC trench MOSFET with an embedded junction Schottky barrier diode (JBSD) having P-shield (PS) regions surrounding bottoms of source-body-Schottky contact (SBSC) trenches for gate oxide electric-field and switching loss reductions is disclosed. A source metal connects with the PS regions and the JBSD directly. Sidewall P (SP) regions are formed along a portion of sidewalls of the SBSC trenches to improve a tradeoff between a drain-source leakage current of the SiC trench MOSFET and a forward voltage of the JBSD. The device further comprises an N-type shield region formed below each of gate trenches for gate oxide electric field strength and specific on-resistance reductions.

The utility model discloses an intrinsic safety power supply circuit and a fuel electrochemical oxygen analyzer. The intrinsic safety power supply circuit comprises a first MOS tube, a first capacitor, a second capacitor, a first resistor, a first Schottky diode, a first Zener diode and a second Zener diode, the power supply module of the fuel electrochemical oxygen analyzer comprises the intrinsic safety power supply circuit and further comprises a sensor module, an AD conversion module, a key module, a single chip microcomputer module, an analog output module and a display driving module which are connected with the power supply module, and the single chip microcomputer module is connected with the AD conversion module, the key module, the analog output module and the display driving module. The sensor module is connected with the AD conversion module, and the analog output module is connected with external equipment; the fuel electrochemical oxygen analyzer adopts the intrinsically safe power supply circuit to limit the working current and voltage in the circuit so as to control the power consumption of the whole machine, so that explosion prevention is realized, and the fuel electrochemical oxygen analyzer can measure the oxygen concentration in a flammable and explosive environment.

The utility model provides an efficient charging circuit for a nickel-metal hydride battery, which belongs to the technical field of charging circuits, and comprises a DCDC charging circuit, a current sampling conversion circuit and a voltage hysteresis charging control circuit, a Celloon XL4001 step-down DCDC converter with a constant current loop is selected, and an external Schottky diode TS1 is added to play a follow current role; the charging voltage is conveniently adjusted according to the resistance values of the R7 and R10 resistors; the current sampling conversion circuit adopts a battery high-side sampling mode, so that the situation that the output voltage of the battery drops too much due to too large voltage drop of a sampling resistor during low-end sampling during battery power supply is avoided; the operational amplifier introduces a sampling differential voltage signal into a current detection pin of the XL4001; temperature adjusting design is introduced into hysteresis design, reverse change is carried out along with the temperature, then the upper limit value and the lower limit value of hysteresis charging voltage are changed, and the defect that a traditional nickel-metal hydride battery charging circuit has adverse effects on the service life of a battery is overcome.

The invention provides a process method for improving the performance of a beta-Ga2O3 device through low-energy proton irradiation, and relates to the technical field of electronic components, and the method comprises the following steps: carrying out low-energy proton irradiation on the basis of irradiation experiment parameters at a preset environment temperature; low-energy proton irradiation with different fluence is carried out on the beta-Ga2O3 Schottky diode in a preset incidence mode to determine irradiation process data, and in combination with deep level transient spectroscopy (DLTS) analysis and device simulation, defect evolution and a hydrogen passivation mechanism caused in a beta-Ga2O3 epitaxial layer after low-energy proton incidence are revealed. According to the method, the cognitive limitation that traditional radiation must cause performance degradation of devices is broken through, and the field of low-energy proton irradiation which is not fully researched is focused.

The SiC JFET structure comprises a drain electrode metallization layer, an N + substrate layer, an N-drift region, a P first gate region, an N current expansion region, a P second gate region, an N + source region, a gate electrode metallization layer, an insulating dielectric layer, a source electrode ohmic contact layer, a source electrode Schottky contact layer and a source electrode metallization layer. The P first gate regions are embedded in the upper surface of the N-drift region, the gap between the two P first gate regions forms a vertical conductive channel structure, and the source Schottky contact layer is located right above a channel to form a Schottky diode structure, so that the conduction loss during follow current of the device can be effectively reduced; meanwhile, the gate metallization layer is located at the bottom of the gate trench and directly connected with the P first gate region, the gate metallization layer is isolated from the source metallization layer through the insulating dielectric layer in the gate trench, and the device has the advantages of being small in reverse blocking leakage current, high in reliability and the like.

The invention relates to the technical field of Internet of Things, in particular to a circuit for simultaneously converting UART (Universal Asynchronous Receiver / Transmitter) to multi-path different level communication, which comprises a double-USB input module, a power supply processing module, a USB-UART core conversion module and a multi-path level conversion module, the double-USB input module comprises an MINI-USB interface J6 and a USB-B interface J8, VBUS pins of the two interfaces are connected in parallel through a Schottky diode and then output to the power supply processing module, and data differential pair pins are connected in parallel and then connected to the USB-UART core conversion module; and the power supply processing module comprises an LDO (Low Dropout Regulator) voltage stabilizing chip and a filter capacitor, and is used for converting 5V voltage output by the double-USB input module into 3.3 V stable voltage. The circuit design that the UART is connected with various different levels for communication is adopted, the tool integration technology is achieved, the design that the two USB ports are connected in parallel is adopted, the compatibility of the USB data line can be effectively improved, the demands of customers are met, and the technical difficulty that one UART bus is connected with multiple USB ports is broken through.

The invention discloses a frequency quasi-independent controllable double-frequency electrically small rectification circuit, and belongs to the field of radio frequency energy collection. The rectifying circuit comprises a double-frequency matching network, a blocking capacitor, two Schottky diodes, a filter capacitor and a resistive load. The dual-frequency matching network is composed of a capacitor, an inductor and a microstrip line and used for achieving impedance matching of two working frequency points and achieving quasi-independent regulation and control of the positions of the two frequency points by adjusting the value of the inductor and the length of the microstrip line. And the microstrip line is bent for five times so as to realize the miniaturization of the overall structure of the circuit. The blocking capacitor is used for blocking a direct current component and avoiding energy feedback; the two Schottky diodes are used for converting a radio frequency signal into direct current energy; the filter capacitor is used for improving the smoothness of output direct current energy and improving the energy conversion efficiency. The device is compact in structure, adjustable in frequency point position and suitable for a dual-band radio frequency energy collection scene.

The invention discloses a high-safety nanosecond-order delay transistor testing system and method, belongs to the field of transistor testing, and can test the characteristics of a transistor to be tested at any drain voltage stress value, drain voltage stress duration and load current based on nanosecond-order measurement delay on the basis of ensuring the safety of the testing system and experimenters. The circuit comprises switches S1, S2 and S3, resistors RA and RC, Schottky diodes D1 and D2, a power inductor L and a power supply VDD. The conduction time of the switch S1 can be controlled to control the duration of the post-stage circuit for bearing the high voltage VDD; the current value of the power inductor L at the end of charging can be controlled by controlling the conduction time of the switch S2; by testing the voltage and the current of the switch S3, the switch transient characteristic, the on-resistance characteristic and the like of the switch S3 can be obtained. Simulation and experiments prove that the measurement delay of switching to the test state after the voltage stress of the drain electrode is ended is nanosecond magnitude, and the situation of'large current connection caused by mistaken switching-on of a series switch 'does not exist, so that the circuit safety is higher.

The invention relates to a compensation polarization doped aluminum nitride Schottky diode and a manufacturing method thereof. The compensation polarization doped aluminum nitride Schottky diode comprises a substrate, an unintentionally doped AlN layer, a Si doped AlN layer and a Si compensation doped Al component slowly-decreasing layer from bottom to top. The surface of the Si-doped AlN layer is in Schottky contact with the anode of the diode; the Si compensation doped Al component slowly-decreasing layer is from AlN to Al < x > Ga < 1-x > N from bottom to top, the value range of x is 0-0.3, and ohmic contact is formed between the Si compensation doped Al component slowly-decreasing layer and the cathode of the diode. According to the aluminum nitride Schottky diode, through compensation polarization doping, the metal contact performance is improved, the problems that the material surface is rough and the carrier mobility is low due to impurity doping are solved, and the Schottky diode with the high potential barrier and the low ideal factor is achieved.

The invention provides a high-voltage-resistant gallium oxide trench junction barrier Schottky diode. The high-voltage-resistant gallium oxide trench junction barrier Schottky diode comprises a cathode metal layer, a high-doping N-type gallium oxide substrate, a low-doping N-type gallium oxide epitaxial layer, an etching table top first dielectric layer, an etching table top second dielectric layer, a P-type nickel oxide layer, a dielectric layer and an anode metal layer which are sequentially stacked from bottom to top. According to the invention, P-type nickel oxide and gallium oxide are introduced to construct a heterostructure into a JBS structure, the JBS structure is combined with the etched trench to form a trench junction barrier Schottky diode, and the device has lower specific on-resistance, can bear higher reverse breakdown voltage, and is a gallium oxide JBS device with excellent performance.

The invention provides a chip electrostatic protection circuit and a protection method thereof.The chip electrostatic protection circuit comprises an electrostatic transmission module, a clamping module and a discharge protection module, electrostatic energy of an input port and an output port of a chip is transmitted through the electrostatic transmission module, and the clamping module is connected with the electrostatic transmission module and a power port; static energy is discharged through the clamping module, when chip control voltage is input into the chip input and output port, the clamping module is prevented from being mistakenly conducted through the discharging protection module, and on the basis of a reverse series connection structure of a diode in the static transmission module and a Schottky diode in the clamping module, the clamping module is prevented from being mistakenly conducted. And DC isolation between the input and output ports of the chip and the power port is realized. According to the protection circuit provided by the invention, the DC isolation of the chip input / output port and the power supply port is realized through the Schottky diode, the power-on time sequence requirement is avoided, and the voltage input range is expanded; in order to prevent the static discharge access from being opened mistakenly when the chip works normally, the discharge protection module controls the control voltage of the static discharge access.

The invention relates to the technical field of photovoltaic integrated circuits, in particular to a photovoltaic module positioning and information transmission circuit which can be matched with a photovoltaic bypass circuit to report the state of a photovoltaic module under the condition that the number of discrete components is extremely limited. And meanwhile, the reliability of the photovoltaic system is improved, and digital and intelligent management of the solar cell panel is realized. In addition, according to the technical scheme, extra external power supply and high-voltage isolation are not needed, power can be taken from a photovoltaic system, and meanwhile, a self-floating power ground is provided. Finally, the technical scheme can be suitable for various photovoltaic bypass circuit schemes consisting of a Schottky diode, an MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) and a universal control chip and consisting of an MOSFET and a photovoltaic bypass control chip, and has better universality.

The invention discloses a system for simultaneously suppressing second-order nonlinearity and third-order nonlinearity in a direct modulation laser (DML), which belongs to the field of optical communication, and can simultaneously suppress the second-order nonlinearity and the third-order nonlinearity in the system under the condition of DSP-FREE through the combined action of a broadband pre-distortion circuit and an optical path push-pull structure. Wherein at a transmitting end, a set of Schottky diodes and Chebyshev gradient transmission lines which are connected in parallel reversely are adopted to build a DC-10GHz broadband pre-distortion module, and a radio frequency signal generates a reverse third-order intermodulation (IMD3) component through an analog pre-distortion circuit so as to counteract forward third-order nonlinearity of a laser; at a receiving end, a second-order intermodulation (IMD2) component is differentially eliminated through an optical path push-pull modulation architecture. Compared with a traditional DSP scheme, digital signal processing is not needed, the method has the advantages of being low in complexity and wide in bandwidth, and nonlinear accurate compensation of an optical communication system can be achieved.

A high-safety transistor testing system and method with nanosecond-level delay is disclosed, belonging to the field of transistor testing. It enables transistor characteristic testing under arbitrary drain voltage stress values, drain voltage stress durations, and load currents based on nanosecond-level measurement delays, while ensuring the safety of the testing system and personnel. The circuit includes: a switch. S 1, S 2, S 3. Resistance R A , R C Schottky diode D 1, D 2. Power Inductor L ,power supply V DD Control switch S 1. The conduction time can control the high voltage that the subsequent circuit can withstand. V DD Duration; control switch S 2. On-time can control the power inductor L Current value at the end of charging; test switch S From the voltage and current of 3, we can determine the switch. S 3. Switching transient characteristics, on-resistance characteristics, etc. Simulation and experiments show that the measurement delay of switching to the test state after the drain voltage stress ends is on the order of nanoseconds, and there is no situation of "accidental opening of series switch leading to large current conduction", so the circuit safety is higher.

The invention discloses a silicon carbide power device junction temperature online accurate extraction method based on a double-sensor Kalman filtering weighted average algorithm, and the method comprises the following steps: 1, enabling a loss model of a power device to receive the phase current, the DC bus voltage, the duty ratio, the phase current and the DC bus voltage from an inverter; the on resistance of the SIC MOSFET, the reference direct current bus voltage, the on loss energy and the off loss energy under the on current and the on threshold voltage of the Schottky diode are obtained from a data manual of the chip, and the gate driving resistor is used for extracting the junction temperature and monitoring operation in real time; and step 2, obtaining an estimated junction temperature through loss calculation of a power device and a thermal network model, and weighting the junction temperatures estimated at different measurement points through a Kalman filtering weighted average algorithm to obtain a more accurate junction temperature for next iterative calculation. According to the method, the limitation of a traditional single sensor in a dynamic working environment can be effectively compensated, and the accuracy and the real-time performance of junction temperature monitoring are improved.

The invention belongs to the field of semiconductor devices, provides a gallium nitride high-electron-mobility transistor integrated with a Schottky diode and a preparation method of the gallium nitride high-electron-mobility transistor, and aims to solve the problem that a conventional gallium nitride high-electron-mobility transistor (GaN HEMT) lacks a body diode. According to the invention, monolithic integration of the SBD and the GaN HEMT is realized through structural design, a low-impedance path is provided for reverse current, and the integration mode not only retains the original high performance characteristic of a GaN device, but also additionally endows the GaN device with reverse conduction and reverse recovery capabilities; moreover, through the structural design, the SBD can be synchronously completed on the basis of the existing GaN HEMT process, a special process or new equipment is not needed, and the cost is effectively controlled while the performance improvement is ensured; compared with an external interconnection diode scheme, parasitic inductance caused by lead bonding is eliminated, the voltage overshoot and ringing phenomena in the switching process are remarkably reduced, high-frequency switching application is facilitated, and switching loss can be greatly reduced.

The invention discloses a diamond diode capable of selecting growth and regulating doping concentration and a preparation method thereof. The preparation method comprises the following steps: growing a (100) crystal orientation lightly doped diamond layer on a (100) crystal orientation intrinsic diamond substrate; etching the upper surface of the lightly doped diamond layer to form a groove, wherein the depth of the groove is smaller than the thickness of the lightly doped diamond layer; carrying out selective growth in the groove to form a heavily doped diamond layer with (111) crystal orientation; hydrogen terminals on the upper surface of the lightly doped diamond layer and the upper surface of the heavily doped diamond layer are removed; growing an ohmic electrode on the upper surface of the heavily doped diamond layer; and a Schottky electrode grows on the upper surface of the lightly doped diamond layer, and the ohmic electrode and the Schottky electrode are arranged at an interval. According to the invention, the carrier concentration difference between the drift region and the ohmic contact region of the device can be increased to 4-5 orders of magnitude, the reverse breakdown voltage and the breakdown field strength of the Schottky diode are improved, and the leakage current is reduced.

An MOS junction barrier Schottky diode relates to the technical field of power semiconductor devices. The N-type substrate, the N-type epitaxial layer, the deep P region, the trench gate, the trench gate oxide layer, the conductive enhancement region and the isolation oxide layer are arranged between the cathode metal and the anode metal, the lower surface of the N-type substrate is in contact with the cathode metal, the upper surface of the N-type substrate is in contact with the lower surface of the N-type epitaxial layer, and the upper surface of the N-type epitaxial layer is in contact with the P region. The conductive enhancement region is arranged on the outer surface of the trench gate oxide layer and is in contact with the N-type epitaxial layer, and a part of the trench gate oxide layer, the conductive enhancement region, the isolation oxide layer and a part of the deep P region are respectively in contact with a part of the anode metal. According to the MOS junction barrier Schottky diode structure, the groove gate MOS structure is inserted into the adjacent P region of a traditional junction barrier Schottky (JBS) diode, so that the carrier density at a channel is improved, the channel resistance is reduced, and the reverse electric leakage characteristic and the forward voltage drop are further improved.

The invention relates to a programmable non-volatile ferroelectric Schottky diode and a manufacturing method thereof. The programmable non-volatile ferroelectric Schottky diode comprises a control structure which comprises an insulating layer and a conductive layer; the diode structure is located on the side, opposite to the conducting layer, of the insulating layer, the diode structure comprises a ferroelectric semiconductor layer and a semimetal layer, the material of the ferroelectric semiconductor layer comprises two-dimensional alpha-In2Se3, the semimetal layer is in Schottky contact with the ferroelectric semiconductor layer, and the material of the semimetal layer comprises two-dimensional 1T '-MoTe2. The programmable non-volatile ferroelectric Schottky diode fills the technical blank of application of ferroelectric materials.

The invention relates to the technical field of electron Schottky diode testing methods, in particular to a method for verifying that a Schottky diode reaches junction temperature through high-temperature reverse bias. Transient leakage current testing and series resistor voltage division are carried out on the detected Schottky diode in a nominal junction temperature environment to prevent thermal collapse, and whether the nominal junction temperature is reached or not is finally judged by dynamically adjusting the environment temperature and the reverse voltage and monitoring the change of the leakage current and the voltage at the two ends of the Schottky diode in real time. The method can accurately verify the junction temperature state of the Schottky diode in the high-temperature reverse bias test, effectively avoids thermal runaway failure, is suitable for batch detection, and has the characteristics of simple operation and high reliability.

The invention discloses a groove Schottky diode of a composite P + structure and a manufacturing method of the groove Schottky diode, and belongs to the technical field of semiconductors. The epitaxial layer is located on the surface of one side of the substrate; the epitaxial layer comprises a wave-shaped groove and a plurality of P + columns; the depth of the wave-shaped groove is gradually reduced from the center of the cellular structure to the periphery, and the plurality of P + columns are uniformly distributed around the wave-shaped groove; an anode metal; schottky metal is deposited on the inner surface of the wave-shaped groove, the Schottky metal and the epitaxial layer form wave-shaped Schottky contact, and the anode metal is located in the wave-shaped groove covered by the Schottky metal and covers the surface of the side, away from the substrate, of the epitaxial layer. The cathode metal is located on the surface of the side, away from the epitaxial layer, of the substrate. According to the trench Schottky diode, the contradiction between the breakdown voltage and the break-over voltage of the trench Schottky diode in high-voltage and high-frequency application is solved, and the anti-surge capability of the device under the limiting condition can be improved.

An improved silicon carbide (SiC) planar MOSFET having at least one buried P-shield (BPS) region including one center portion and two side portions for the gate oxide electric field and saturation current reductions is disclosed. Two saturation current pitching (SCP) structures formed in two Junction Field Effect Transistor (JFET) regions sandwiched between the side portions and the center portion of the BPS region limit a saturation current of the device in a forward conduction stage for the short-circuit capability improvement. Moreover, a Junction barrier Schottky diode (JBSD) is integrated with the SiC MOSFET in a location between the two adjacent split gate electrodes for the reverse conduction switching loss reduction.

An image sensor pixel is provided that includes a semiconductor substrate having a front surface and a back surface opposing the front surface, a photosensitive element such as a photodiode formed in the front surface of the semiconductor substrate and configured to sense light in a first range of wavelengths, an interconnect stack formed on the front surface of the semiconductor substrate, and a thin-film diode formed in the interconnect stack and configured to sense light in a second range of wavelengths different than the first range of wavelengths. The thin-film diode may be a Schottky diode. The thin-film diode may include one or more rows of protruding or finger-like metal structures and semiconducting oxide material disposed directly on the protruding metal structures.

The invention discloses a groove SiC MOSFET device and a preparation method thereof. The preparation method comprises the following steps: epitaxial growth; performing P-type ion implantation for the first time; performing first-stage groove etching; performing N-type ion implantation; implanting P-type ions for the second time; carrying out second-stage groove etching; growing gate oxide, polycrystalline silicon and an interlayer insulating layer; carrying out metal deposition; the beneficial effects of the invention are that the multi-stage trench structure is combined with the plane gate and the trench gate, so that the channel density is increased, the current capability is provided, and the conduction loss is reduced; the MPS diode structure is integrated, the forward voltage drop of the body diode is reduced, the discharge capacity is improved when inrush current occurs in the circuit, the reverse follow current capacity can be improved through the parallel Schottky diode structure, and electronic elements needed by a peripheral circuit are reduced; by integrating the built-in field plate structure, the electric field concentration effect at the bottom of the trench gate is effectively relieved.

The invention discloses a W-band switching line MMIC phase shifter based on an aligned CNT Schottky diode. The phase shifter comprises a substrate, a radio frequency input port, a radio frequency output port, two transmission paths with different physical lengths, a switch selection network and a direct current bias circuit. Wherein the switch selection network adopts an aligned carbon nanotube Schottky diode and is configured at the input end and the output end of the transmission path. Complementary control voltage is applied through the direct-current bias circuit, the switch selection network is driven to enable the selected paths to be conducted at the two ends at the same time and the unselected paths to be cut off at the two ends at the same time, and therefore discrete switching of phases is achieved. The high-frequency characteristic of the aligned carbon nanotube device is combined with the double-end complementary selection topology, so that the problem that the amplitude imbalance and the phase precision are difficult to consider at the W wave band is effectively solved, the signal leakage and the parasitic resonance of a non-conducted branch are remarkably inhibited, and the low-insertion-loss high-isolation low-insertion-loss high-isolation low-insertion-loss high-isolation low-insertion-loss high-isolation low-insertion-loss high-isolation low-insertion-loss high-isolation low-insertion-loss high-isolation low-insertion-loss low

The present disclosure relates to a unidirectional transient voltage suppression device, comprising: a single crystalline semiconductor substrate doped with a first conductivity type and comprising a first opposite surface and a second opposite surface; a semiconductor region doped with a second conductivity type opposite the first conductivity type extending into the substrate from the first surface; a first conductive electrode in contact with the semiconductor region on a first side; and a second conductive electrode in contact with the substrate on a second side; a first interface forming a junction of a TVS diode between the substrate and the semiconductor region; and a second interface forming a junction of a Schottky diode between the first conductive electrode and the semiconductor region or between the substrate and the second conductive electrode.

The utility model discloses a low capacitance SCR structure ESD protection device, and relates to the safety protection field, the low capacitance SCR structure ESD protection device comprises a first conduction type substrate, and the first conduction type substrate is successively arranged above the first conduction type substrate; the beneficial effects of the utility model are that the Schottky diode auxiliary trigger structure adopted by the utility model can improve the problem of local overheating caused by delayed starting response speed and current concentration of a conventional low-capacitance SCR device of a PN junction auxiliary trigger structure formed by adopting high-concentration injected N-type and P-type impurities, thereby improving the reliability of the device; due to the fact that the Schottky junction is better in high-temperature performance and current capacity, the overall size of the auxiliary trigger structure can be further compressed during design, for example, the number of stripes or the size of the stripes is reduced, and the capacitance value of the SCR protection device is further reduced in this way.

The present invention belongs to the field of semiconductor power device technology and relates to a novel method for preparing metal contacts for silicon carbide power devices. Specifically, a method for preparing a silicon carbide field-effect power transistor with an integrated Schottky diode is provided, which simplifies the preparation process, reduces preparation costs, and shortens the manufacturing cycle, making it particularly suitable for large-scale industrial production. During the device electrode preparation process, the present invention uses a single mask to produce Schottky contact holes and gate contact holes through a single etching process. Ohmic contact is achieved above the source electrode using nickel metal through a photomask, and Schottky contact is formed above the Schottky region and gate using titanium metal through a photomask. This ensures that both ohmic and Schottky contacts achieve good performance, and not only saves manufacturing costs in large-scale production, but also reduces the device manufacturing cycle.

The present invention relates to a deep trench MOSFET-like Schottky diode and a manufacturing method thereof. The deep trench MOSFET-like Schottky diode includes: a substrate; an epitaxial layer located on the upper surface of the substrate; a plurality of deep trenches located in the epitaxial layer, with source polysilicon and gate polysilicon disposed in the deep trenches; a well region located on the upper surface of the epitaxial layer; a source region located on the upper surface of the well region, characterized in that it further includes: a first base region disposed in the well region between two adjacent deep trenches and having the same conductivity type as the well region; a second base region located below the first base region, the second base region having the same conductivity type as the first base region and a doping concentration lower than that of the first base region; and a metal electrode penetrating through the first base region and the second base region. The present invention can reduce the time and charge required for the reverse recovery of the diode.