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538results about How to "Improve breakdown voltage" patented technology

A deep ditch groove high-power MOS device and the corresponding manufacturing method

The invention relates to a deep trench high-power MOS device and the manufacturing method. The MOS device is arranged on an overlooking plane, a central area is provided with an array which consists of parallel connected single cells, the periphery of the single-cell array is provided with a terminal protection structure, the terminal protection structure consists of at least one protection ring which is arranged at an inner ring and a stop ring which is positioned at an outer ring; as both the protection ring and the stop ring adopt trench type conductive polysilicon, and a single-cell grid electrode lead wire adopts the method of directly opening a hole to lead the wire on the trench type conductive polysilicon in the manufacturing process of the device; compared with the manufacturing method of existing common plane type deep trench high-power MOS device with a field-plate structure, the invention can reduce two lithographys and corresponding processes under the premise of not affecting the performances of the device, thus greatly reducing manufacturing cost. At the same time, the invention adopts one time phosphorus injection, then one time boron injection and matching annealing processes are adopted to regulate the conductive polysilicon resistance, thereby greatly reducing the leakage current between a grid and a source and ensuring to obtain a reasonable threshold voltage under the premise of not increasing the concentration of an N-well.
Owner:SUZHOU SILIKRON SEMICON CO LTD

Super junction lateral double-diffused metal-oxide semiconductor (LDMOS) device

InactiveCN103165678AImprove vertical pressure resistanceImprove breakdown voltageSemiconductor devicesLDMOSPeak value
The invention relates to a super junction lateral double-diffused metal-oxide semiconductor (LDMOS) device and belongs to the field of semiconductor power devices. By means of the super junction LDMOS device, evenly distributed N+ islands are embedded in a P type substrate of a traditional super junction LDMOS device, and a P type electric field screening buried layer is added between an active area and the substrate. An N+ island (2) can improve longitudinal withstand voltage of the device by enhancing internal electric field, simultaneously generates extra electric charge to eliminate substrate auxiliary depletion effect, and further improves breakdown voltage of the device. The P type electric field screening buried layer (3) can screen high electric fields generated by an N+ island near an active end, lower electric field peak value near the active area, and form super junction with an N type cushion layer; and a super junction drift area is provided, the device is enabled to have multiple super junction structures, accordingly electric field distribution inside the device can be effectively improved, breakdown voltage of the device is improved, conduction ratio resistance of the device is simultaneously lowered by improving dosage concentration of the drift area, and finally the aim of effectively reducing device area and lower device cost can be achieved.
Owner:UNIV OF ELECTRONICS SCI & TECH OF CHINA +1

Groove gate type gate-leakage composite field plate transistor with high electron mobility

The invention discloses a groove-gate type gate-drain composite field plate transistor with high electron mobility. The transistor comprises, from bottom to top, a substrate (1), a transition layer (2), a barrier layer (3), a source electrode (4), a drain electrode (5), a groove gate (7), a passivation layer (8), a gate field plate (9), a drain field plate (11) and a protection layer (12); the drain field plate (11) is electrically connected with the drain electrode (5), the groove gate (7) is electrically connected with the gate field plate (9), wherein, a groove (6) is opened on the barrier layer (3); and n floating field plates (10) are deposited on the passivation layer arranged between the gate field plate and the drain field plate. All the floating field plates have the same size and are in a floating state, and the floating field plates are equidistantly distributed between the gate field plate and the drain field plate. The n floating plates, the gate field plate and the drain plate are completed on the passivation layer by one-time process. The transistor has the advantages of simple process, good reliability and high breakdown voltage, and can be used for fabricating high power devices based on a wide band gap compound semiconductor material heterojunction.
Owner:XIDIAN UNIV
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