1100 results about "Doping" patented technology

The invention relates to a photovoltaic monocrystalline silicon material resistivity uniformity evaluation method, and belongs to the technical field of photovoltaic material detection. The method comprises the following steps: evaluating all-form resistivity and doping uniformity of a photovoltaic single crystal silicon rod, a single crystal silicon wafer and a single crystal silicon square wafer; carrying out standardized point distribution on the monocrystalline silicon wafer by using a concentric circular ring and a small circle, and calculating in-plane uniformity by using a triple integral derivation equation; the monocrystalline silicon square pieces are distributed in the form of grid small squares, and in-plane uniformity is calculated by means of a triple integral derivation equation; and for the axial direction of the silicon rod, the uniformity is quantified by utilizing range and variance models through the resistivity of the head, middle and tail wafers. Meanwhile, a continuous grid is generated through interpolation, and a 3D color mapping curved surface diagram with plane projection is drawn to visually present distribution. According to axial and in-plane uniformity results, silicon wafers are classified and graded, the doping uniformity of monocrystalline silicon is accurately reflected, and a support is provided for quality control, process optimization and silicon wafer sorting of photovoltaic monocrystalline silicon.

The invention discloses a lithium-rich manganese-based positive electrode material with a fast ion conductor coating layer and bulk phase doping and a preparation method of the lithium-rich manganese-based positive electrode material, the surface of the lithium-rich manganese-based positive electrode material is coated with the coating layer composed of amorphous Li3PO4, the interior of the bulk phase is doped with other elements, the structural formula of the lithium-rich manganese-based positive electrode material is Li < 1 + a > Mn M < c > O < 2 >, m is one or more than one of Ni, Co, A1, Cr, Fe, Mg and Ce, 0 lt; a is less than or equal to 0.2, 0lt; b < = 1, 0lt; c < = 1, and a + b + c = 1. The method comprises the following steps: (1) fully mixing a lithium-rich manganese-based positive electrode material precursor, a certain proportion of lithium salt and a proper amount of phosphate; and (2) sintering the uniformly mixed sample in a certain atmosphere to obtain the lithium-rich manganese-based positive electrode material with the fast ion conductor coating layer and the bulk phase doping structure. The first coulombic efficiency of the lithium-rich positive electrode material is improved, the cycling stability and the rate capability of the lithium-rich positive electrode material are improved, and the requirements of a power battery can be met.

The invention belongs to the technical field of electrochemistry, and particularly provides a lanthanum-cerium double-doped sodium ferric sulfate positive electrode material and a preparation method thereof. The material is composed of a matrix and a carbon coating layer coating the matrix, the matrix has a chemical expression of Na6Fe4-x-yLaxCey (SO4) 7, x is greater than or equal to 0.01 and less than or equal to 0.1, and y is greater than or equal to 0.01 and less than or equal to 0.1. The material is prepared through spray drying and high-temperature sintering treatment in sequence, the particle morphology is regular, and the particle size distribution is uniform; the electronic conductivity and Na < + > diffusion rate of the material are remarkably improved by rare earth doping, so that the material has more excellent low-temperature cycle performance, sodium storage performance and the like.

The invention discloses a method for preparing a boron nitride-gallium oxide thin film flexible dual-band ultraviolet solar blind detector through Van der Waals stripping, and aims to improve the comprehensive performance of the detector. The method comprises the steps of h-BN substrate pretreatment and surface modification, Sn gradient doped beta-Ga2O3 layer preparation, heterojunction interface passivation treatment, two-step Van der Waals stripping and flexible transfer, ohmic contact electrode preparation, gate type Schottky contact electrode preparation, post-treatment and packaging. According to the core, the interface state density is reduced through Al2O3 passivation, and carrier transport is optimized through Sn gradient doping, so that the detector achieves 200-280 nm dual-band response, the peak response rate is high, the response time is short, the leakage current is low, the flexible bending stability is good, high performance and flexibility are both considered, and industrial application can be achieved.

A vertical channel oxide semiconductor field effect transistor and a manufacturing method, relating to the technical field of information materials and devices. In the oxide semiconductor field effect transistor, a trench-shaped oxide semiconductor channel layer is used, the trench is then filled with an oxide semiconductor material, and an oxygen vacancy concentration of a material of an oxide semiconductor filling layer is less than an oxygen vacancy concentration of a material of the oxide semiconductor channel layer; and by using an oxide semiconductor having a low carrier concentration as an internal filling material, a threshold regulation capability of the vertical channel oxide semiconductor field effect transistor can be effectively improved, and the impacts of interface damage and unnecessary doping can be avoided, thereby achieving a vertical channel oxide semiconductor field effect transistor of which a threshold can be accurately regulated.

A core-shell ternary precursor and a preparation method therefor, and a positive electrode material. The core-shell ternary precursor comprises a core and a shell that coats the core. The core is expressed as NixCoyMnz(OH)2-a(WO4)a, wherein x is greater than 0, but less than 1; y is greater than 0, but less than 1; z is greater than 0, but less than 1; x+y+z=1; and the value range of a is 0.01-1. The shell contains aluminum. By means of a combination of tungsten doping and aluminum doping, the advantages of the both are incorporated, and a high-performance precursor is prepared. In addition, the core-shell precursor can effectively improve the surface structure of a precursor, suppress the propagation of cracks on the surface of a high-nickel large-particle precursor, and also effectively inhibit the corrosion of a positive electrode material by an electrolyte, thereby prolonging the battery life.

The invention discloses a ternary positive electrode material as well as a preparation method and application thereof, and belongs to the technical field of lithium ion batteries. The method comprises the following steps: modifying a ternary matrix material in a composite doping manner of rare earth elements and transition metals, and then coating the surface of the material with a layer of amorphous ferric fluoride in a manner of combining atomic layer deposition with fluorination reaction. The ternary positive electrode material provided by the invention has higher rate capability and better cycling stability, and can maintain better chemical performance under high current density, so that the problems of capacity loss and poor electrical performance of the ternary positive electrode material of the lithium battery in a high-voltage long-cycle process are greatly relieved.

The invention provides a core-shell type rare earth gradient doped positive electrode material and a preparation method and application thereof, and the preparation method comprises the following steps: introducing a mixed metal source solution and a first complexing agent into a mixed solvent, carrying out solvothermal reaction to obtain a core precursor, then continuously heating to a first temperature, introducing a rare earth doped source solution, and carrying out solvothermal reaction to obtain a core precursor; continuously raising the temperature to a second temperature for heat preservation, and finally quenching to obtain a precursor material; and mixing and sintering a lithium source and the precursor material to obtain the core-shell type rare earth gradient doped positive electrode material. According to the preparation method, coprecipitation reaction kinetics and a gradient locking process are synchronously regulated and controlled through a mixed solvent system, composition segregation is avoided, lattice distortion is triggered by adopting a solvothermal system, gradient doping of rare earth elements is induced, the interface mutation defect of a traditional core-shell structure is broken through, and the performance of the core-shell structure is improved. And synchronous improvement of high specific capacity and ultra-long cycle life is realized synergistically.

The invention discloses a photosensitive type copper metal organic framework material Cu-MOF, a composite xerogel material thereof, a preparation method and application. According to the invention, a Cu-MOF composite xerogel (Cu-MOF (at) XG) material is utilized to assemble a friction nano generator (TENG), the influence of Cu-MOF (at) XG with different doping proportions on the output performance of the TENG is explored, and meanwhile, the influence of the Cu-MOF (at) XG material with the doping proportion of 10% on the output performance of the TENG under different wave band light (red light (630-640 nm), blue light (460-465 nm), purple light (380-390 nm) and white light (390-780 nm) is explored. An ultra-sensitive wearable self-powered ultraviolet sensor system is constructed by selecting a Cu-MOF (at) XG-TENG device, self power supply is realized by pressing the sensor, accurate identification of ultraviolet intensity in a special environment is realized by comparing output signals, and communication with the outside is realized by displaying an output Morse code communication signal.

The invention belongs to the field of positive electrode materials, and particularly relates to a core-shell ferromanganese phosphate precursor, a modified lithium ferric manganese phosphate material, a preparation method and application of the modified lithium ferric manganese phosphate material and a lithium ion battery. The core-shell ferromanganese phosphate precursor comprises a core and a shell wrapping the core, and the core is Fe3 (PO4) 2; the shell is MnxFe1-x (PO4) y (ferromanganese phosphate), x is more than or equal to 0.1 and less than or equal to 0.9, and y is more than or equal to 0.67 and less than or equal to 0.75. The invention provides a core-shell ferromanganese phosphate precursor which takes Fe3 (PO4) 2 as a core and MnxFe1-x (PO4) y as a shell, and when the core-shell ferromanganese phosphate precursor is used for preparing lithium ferromanganese phosphate, the problem of component segregation is solved, and the Jahn-Teller effect of manganese is reduced; especially for subsequent doping and coating, doping segregation is expected to be reduced, coating interface impedance is reduced, and rapid charging of the prepared material and cycling stability under large current can be remarkably enhanced.

The invention discloses an MEMS device and a preparation method thereof, and relates to the technical field of semiconductor devices. The MEMS device comprises a substrate layer, a stress matching layer and a doped polycrystalline silicon structure layer which are sequentially stacked from bottom to top, and the preparation method comprises the following steps: forming a sacrificial layer on the substrate layer, patterning the sacrificial layer, and defining anchor regions of the stress matching layer and the doped polycrystalline silicon structure layer; depositing a stress matching layer on the patterned sacrificial layer, wherein the stress matching layer is a silicon nitride-based composite film with stress increased from bottom to top in a gradient manner; depositing a doped polycrystalline silicon structure layer on the stress matching layer; and sequentially carrying out patterning treatment and anchor region annealing treatment on the doped polycrystalline silicon structure layer, and carrying out removal treatment and drying treatment on the sacrificial layer to prepare the MEMS device. The MEMS device prepared by the invention has the characteristics of high stress matching, uniform doping concentration and relatively good process compatibility.

The invention relates to a preparation process of a TBC battery. The TBC battery comprises a substrate; the substrate is polished and cleaned; the doping treatment process comprises a first doping process and a second doping process, the first doping process is used for carrying out boron diffusion, and the second doping process is used for carrying out phosphorus diffusion; performing a high-temperature annealing process of high-temperature junction pushing on the substrate treated by the doping treatment process; carrying out PSG removal and front surface and side surface alkali polishing processes on the substrate treated by the high-temperature annealing process; and depositing an aluminum oxide layer, a silicon nitride layer and an electrode on the substrate. Boron expansion and phosphorus expansion are respectively carried out on the substrate, and junction pushing is not carried out; boron diffusion and phosphorus diffusion knot pushing processes are carried out in the same high-temperature environment, so that the thermal history is shortened, the energy consumption is reduced, the process flow is simplified, the production cost is reduced, and the production efficiency is improved.

The invention provides a high-nickel ternary material with gradient doping of high-valence elements, a preparation method of the high-nickel ternary material and a solid-state battery, and relates to the field of solid-state battery preparation. The high-nickel ternary material comprises high-valence elements, and the high-valence elements comprise Ta, W, Zr and Nb. Through gradient doping distribution design of Ta, W, Zr and Nb elements, collaborative optimization of high activity of the high-nickel ternary material in a core area and high stability of the high-nickel ternary material in a surface area is realized, the problems of particle breakage, ion mixing, interface impedance and the like are effectively relieved, and the requirements of the solid-state battery positive electrode material in high-performance application are met.

The invention provides a Gummel curve simulation method and system and electronic equipment, and relates to the technical field of semiconductor device emulation.The method comprises the steps that according to the actual structure of a variable-component SiGe HBT device, division is conducted in combination with a preset grid division strategy, and a discretized grid is obtained; according to the material attribute of the device, carrying out physical attribute binding on each grid point in the discretized grid to obtain a material definition result of the discretized grid; respectively carrying out conventional conductive type doping and component doping on the device to obtain spatial variation doping distribution of the device; combining a preset composite model and a preset mobility model to obtain a physical model set of the device; and a Poisson equation and a carrier continuity equation are solved in combination with numerical values, and a Gummel curve of the variable-component SiGe HBT device is obtained. According to the method, the actual current-voltage characteristics of the device can be accurately reflected, and the core requirement of high-precision simulation is met.

The invention provides a semiconductor device threshold voltage control method, system and equipment and a medium, and the control method comprises the steps: manufacturing a gate dielectric layer, and measuring and obtaining the first thickness of the gate dielectric layer; forming a gate polycrystalline silicon layer on the basis of the gate dielectric layer, oxidizing the surface of the gate polycrystalline silicon layer to obtain an ion barrier layer, and measuring and obtaining a second thickness of the polycrystalline silicon layer and a third thickness of the ion barrier layer; and determining the ion implantation amount of grid pre-doping according to the first thickness, the second thickness and the third thickness so as to perform ion implantation on the grid polycrystalline silicon layer, so that the threshold voltage of the device after grid pre-doping is kept within a preset target voltage range. According to the method, the pre-doped threshold voltage can be dynamically adjusted under the condition of not increasing any device manufacturing process steps, and the threshold voltage control precision and the product stability are guaranteed.

The invention relates to a preparation method of a low-resistance silicon carbide coating based on a molybdenum / tantalum metal electrode, which comprises the following steps: S1, substrate pretreatment: carrying out mechanical micro roughening, ultrasonic cleaning and drying on a Mo / Ta electrode, and then reducing to remove an oxidation film; s2, Si-rich nucleation: taking methyl trichlorosilane as a Si / C common source, hydrogen as carrier gas / reducing gas and nitrogen as an n-type doping source for gas supply to form a compact nucleation layer; s3, main body deposition is conducted, specifically, the temperature is adjusted to 1140-1180 DEG C, the total pressure is maintained to be 80-120 Torr, and gas supply continues to be conducted for deposition; s4, annealing and dechlorination: stopping methyl trichlorosilane, keeping hydrogen and nitrogen flushing, and then annealing; and S5, cooling and shaping: cooling and taking out the sample annealed in the step S4, and adjusting the surface roughness to a set value to obtain the low-resistance silicon carbide coating on the Mo / Ta electrode. Compared with the prior art, on the premise that conductivity is not sacrificed, atomic oxygen / oxygen ion resistance, sputtering resistance, thermal cycling stability and the like of the Mo / Ta electrode can be remarkably improved.

The invention discloses an air-stable sulfide solid electrolyte as well as a preparation method and application thereof, and relates to the technical field of solid-state lithium batteries. The chemical formula of the sulfide solid electrolyte is Li < 5.4 > P < 1-x > S < 4.4 > M < x > Cl < 1.6-y > X < y >, x is greater than 0 and less than 0.08, y is greater than 0 and less than 1, and M is selected from at least one of Fe, Zn, Ge, Zr, Sn, Ca, Mg, Ti or Ag; x is selected from at least one of F, Cl, Br and I. According to the sulfide solid electrolyte disclosed by the invention, through double-element doping of metal elements and halogen, the surface energy of a material is reduced, water molecule adsorption is inhibited, meanwhile, the ionic conductivity of the sulfide solid electrolyte can be obviously improved, and the conductivity of the sulfide solid electrolyte is not obviously attenuated in a high-humidity environment.

The invention discloses a light-emitting diode chip for improving the polarization effect of a quantum well light-emitting layer and a preparation method of the light-emitting diode chip. Comprising a sapphire patterned substrate, a buffer layer, a defect barrier layer, an N-type gallium nitride layer, a current expansion layer, a stress release layer, a quantum well light-emitting layer, a polarization buffer layer, a P-type electron barrier layer, a P-type gallium nitride layer, a transparent conductive layer, an electrode layer and a protective layer which are sequentially arranged from bottom to top. The polarization buffer layer is arranged between the quantum well light-emitting layer and the P-type electron blocking layer, buffers energy level abrupt change, and improves the polarization effect. A composite structure of an In < x > Ga < 1-x > N / GaN superlattice and a GaN / Al < y > Ga < 1-y > N superlattice is inserted between the multi-quantum well layer and the electron blocking layer, mutation of energy level is buffered by adjusting gradient doping of In and Al, the polarization effect in quantum wells caused by high potential barriers of the electron blocking layer is effectively improved, and the luminous efficiency of the diode is further improved.

The invention provides a manufacturing method of a BC back contact solar cell, and the method comprises the following steps: S3, depositing a passivation contact structure on the back surface of a silicon wafer, the passivation contact structure at least comprising a tunneling oxide layer and an intrinsic silicon layer; s4, on the intrinsic silicon layer, slurry containing a P-type doping source and slurry containing an N-type doping source are applied to the predetermined P-type contact and N-type contact areas in a printing mode respectively; s5, scanning the back surface of the silicon wafer by using laser, activating and driving the P-type doping source and the N-type doping source to diffuse downwards by using laser energy, and selectively forming a P + + heavily doped region and an N + + heavily doped region at one time; s6, performing high-temperature annealing treatment on the silicon wafer; s7, carrying out acid pickling cleaning on the silicon wafer; s8, performing texturing treatment on the front surface of the silicon wafer; s9, depositing a passivation layer and an anti-reflection layer on the front surface and the back surface of the silicon wafer; and S10, forming metal electrodes on the P + + and N + + heavily doped regions on the back surface of the silicon wafer. The technological process is simplified, the production cost is low, and the conversion efficiency is high.

Described is a semiconductor die with a semiconductor body. The semiconductor die includes: a vertical transistor device; an additional transistor device having a channel region configured for a vertical current flow; an isolation trench extending into the semiconductor body; and an isolation well made of a second doping type. The isolation well is arranged vertically below the additional transistor device and arranged laterally between the additional transistor device and the vertical transistor device. The isolation trench extends to a depth which lies vertically between an upper end of the isolation well and the second side of the semiconductor body.

An integrated circuit including: two or more substrates stacked one over another and including first and second substrates having a P-type doping, and third and fourth substrates having an N-type doping; the first substrate including a first dielectric isolation structure electrically separating the first substrate into first and second portions; the second substrate including a second dielectric isolation structure electrically separating the second substrate into first and second portions a set of electrical components on one or more of the two or more substrates, and configured to form a circuit, the circuit comprising an internal ground node; a ground reference rail electrically connected to the first substrate and the second substrate and free from being electrically connected to the third substrate and the fourth substrate; and an electrostatic discharge (ESD) protection circuit electrically coupled between the internal ground node and the ground reference rail.

The present disclosure relates to a tilted super junction structure, a manufacturing method thereof, and a semiconductor device. The method comprises: forming a plurality of doped layers, the plurality of doped layers are sequentially stacked along a first direction, each of the plurality of doped layers has a first doping type, and doping concentrations of the plurality of doped layers sequentially increase; forming a super junction trench extending into the plurality of doped layers and obtaining a first pillar region based on the plurality of doped layers, wherein a sidewall of the super junction trench is tilted relative to the first direction, and the first pillar region comprises a plurality of first doped portions sequentially stacked along the first direction; and forming a second pillar region filling the super junction trench, the second pillar region has a second doping type. The method can realize a tilted super junction structure with guaranteed performance.

The invention relates to the technical field of thermo-optical phase shifters, in particular to a thermo-optical effect-based thermo-optical phase shifter, which comprises a base and a thermo-optical phase shifter, and is characterized in that the base comprises a substrate, a lower cladding and an upper cladding which are sequentially arranged from bottom to top; the thermo-optical phase shifter comprises an input waveguide, a central waveguide and an output waveguide which are arranged on the upper surface of the lower cladding at intervals and are connected in sequence; the first slab waveguide is arranged on the upper surface of the lower cladding and located between the input waveguide and the central waveguide, the middle area of the first slab waveguide is subjected to N-type doping or P-type doping to form a first heavily-doped area, and a first electrode and a first plated-through hole are arranged on the upper cladding and located above the first heavily-doped area; the second slab waveguide is arranged on the upper surface of the lower cladding and located between the central waveguide and the output waveguide, the middle area of the second slab waveguide is subjected to N-type doping or P-type doping to form a second heavily doped area, and a second electrode and a second plated-through hole are arranged on the upper cladding and located above the second heavily doped area. The phase shift efficiency can be effectively improved.

The invention discloses a bulk phase doping and interface coating synergistically modified high-nickel ternary material, which is characterized in that primary particles are closely stacked and agglomerated to form polycrystalline secondary spherical particles, a rare earth compound coating layer is generated in situ on the surface of a bulk phase, and rare earth elements are uniformly doped in the bulk phase of the high-nickel ternary material in an ion form; according to the high-nickel ternary material, synergistic modification is carried out through rare earth bulk phase doping and surface coating, rare earth elements are uniformly doped in a bulk phase in an ion form to stabilize a lattice structure, a coating layer is formed on the surface of the bulk phase to protect an interface, the binding force of the coating layer and the bulk phase is strong, and the formed high-nickel ternary material realizes bulk phase and interface integrated enhancement, and has a good application prospect. The material has excellent long cycle stability, thermal safety and rate capability, and is suitable for high-energy-density lithium ion power batteries.

This invention discloses a rare-earth metal gradient-doped polyanionic cathode material, its preparation method, and its application. The molecular formula of the rare-earth metal gradient-doped polyanionic cathode material is Na. 2+2x‑y RE y Fe 2‑x (SO4)3, in the rare earth metal gradient-doped polyanionic cathode material, rare earth metal elements enter the crystal lattice of the polyanionic cathode material in the form of rare earth metal ions, and the doping content of the rare earth metal ions decreases in a gradient along the direction from the crystal lattice surface to the bulk phase. The polyanionic cathode material is an Alluaudite-type sodium iron sulfate cathode material. This invention effectively solves the kinetic mismatch problem of "fast ions but slow electrons" in rate performance by simultaneously optimizing the electronic structure and sodium ion channels through rare earth doping, significantly improving the structural stability of the material under long-cycle and fast-charge-discharge conditions. Simultaneously, the assembled sodium-ion battery exhibits excellent wide-temperature performance.

This invention discloses an electrode-free constrained annealed hafnium oxide-based ferroelectric thin film, its preparation method, and its application. The method employs ALD technology to alternately deposit a predetermined number of hafnium oxide layers on a substrate. 0.5 Zr 0.5 O2 thin film and a layer of Al2O3 thin film were used to obtain Al with different doping concentrations. x -(Hf) 0.5 Zr 0.5 O2) y Ferroelectric thin films, where x represents the number of Al2O3 layers deposited using ALD, and y represents the number of Hf layers deposited using ALD. 0.5 Zr 0.5 The number of O2 layers; for the obtained Al x -(Hf) 0.5 Zr 0.5 O2) y Ferroelectric thin films are subjected to high-temperature annealing to obtain Al. x -(Hf) 0.5 Zr 0.5 O2) y Ferroelectric thin film samples; for the obtained Al x -(Hf) 0.5 Zr 0.5 O2) y A hafnium oxide-based ferroelectric thin film was obtained by depositing a top electrode and a bottom electrode onto a ferroelectric thin film sample. This invention improves the performance of annealed ferroelectric thin films without electrode constraint, deepens the understanding of the ferroelectric principle of HfO2 thin films, and promotes the development of the field of novel practical ferroelectric thin films.

The application relates to a growth method of a single crystal fiber with a continuous gradient distribution of doping ions, comprising the following steps: cutting at least two homogeneous crystals or ceramics with different doping ion concentrations and a homogeneous crystal or ceramic without doping ions into square rods; selecting the square rod without doping ions as a first seed crystal, selecting the square rod doped with a first ion concentration as a first source rod, and performing a first forward growth of the single crystal fiber by using a laser heating base method; after the single crystal fiber doped with the first ion concentration is grown to a required length, adding a square rod doped with a second ion concentration as a source rod to continue the first forward growth of the single crystal fiber by fusion, and repeating the operation N times until the single crystal fiber doped with each ion concentration is grown to the required length; and sequentially performing a first reverse growth, a second forward growth and a second reverse growth on the obtained fused single crystal fibers with different doping ion concentrations to obtain the single crystal fiber with the continuous gradient distribution of the doping ions.

The application discloses a semiconductor laser and a display device thereof, which comprises a first semiconductor layer, a second semiconductor layer and an active layer between the first semiconductor layer and the second semiconductor layer; a first waveguide layer is arranged between the first semiconductor layer and the active layer, and a second waveguide layer is arranged between the second semiconductor layer and the active layer; an electron blocking layer is arranged between the second waveguide layer and the second semiconductor layer, the electron blocking layer comprises at least a P-type doped layer on the side close to the second semiconductor layer, the component of the P-type doped layer is greater than 1E19 cm ‑3 The P-type doping concentration of the electron blocking layer on the side close to the second semiconductor layer is higher than the P-type doping concentration of the electron blocking layer away from the second semiconductor layer, so that the P-type doping is prevented from diffusing to the second waveguide layer and causing the light absorption of the second waveguide layer to increase.

A vertical III-V Hall sensor, which has a substrate layer with an upper side and an underside, and a first insulating layer formed on the substrate layer, and a III-V semiconductor layer formed on the insulating layer, and a second insulating layer formed on the III-V semiconductor layer, the second insulating layer being structured and having at least three openings designed as contact regions, and the III-V semiconductor layer having a length formed in the X direction and a width formed in the Y direction, and the at least three contact regions being arranged along a straight line, and the III-V semiconductor layer having an n doping, and the III-V semiconductor layer having a peripheral insulation.