4513results about How to "Inhibited Diffusion" patented technology

A thin-film formation apparatus possesses a reaction chamber to be evacuated, a placing portion on which a substrate is placed inside the reaction chamber, a gas-dispersion guide installed over the placing portion for supplying a gas onto a substrate surface, a gas-supply port for introducing the gas into the gas-dispersion guide, a gas-dispersion plate disposed on the side of the substrate of the gas-dispersion guide and having multiple gas-discharge pores, a first exhaust port for exhausting, downstream of the gas-dispersion plate, the gas supplied onto the substrate surface from the gas-dispersion plate, and a second exhaust port for exhausting, upstream of the gas-dispersion plate, a gas inside the gas-dispersion guide via a space between the gas-dispersion guide and the gas-dispersion plate.

A method for repairing process-related damage of a dielectric film includes: (i) adsorbing a first gas containing silicon on a surface of the damaged dielectric film without depositing a film in the absence of reactive species, (ii) adsorbing a second gas containing silicon on a surface of the dielectric film, followed by applying reactive species to the surface of the dielectric film, to form a monolayer film thereon, and (iii) repeating step (ii). The duration of exposing the surface to the first gas in step (i) is longer than the duration of exposing the surface to the second gas in step (ii).

A method of manufacturing a semiconductor device includes: the first step of forming a gate electrode over a silicon substrate, with a gate insulating film; and the second step of digging down a surface layer of the silicon substrate by etching conducted with the gate electrode as a mask. The method of manufacturing the semiconductor device further includes the third step of epitaxially growing, on the surface of the dug-down portion of the silicon substrate, a mixed crystal layer including silicon and atoms different in lattice constant from silicon so that the mixed crystal layer contains an impurity with such a concentration gradient that the impurity concentration increases along the direction from the silicon substrate side toward the surface of the mixed crystal layer.

A method for depositing a phosphorus doped silicon arsenide film is disclosed. The method may include, providing a substrate within a reaction chamber, heating the substrate to a deposition temperature, exposing the substrate to a silicon precursor, an arsenic precursor, and a phosphorus dopant precursor, and depositing the phosphorus doped silicon arsenide film over a surface of the substrate. Semiconductor device structures including a phosphorus doped silicon arsenide film deposited by the methods of the disclosure are also provided.

A method of forming an SOI semiconductor substrate and the SOI semiconductor substrate formed thereby, is provided. The method includes forming sequentially buried oxide, diffusion barrier and SOI layers on a semiconductor substrate. The diffusion barrier layer is formed by an insulating layer having a lower impurity diffusion coefficient as compared with the buried oxide layer. The diffusion barrier layer serves to prevent impurities implanted into the SOI layer from being diffused into the buried oxide layer or the semiconductor substrate.

By using a conductive layer including Cu as a long lead wiring, increase in wiring resistance is suppressed. Further, the conductive layer including Cu is provided in such a manner that it does not overlap with the oxide semiconductor layer in which a channel region of a TFT is formed, and is surrounded by insulating layers including silicon nitride, whereby diffusion of Cu can be prevented; thus, a highly reliable semiconductor device can be manufactured. Specifically, a display device which is one embodiment of a semiconductor device can have high display quality and operate stably even when the size or definition thereof is increased.

A use of an amine-containing silane for forming a transition metal nitride is provided. In this use, the amine of the amine-containing silane is the source of at least some, preferably most and most preferably all of the nitrogen present in the transition metal nitride.

The present invention provides a liquid crystal display device with a narrow picture frame which reduces a sealing defect by suppressing spreading of an orientation film. In a region inside a sealing material and outside a display region, an uneven surface for suppressing spreading of the orientation film is formed. It is preferable that the uneven surface is formed using an insulation film and, at the same time, an etching stopper layer is formed below the insulation film which forms the uneven surface. It is more preferable that the uneven surface and the stopper layer are simultaneously formed with a layer used for forming pixels in a step for forming such a layer thus preventing the increase of manufacturing steps.

The invention discloses an acid tank sealing treatment system. The acid tank sealing treatment system comprises connecting pipes, an acid mist removing device and a plurality of acid tanks, wherein the acid tanks are connected into the acid mist removing device through the connecting pipes for acid mist treatment. The acid tank sealing treatment system has the beneficial effects that acid mist ofthe acid tanks on an operation site can be treated in a centralized mode, single treatment in the prior art is improved, and the treatment efficiency is improved. The acid tanks are connected into theacid mist removing device through the connecting pipes for acid mist treatment, acid tank sealing on the operation site is achieved, and acid mist diffusion on the operation site is avoided.

A pressure wave generator is provided, which has excellent output stability over time. This pressure wave generator comprises a substrate, a heat generating layer, and a heat insulating layer formed between the substrate and the heat generating layer. A pressure wave is generated in a surrounding medium (air) by a change in temperature of the heat generating layer, which is caused upon energization of the heat generating layer. The heat insulating layer comprises a porous layer and a barrier layer formed between the porous layer and the heat generating layer to prevent diffusion of reactive substances such as oxygen and moisture in the air and impurities into the porous layer. By the formation of the barrier layer, it is possible to prevent a reduction in output of the pressure wave generator caused by a change over time of the porous layer.

This invention provides a new film forming method in which, on the occasion that pressure is decreased by pressure decreasing means which was connected to a film forming chamber, and a film is formed by evaporating an organic compound material from a deposition source in the film forming chamber, minute amounts of gas (silane series gas) which comprises smaller particles than particles of the organic compound material, i.e., a material with a smaller atomic radius are flowed, and the material with a small atomic radius is made to be included in an organic compound film.

A semiconductor device may include at least one metal oxide field-effect transistor (MOSFET). The at least one MOSFET may include a body, a channel layer adjacent the body, and a dopant blocking superlattice between the body and the channel layer. The dopant blocking superlattice may include a plurality of stacked groups of layers. Each group of layers of the dopant blocking superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.

An object of the present invention is to provide an EL display device having high operation performance and reliability.

A third passivation film 45 is disposed under the EL element 203 comprising a pixel electrode (anode) 46, an EL layer 47 and a cathode 48, and diffusion of alkali metals from the EL element 203 formed by ink jet method into TFTs is prevented. Further, the third passivation film 45 prevents penetration of moisture and oxygen from the TFTs, and suppress degradation of the EL element 203 by dispersing the heat generated by the EL element 203.