929 results about "Superlattice" patented technology

The invention relates to the field of semiconductor optoelectronic device manufacturing, in particular to an LED epitaxial wafer growing method capable of reducing warping. Comprising the following steps of: growing a nucleating layer on a substrate at low temperature by adopting an MOCVD (Metal Organic Chemical Vapor Deposition) process, and annealing to form a three-dimensional island-shaped structure to release stress; growing an AlGaN / GaN superlattice or gradient layer as a gradient buffer layer, and adjusting lattice constants layer by layer; a heavily doped or co-doped layer is inserted before growth of n-GaN, and thermal stress is pre-compensated by using local pressure stress; and finally, continuously growing a device layer and carrying out in-situ heat treatment to obtain the LED epitaxial wafer. The method effectively counteracts the macroscopic tensile stress caused by the difference of thermal expansion coefficients in the cooling process, and greatly improves the integrity of the epitaxial wafer.

The invention provides an anti-ferroelectric lanthanum ferrite, bismuth ferrite and strontium titanate superlattice film with high energy storage density as well as a preparation method and application thereof. The anti-ferroelectric lanthanum ferrite, bismuth ferrite and strontium titanate superlattice film with high energy storage density comprises a substrate layer, a bottom electrode layer and a plurality of stacked relaxation ferroelectric layers, wherein the bottom electrode layer and the multiple stacked relaxation ferroelectric layers are sequentially arranged on the substrate layer; each relaxor ferroelectric layer sequentially comprises a first functional layer, a second functional layer and a third functional layer from bottom to top; the first functional layer comprises LaFeO3, the second functional layer comprises BiFeO3, and the third functional layer comprises SrTiO3. The anti-ferroelectric lanthanum ferrite, bismuth ferrite and strontium titanate superlattice thin film with the high energy storage density has small electric leakage performance and high polarization value, and more excellent energy storage performance is achieved.

The invention belongs to the technical field of solid hydrogen storage, and provides a solid alloy hydrogen storage device with high heat transfer performance and application thereof, and is characterized in that the device comprises a hydrogen storage container, a hydrogen storage alloy and a heat exchange structure assembly; a fin structure and a layering partition plate are arranged in the hydrogen storage container, by optimizing the layering partition plate and the fin structure, displacement and agglomeration of hydrogen storage alloy in a moving or vibrating environment are effectively prevented, the mass transfer and heat transfer performance in the hydrogen storage tank is remarkably improved, hydrogen and heat can be rapidly transferred to the hydrogen storage alloy, and the hydrogen storage effect is improved. Therefore, the hydrogen absorption and desorption efficiency is improved. The method is suitable for AB2 type alloys, AB5 type alloys, BCC type alloys, superlattice hydrogen storage alloys and the like, the hydrogen absorption and desorption process can be efficiently completed at a certain temperature and pressure, and the high efficiency and stability of the hydrogen absorption and desorption process are ensured. And the catalyst can be widely applied to various scenes such as traffic, hydrogen refueling stations, industrial processes and hydrogen energy storage.

The invention provides an optimized II-type superlattice infrared detector chip bottom filling method, a preparation method and an infrared detector, and belongs to the field of infrared detectors. The problem that the performance of an infrared detector is affected due to the fact that the filling glue filled in an existing bottom filling process is prone to generating holes and finally causes defects during imaging of an infrared focal plane detector chip is solved. The method comprises the following steps that a dielectric layer is deposited on the surface of an epitaxial material after table top etching is completed, and the height of the dielectric layer is larger than the table top etching depth; after the dielectric layer is deposited, the surface of the dielectric layer is polished to be flat; opening holes in the dielectric layer on the surface of the table board; preparing an indium column in the opening of the dielectric layer, and then performing flip-chip bonding interconnection on the indium column at the epitaxial material end and the indium column on the readout circuit; filling bottom filling glue between the dielectric layer and the reading circuit after the reverse welding interconnection, and then curing the filling glue at high temperature; the invention is applied to the type-II superlattice infrared detector.

The invention discloses a P2-phase sodium ion positive electrode material with a superlattice ordered structure and a preparation method of the P2-phase sodium ion positive electrode material. The chemical formula of the P2-phase sodium ion positive electrode material is Na < x > M < 1-a-b > A B O < 2 >, wherein M is a transition metal element Mn or / and Ni; a doping sites are transition metal vacancies, and / or doped metal elements Mg and / or doped metal elements Li; the doping site of B is doped with a transition metal element Fe or doped with a transition metal element Cu or doped with a transition metal element Zn; 0.8 < = x < = 0.9, 0.25 < = a, 0.04 < = b < = 0.09. According to the P2 type material with the superlattice ordered structure, the layered structure stability and the sodium ion transmission efficiency of the material can be remarkably improved, so that the problems of poor structure stability and low ion diffusion rate of a traditional sodium ion positive electrode material are effectively solved; the P2 type material with the superlattice ordered structure can be suitable for preparing a sodium ion battery system with high energy density.

The invention relates to a method for improving epitaxial growth quality of a tunnel junction cascade semiconductor laser. The invention innovatively provides a strain superlattice gradient repair technology. By designing a low-temperature low-speed nucleation-high-temperature high-speed epitaxy composite growth mode, a periodic superlattice buffer layer is introduced to a tunnel junction interface. Wherein lattice strain relaxation is achieved at the rate of 0.5-2 / s in the low-temperature stage, defect coverage is completed at the rate of 4-8 / s in the high-temperature stage, and dislocation line bending is terminated on a superlattice interface through thermodynamic regulation and control. Compared with the traditional process, the scheme can obviously improve the crystal quality, and does not increase the specific contact resistance of the tunnel junction interface.

The invention relates to the technical field of chip preparation, and provides a chip based on an annular photonic crystal and a preparation method thereof. The preparation method comprises the following steps: growing a nucleating layer on a substrate; growing a superlattice structure on one side, away from the substrate, of the nucleating layer; sequentially growing an n-type coating layer, an n-type waveguide layer, a quantum well and a p-type electron blocking layer on one side, deviating from the nucleating layer, of the superlattice structure; etching a plurality of annular cavities on the p-type electron barrier layer to form an annular photonic crystal; growing a p-type extension contact layer on one side, deviating from the quantum well, of the p-type electron blocking layer; and carrying out in-situ annealing treatment. According to the preparation method, the directivity of the photonic band gap can be effectively adjusted, uniform light waves in all directions on the side face can be formed, so that leakage of laser from a non-light-emitting area on the side face is restrained, the light emitting efficiency is improved, the annular photonic crystals are periodically distributed, and the light beam quality is effectively guaranteed.

The invention provides a short-wave infrared detector digital alloy material and a preparation process thereof. The preparation process comprises the following steps: growing a GaSb buffer layer on the surface of an n-type GaSb substrate; starting a first In furnace, and growing an InAs layer on the surface of the GaSb buffer layer in cooperation with an As beam; starting a second In furnace, and growing a quaternary solid solution layer matched with a GaSb buffer layer lattice on the surface of the InAs layer in cooperation with the Ga furnace and the AsSb beam; and alternately growing an InAs layer and a quaternary solid solution layer on the surface of the quaternary solid solution layer to generate a superlattice structure until the total thickness of the superlattice structure reaches a set target thickness, thereby obtaining the digital alloy material. According to the digital alloy material for the short-wave infrared detector and the preparation technology of the digital alloy material, the short-wave infrared detector can be expanded to the wave band ranging from 2.4 micrometers to 2.8 micrometers at the 50% cut-off wavelength.

The invention relates to the technical field of battery materials, in particular to a sodium-ion battery positive electrode material with a high-entropy superlattice structure and a preparation method of the sodium-ion battery positive electrode material, and the general formula of the sodium-ion battery positive electrode material is Na < 0.67 > MnaNibFecLidCueTifO2, a < lt >; 0.6, 0.1 lt; blt; 0.3, 0.01 lt, 0.01 lt, 0.01 lt; clt; ct; 0, 0.2, 0.03 lt; dlt; 0, 0.2, 0.03 lt; lt, lt; 0.2, 0.01 lt, 0.01 lt, 0.01 lt; flt; 0.2, a + b + c + d + e + f = 1; according to the invention, a plurality of ions with similar sizes are introduced into the sodium ion layered oxide transition metal layer, so that a short-range disordered honeycomb-shaped high-entropy superlattice structure is formed; by means of the hysteresis diffusion effect of the high-entropy material, the oxidation-reduction reaction of oxygen anions activated by lithium is effectively regulated and controlled, and the phenomena of voltage decline and structure degradation caused by the migration process of manganese ions in the transition metal layer are inhibited.

The invention provides an epitaxial wafer of a high-luminous-efficiency infrared light-emitting diode and a manufacturing method of the epitaxial wafer. The epitaxial wafer comprises a GaAs substrate, an N-type semiconductor structure, a quantum well active region and a P-type semiconductor structure, wherein the N-type semiconductor structure, the quantum well active region and the P-type semiconductor structure are formed on the substrate. The N-type semiconductor structure comprises an N-type AlGaAs stacking layer, diethyl tellurium (DETe) and disilane (Si2H6) are adopted for co-doping, the N-type semiconductor structure is designed to be of a superlattice structure, and the doping concentration in the vertical direction is periodically alternated from high to low; and a doping concentration gradient is arranged at a position close to the quantum well region, so that the tellurium doping concentration is gradually increased. Through the design, the content of carbon impurities in the material and the non-radiative recombination probability are reduced, a better current expansion effect and quantum well stress release are achieved, and the luminous efficiency and performance of an infrared LED are greatly improved.

The invention provides an enhanced HEMT (High Electron Mobility Transistor) device based on a P-type GaN grid electrode and a manufacturing method, a superlattice pair insertion layer is formed in a P-type GaN layer, the superlattice pair insertion layer comprises a first sub-layer and a second sub-layer which are alternately stacked, one of the first sub-layer and the second sub-layer adopts a GaN layer, and the forbidden bandwidth of the other layer is greater than 3.4 eV; by arranging the superlattice pair insertion layer, an electron barrier can be formed in the P-type GaN layer, and electrons can be prevented from moving in the gate structure, so that gate electric leakage is reduced, meanwhile, the electrons are prevented from crossing the gate structure to bombard the metal gate, and the gate reliability is improved; meanwhile, due to the fact that the ultra-thin superlattice material and the material with the forbidden bandwidth larger than 3.4 eV are AlN, BN, AlGaN, InAlN or BGaN, the dielectric constant of the material is very close to that of a GaN-based material, and therefore the gate capacitance and the threshold voltage of the device cannot be increased.

The invention discloses an epitaxial layer of a lattice transition type gallium nitride HEMT device and a manufacturing method of the epitaxial layer. The epitaxial layer comprises a substrate, and an AlN nucleating layer, an AlGaN buffer layer, a superlattice buffer layer, an AlGaN transition layer, a high-carbon GaN layer, a low-carbon GaN channel layer, an AlGaN barrier layer and a cap layer which are sequentially stacked on the surface of the substrate in the longitudinal direction. According to the invention, after the AlGaN transition layer is inserted between the superlattice buffer layer and the high-carbon GaN layer, the superlattice buffer layer with high aluminum content is firstly transited to the AlGaN transition layer with medium aluminum content and then transited to the high-carbon GaN layer without aluminum, so that lattice mismatch between layers is reduced, and deformation and warping of a wafer are reduced.

The invention relates to the technical field of semiconductor light-emitting devices, and particularly discloses an epitaxial structure for improving the internal quantum efficiency of a green Micro LED. The epitaxial structure comprises a substrate, and a buffer layer, an undoped GaN layer, an n-type GaN layer, a stress release layer, an active layer, a low-temperature Mg heavily-doped GaN layer, an electron barrier layer, a p-type GaN layer and a p-type GaN contact layer which are sequentially arranged on the substrate. The active layer comprises a plurality of periods of InGaN quantum well layers and an InAlGaN / GaN superlattice quantum barrier layer alternating structure, and a CAP layer formed by an AlGaN / GaN superlattice is arranged behind each quantum well layer. By adopting a wide-well narrow-barrier structure, a superlattice CAP layer for neutralizing a polarization electric field and a quaternary InAlGaN barrier structure for lattice matching and hole injection enhancement, multiple regulation and control of a polarization field, dislocation density and hole transport are realized, the internal quantum efficiency of a green-light Micro LED is remarkably improved, and the green-light Micro LED epitaxial structure is suitable for epitaxial preparation of a high-performance Micro LED chip.

The invention provides a surface-emitting gallium nitride VCSEL laser chip and an epitaxial defect suppression preparation method thereof, and relates to the technical field of laser chips, the surface-emitting gallium nitride VCSEL laser chip comprises a substrate, a low-temperature nucleating layer, a high-temperature recovery layer, a stress regulation type nano mask composite defect blocking layer, an n-type nitride DBR reflector, an active region, a polarization enhanced tunnel junction and the like, the defect blocking layer adopts an in-situ silicon nitride nano-porous mask layer to be matched with an aluminum gallium nitride / gallium nitride stress compensation superlattice layer, through pulse type lateral epitaxial overgrowth annihilation penetrating dislocation, and the n-type nitride DBR reflector adopts an AlInN / GaN lattice matching material system to be combined with a hydrogen etching interruption modification technology, so that thick film growth with zero cracks and high reflectivity is realized; a polarization enhanced tunneling junction is used at the top to replace ITO, and the hole tunneling probability is enhanced by piezoelectric polarization in InGaN, so that efficient current injection with low working voltage and no absorption loss is realized, the dislocation density and the device voltage are remarkably reduced, and the yield of an epitaxial wafer and the photoelectric conversion efficiency are improved.

The invention belongs to the field of reconfigurable on-chip spectrometers, and particularly discloses a reconfigurable on-chip spectrometer based on a low-loss GST superlattice phase change material. According to the invention, the GST-SL2 material is combined with the double-cascade micro-ring array architecture, so that the performance of the device is improved in a breakthrough manner, a large amount of spectral response can be generated only through a limited number of micro-ring resonators on a chip, the flexible regulation and control of the spectral resolution and the working bandwidth are supported, and the customization requirements of different application scenes are met; a resolution regulation and control array is formed by cascading # imgabs0 first MRRs which are arranged at equal intervals in the extension direction of a bus waveguide, the lengths of resonance micro-rings of the first MRRs are increased progressively, and due to the cascading design, through the synergistic effect of the multiple MRRs, the overall regulation and control capacity is remarkably enhanced, and it is ensured that sampling points can uniformly cover the whole working bandwidth of an on-chip spectrometer; the measurement bandwidth regulation and control array divides the working bandwidth into a plurality of channels, the irrelevance of a system response function is successfully enhanced, and a reliable basis is provided for spectrum reconstruction.

The present invention relates to the field of optoelectronics, and discloses a light-emitting diode epitaxial wafer, a method for manufacturing the same, and an LED. The light-emitting diode epitaxial wafer comprises a substrate, on which a buffer layer, an undoped GaN layer, an N-type GaN layer, an active layer, an electron blocking layer, and a P-type GaN layer are sequentially provided; the electron blocking layer comprises a BAlN / P-GaN superlattice layer, an AlGaN / P-InGaN superlattice layer, and a BN layer stacked in sequence. The light-emitting diode epitaxial wafer provided by the present invention reduces electron overflow, improves hole injection efficiency, replenishes hole concentration, and enhances the luminous efficiency of the light-emitting diode.

The invention provides a non-polar gallium nitride-based enhanced HEMT (High Electron Mobility Transistor) with low source-drain contact resistance, and relates to the technical field of semiconductors. Comprising an m-plane substrate, an unintentionally doped GaN buffer layer, a Fe doped GaN layer, a GaN channel layer, an AlN insertion layer and an AlGaN barrier layer which are sequentially arranged from bottom to top, the plurality of grooves are arranged in the edge areas of the two sides of the AlGaN barrier layer at intervals, penetrate through the AlGaN barrier layer and are in contact with the upper surface of the AlN insertion layer, and target GaN is arranged in each groove so as to form longitudinal AlGaN / GaN superlattice structures on the two sides; the GaN cap layer is formed on the middle region of the AlGaN barrier layer; the grid electrode is formed on the GaN cap layer; the source electrode is formed on the AlGaN / GaN superlattice structure on one side; and the drain electrode is formed on the AlGaN / GaN superlattice structure on the other side. In this way, the contact resistance is reduced without being affected by the polarization effect.

The invention, which relates to the technical field of the semiconductor laser chip, discloses a wide-temperature working high-power DFB semiconductor laser chip comprising a P-InGaAsP lower waveguide layer, an InGaAsP strain multiple quantum channel, an N-InGaAsP upper waveguide layer, an InAlAs-InP superlattice barrier layer, an N-InP spacing layer 1, an N-InGaAsP corrosion stop layer, an N-InP spacing layer 2, an N-InGaAsP grating layer, and an N-InP grating cover layer. According to the wide-temperature working high-power DFB semiconductor laser chip, a laser material structure is epitaxially grown on a P-InP substrate; a P-InP substrate is adopted, so that large-area back ohmic contact effectively reduces P-type series resistance of a device, and the problem of high heating of a traditional high-power laser is effectively solved; then, an InGaAsP strain compensation quantum well is adopted as a gain region, and wide-temperature single-mode work is realized by utilizing the advantage that an InGaAsP gain spectrum is insensitive to temperature; and the InAlAs-InP two-dimensional superlattice barrier structure is adopted to realize transverse and lateral limitation of carriers, so that the limiting efficiency of the carriers in a gain region is effectively improved, and the problem of low energy band difference of an InGaAsP conduction band is effectively solved.

The invention discloses an acoustic wave filter based on an AlN / AlGaN superlattice structure and a preparation method of the acoustic wave filter, and relates to the technical field of filters, the acoustic wave filter comprises a superlattice main body, and is characterized in that the superlattice main body comprises a substrate and a piezoelectric superlattice layer located on one side of the substrate; wherein the substrate is a Si substrate, a sapphire substrate or a SiC substrate; the piezoelectric superlattice layer is a composite alternating layer of an AIN layer and an Al < x > Ga < 1-x > N layer, and x is a constant greater than 0. The invention has the effects of reducing strain, improving compatibility and reliability, being suitable for high-frequency operation and remarkably improving electromechanical coupling performance.

The invention provides an ultrahigh strain material component and thickness control method for a quantum cascade laser, and relates to the technical field of semiconductor lasers. The control method is based on a strain compensation calibration method, a first superlattice layer and a second superlattice layer which are the same in thickness are constructed, a strain balance superlattice is formed, it is guaranteed that the whole epitaxial layer is free of strain relative to a substrate, the problem that the growth thickness of a large-strain material is small is solved, the peak position accuracy and the peak intensity during XRD testing are further improved, and the test accuracy is improved. And the half-peak width is narrow, so that the accuracy of the components of the backstepping material is improved.

The invention relates to the technical field of semiconductor materials, in particular to a low-working-current-density cyan LED epitaxial structure and a preparation method thereof.The low-working-current-density cyan LED epitaxial structure comprises a substrate, and a buffer layer, an N-type semiconductor layer, a low-temperature stress release layer, a multi-quantum-well light-emitting layer and a P-type semiconductor layer which are sequentially stacked on the substrate; the multi-quantum well light-emitting layer comprises a first light blue light multi-quantum well sub-layer, a second blue light multi-quantum well sub-layer, a third blue light multi-quantum well sub-layer and a fourth light blue light multi-quantum well sub-layer which are sequentially stacked and grown from bottom to top; wherein each sub-layer is of a superlattice structure of an InGaN multi-quantum well layer and a multi-quantum barrier layer, and the barrier heights of the sub-layers decrease progressively in a gradient mode, namely, the high barrier, the middle barrier, the low barrier and the low barrier decrease progressively in sequence. The upper-layer low-potential barrier attracts holes to migrate downwards, and the lower-layer high-potential barrier blocks electrons from leaking, so that space matching of the electrons and the holes is realized, and the performances such as luminous efficiency and yield of the cyan LED chip under low working current density are improved.

A method of making colloidal kagome superlattices can include functionalizing a plurality of metal nanoparticles with a plurality of oligonucleotides to produce programmable atom equivalents; and cooling the programmable atom equivalents to induce crystallization of the programmable atom equivalents. The cooling process can include cooling the PAEs from a first temperature to a second temperature at a first cooling rate, cooling the PAEs from the second temperature to a third temperature at a second cooling rate, and cooling the PAEs from the third temperature to a fourth temperature at a third cooling rate. The kagome superlattices can have a rhombohedral unit cell formed by alternating chiral layers of PAEs organized in 2-dimensional distorted kagome layers. The colloidal superlattices can have anisotropic light emission, Purcell factors of at least 25 and birefringent properties.

The invention is suitable for the technical field of semiconductors, and provides a blue-green double-peak LED epitaxial growth method, which comprises the following steps: processing a substrate, growing a low-temperature GaN buffer layer, growing a non-doped GaN layer, growing a Si-doped N-type GaN layer, growing a multi-quantum well layer, growing an AlGaN electron barrier layer, growing a Mg-doped P-type GaN layer, and cooling. Wherein the growth of the multi-quantum well layer sequentially comprises the steps of growing a first MQWs, growing a tunnel junction layer, growing a second MQWs and growing an AlGaN / GaN superlattice layer, the tunnel junction layer is introduced into the multi-quantum well layer to enhance tunneling of holes, meanwhile, the AlGaN / GaN superlattice layer is introduced, gradual change of an Al component in AlGaN is controlled by controlling the introduction time of TMAl, the problem of light emitting peak broadening is solved, and the light emitting efficiency is improved. The quantum well is ensured to emit blue light and green light at the same time, the color saturation of the light is improved, and the color temperature is reduced.

The invention provides a manufacturing method of a type-II superlattice medium-wave infrared focal plane array chip and an infrared detector, and belongs to the field of infrared focal plane array chips. The problem that in the prior art, the surface leakage current of an infrared focal plane array chip is large due to the fact that the mesa etching depth is large is solved. The method comprises the following steps: growing and cleaning an epitaxial material; hard mask deposition, mesa photoetching and etching: obtaining a required mesa pattern on the hard mask through a photoetching technology, then etching an epitaxial material, etching the epitaxial material to form the mesa pattern, the mesa pattern comprising an upper electrode region and a lower electrode region, etching the upper electrode region to the boundary of the barrier layer and the absorption region, and etching the lower electrode region to the boundary of the barrier layer and the absorption region; etching a lower electrode region to the lower ohmic contact layer; manufacturing a metal electrode; a connecting piece is manufactured on the metal electrode to be connected with a reading circuit, and manufacturing of the infrared focal plane array chip is completed; the invention is applied to the II-type superlattice medium-wave infrared detector.

The invention provides an anti-radiation high-performance enhanced gallium nitride-based power device and a manufacturing method thereof, and belongs to the technical field of semiconductors. On the basis of a traditional enhanced P-GaN HEMT device structure, a P-type InaGa1-aN back barrier layer, an InbGa1-bN / GaN superlattice layer, a composite gate structure composed of a dielectric layer and a gate Schottky metal layer and a gradient-changing island-shaped P-GaN layer are innovatively introduced, and a pair of composite problems of dynamic resistance instability and radiation sensitivity are cooperatively solved. The device not only maintains the normally-off characteristic and the high threshold voltage of an enhanced device, but also remarkably improves the anti-irradiation capability, the breakdown voltage and the dynamic resistance stability, and is particularly suitable for power electronics in strong irradiation environments such as aerospace and nuclear energy detection.

The present invention discloses a dual-color infrared detector, which comprises a mid-wavelength infrared detector and a long-wavelength infrared detector arranged in a stacked manner. The mid-wave channel absorption layer of the mid-wavelength infrared detector is a P-type InAs / InAsSb superlattice or a P-type InAsP / InAsSb superlattice, the long-wave channel absorption layer of the long-wavelength infrared detector is a P-type InAs / GaSb superlattice, and the mid-wave channel barrier layer of the mid-wavelength infrared detector and the long-wave channel barrier layer of the long-wavelength infrared detector are both N-type InPSb / InAs superlattices. The present invention also discloses a manufacturing method of the dual-color infrared detector. The mid-wave channel absorption layer of the dual-color infrared detector of the present invention adopts an InAs / InAsSb or InAsP / InAsSb superlattice, and the long-wave channel absorption layer adopts an InAs / GaSb superlattice, thus ensuring the best performance of the devices in each waveband.

The invention discloses an atomic layer deposition method and structure for an aluminum fluoride enhanced aluminum oxide passivation layer of a TOPCon solar cell. The method comprises the steps that after a boron-doped layer is formed on the front face of a crystal silicon wafer, a passivation layer is formed on the boron-doped layer through an atomic layer deposition technology, specifically, Al2O3 deposition circulation is conducted with trimethyl aluminum as an aluminum source and H2O as an oxygen source, AlF3 deposition circulation with aluminum chloride as the aluminum source and HF or NH4F as a fluorine source is periodically inserted, the proportion of the number of deposition circulation times of AlF3 to the number of deposition circulation times of Al2O3 is 1: (1-10), and the passivation layer is formed on the boron-doped layer through the atomic layer deposition technology. And an alternating layer structure with the total thickness of 5-10 nm is formed. According to the invention, an AlF3 layer is periodically inserted in an Al2O3 deposition cycle, so that an Al2O3 / AlF3 superlattice structure is formed. According to the structure, the interface passivation effect is remarkably improved, hydrogen atom overflow is reduced, and the ultraviolet aging resistance is enhanced. The method is compatible with an existing ALD production line, is suitable for high-efficiency TOPCon battery manufacturing, and has a good industrial application prospect.

The present invention proposes an optical communication O-band silicon-based high-speed semiconductor laser chip and a manufacturing method thereof. Different buffer layers are used to form a growth surface with a low dislocation density of InP material; N-InAlGaAs is used to replace the conventional N-InAlAs electron blocking layer in the energy band structure to reduce the barrier for electrons to enter the quantum well from the N type and reduce the threshold; a superlattice structure quantum barrier is used to replace the single-layer barrier layer structure to improve the transport of heavy holes in the quantum well; and adjustments are made to the material structure to achieve an O-band high direct modulation rate semiconductor laser chip for optical communication on a silicon substrate with good reliability.

The invention discloses a sodium ion battery layered oxide positive electrode material with multiple superlattice ordered composite structures and a preparation method of the sodium ion battery layered oxide positive electrode material, two or more superlattice structures simultaneously exist in a transition metal layer of a layered oxide and are mutually compounded, namely NaxAyBzO2, 0 < x < = 1, y + z = 1, A is at least one of Na, Li, Mg, Cu, Ni, Co, Zn or vacancy (-), B is at least one of Mn, Sb, Te, Bi, Sn and Ru, and x is more than 0 and less than or equal to 1. At least three elements A and B are selected to spontaneously form at least one superlattice ordered structure, and at least two different superlattice ordered arrangement structures exist in the transition metal layer. The advantages of different superlattice structures are integrated, the anion redox reaction is effectively excited, the bulk phase structure stability of the material is enhanced, the voltage hysteresis is improved, and the rate capability of the material is effectively improved.

A base structure and a method for manufacturing the base structure, and a semiconductor device are provided. The base structure includes a substrate and a Group III-V superlattice layer. The Group III-V superlattice layer includes a plurality of lattice stack layers stacked on the substrate. A lattice stack layer includes at least two semiconductor layers, and a semiconductor layer includes a first Group III component and a second Group III component. In a same lattice stack layer, a proportion of the first Group III component in a semiconductor layer away from the substrate is less than a proportion of the first Group III component in a semiconductor layer proximate to the substrate. The Group III-V superlattice layer can effectively achieve structural relaxation between the substrate and an epitaxial structure, reduce dislocation density in the epitaxial structure and improve a performance of a device manufactured on the epitaxial structure.