446 results about "Superlattice" patented technology

The invention relates to the field of semiconductor optoelectronic device manufacturing, in particular to an LED epitaxial wafer growing method capable of reducing warping. Comprising the following steps of: growing a nucleating layer on a substrate at low temperature by adopting an MOCVD (Metal Organic Chemical Vapor Deposition) process, and annealing to form a three-dimensional island-shaped structure to release stress; growing an AlGaN / GaN superlattice or gradient layer as a gradient buffer layer, and adjusting lattice constants layer by layer; a heavily doped or co-doped layer is inserted before growth of n-GaN, and thermal stress is pre-compensated by using local pressure stress; and finally, continuously growing a device layer and carrying out in-situ heat treatment to obtain the LED epitaxial wafer. The method effectively counteracts the macroscopic tensile stress caused by the difference of thermal expansion coefficients in the cooling process, and greatly improves the integrity of the epitaxial wafer.

The invention relates to the technical field of chip preparation, and provides a chip based on an annular photonic crystal and a preparation method thereof. The preparation method comprises the following steps: growing a nucleating layer on a substrate; growing a superlattice structure on one side, away from the substrate, of the nucleating layer; sequentially growing an n-type coating layer, an n-type waveguide layer, a quantum well and a p-type electron blocking layer on one side, deviating from the nucleating layer, of the superlattice structure; etching a plurality of annular cavities on the p-type electron barrier layer to form an annular photonic crystal; growing a p-type extension contact layer on one side, deviating from the quantum well, of the p-type electron blocking layer; and carrying out in-situ annealing treatment. According to the preparation method, the directivity of the photonic band gap can be effectively adjusted, uniform light waves in all directions on the side face can be formed, so that leakage of laser from a non-light-emitting area on the side face is restrained, the light emitting efficiency is improved, the annular photonic crystals are periodically distributed, and the light beam quality is effectively guaranteed.

The invention provides a short-wave infrared detector digital alloy material and a preparation process thereof. The preparation process comprises the following steps: growing a GaSb buffer layer on the surface of an n-type GaSb substrate; starting a first In furnace, and growing an InAs layer on the surface of the GaSb buffer layer in cooperation with an As beam; starting a second In furnace, and growing a quaternary solid solution layer matched with a GaSb buffer layer lattice on the surface of the InAs layer in cooperation with the Ga furnace and the AsSb beam; and alternately growing an InAs layer and a quaternary solid solution layer on the surface of the quaternary solid solution layer to generate a superlattice structure until the total thickness of the superlattice structure reaches a set target thickness, thereby obtaining the digital alloy material. According to the digital alloy material for the short-wave infrared detector and the preparation technology of the digital alloy material, the short-wave infrared detector can be expanded to the wave band ranging from 2.4 micrometers to 2.8 micrometers at the 50% cut-off wavelength.

The invention provides an enhanced HEMT (High Electron Mobility Transistor) device based on a P-type GaN grid electrode and a manufacturing method, a superlattice pair insertion layer is formed in a P-type GaN layer, the superlattice pair insertion layer comprises a first sub-layer and a second sub-layer which are alternately stacked, one of the first sub-layer and the second sub-layer adopts a GaN layer, and the forbidden bandwidth of the other layer is greater than 3.4 eV; by arranging the superlattice pair insertion layer, an electron barrier can be formed in the P-type GaN layer, and electrons can be prevented from moving in the gate structure, so that gate electric leakage is reduced, meanwhile, the electrons are prevented from crossing the gate structure to bombard the metal gate, and the gate reliability is improved; meanwhile, due to the fact that the ultra-thin superlattice material and the material with the forbidden bandwidth larger than 3.4 eV are AlN, BN, AlGaN, InAlN or BGaN, the dielectric constant of the material is very close to that of a GaN-based material, and therefore the gate capacitance and the threshold voltage of the device cannot be increased.

The invention provides a surface-emitting gallium nitride VCSEL laser chip and an epitaxial defect suppression preparation method thereof, and relates to the technical field of laser chips, the surface-emitting gallium nitride VCSEL laser chip comprises a substrate, a low-temperature nucleating layer, a high-temperature recovery layer, a stress regulation type nano mask composite defect blocking layer, an n-type nitride DBR reflector, an active region, a polarization enhanced tunnel junction and the like, the defect blocking layer adopts an in-situ silicon nitride nano-porous mask layer to be matched with an aluminum gallium nitride / gallium nitride stress compensation superlattice layer, through pulse type lateral epitaxial overgrowth annihilation penetrating dislocation, and the n-type nitride DBR reflector adopts an AlInN / GaN lattice matching material system to be combined with a hydrogen etching interruption modification technology, so that thick film growth with zero cracks and high reflectivity is realized; a polarization enhanced tunneling junction is used at the top to replace ITO, and the hole tunneling probability is enhanced by piezoelectric polarization in InGaN, so that efficient current injection with low working voltage and no absorption loss is realized, the dislocation density and the device voltage are remarkably reduced, and the yield of an epitaxial wafer and the photoelectric conversion efficiency are improved.

The invention provides an anti-radiation high-performance enhanced gallium nitride-based power device and a manufacturing method thereof, and belongs to the technical field of semiconductors. On the basis of a traditional enhanced P-GaN HEMT device structure, a P-type InaGa1-aN back barrier layer, an InbGa1-bN / GaN superlattice layer, a composite gate structure composed of a dielectric layer and a gate Schottky metal layer and a gradient-changing island-shaped P-GaN layer are innovatively introduced, and a pair of composite problems of dynamic resistance instability and radiation sensitivity are cooperatively solved. The device not only maintains the normally-off characteristic and the high threshold voltage of an enhanced device, but also remarkably improves the anti-irradiation capability, the breakdown voltage and the dynamic resistance stability, and is particularly suitable for power electronics in strong irradiation environments such as aerospace and nuclear energy detection.

The invention discloses an atomic layer deposition method and structure for an aluminum fluoride enhanced aluminum oxide passivation layer of a TOPCon solar cell. The method comprises the steps that after a boron-doped layer is formed on the front face of a crystal silicon wafer, a passivation layer is formed on the boron-doped layer through an atomic layer deposition technology, specifically, Al2O3 deposition circulation is conducted with trimethyl aluminum as an aluminum source and H2O as an oxygen source, AlF3 deposition circulation with aluminum chloride as the aluminum source and HF or NH4F as a fluorine source is periodically inserted, the proportion of the number of deposition circulation times of AlF3 to the number of deposition circulation times of Al2O3 is 1: (1-10), and the passivation layer is formed on the boron-doped layer through the atomic layer deposition technology. And an alternating layer structure with the total thickness of 5-10 nm is formed. According to the invention, an AlF3 layer is periodically inserted in an Al2O3 deposition cycle, so that an Al2O3 / AlF3 superlattice structure is formed. According to the structure, the interface passivation effect is remarkably improved, hydrogen atom overflow is reduced, and the ultraviolet aging resistance is enhanced. The method is compatible with an existing ALD production line, is suitable for high-efficiency TOPCon battery manufacturing, and has a good industrial application prospect.

Semiconductor devices (e.g., gate-all-around (GAA) devices), processing tools for fabricating GAA devices, methods for fabricating GAA devices, and internal spacer liners and internal spacers for GAA devices are described. The methods include forming an internal spacer liner within a superlattice structure formed on an upper surface of a semiconductor substrate. The superlattice structure has a plurality of recessed semiconductor material layers (e.g., silicon germanium (SiGe)) and a corresponding plurality of channel layers (e.g., silicon (Si)) arranged alternately in a plurality of stacked pairs. The internal spacer liner includes a crystalline silicon-containing liner formed by a selective epitaxial growth (SEG) process. The crystalline silicon-containing liner can be doped with a dopant (e.g., with a p-type dopant or an n-type dopant). One or more steps of the methods described herein are performed in situ in an integrated processing tool system.

The invention provides an infrared detector deep mesa etching process based on three layers of masks and an infrared detector, and belongs to the field of infrared detector mesa etching. The process comprises the following steps: spin-coating a stress buffer layer on the surface of a superlattice epitaxial layer, and curing and forming; depositing a hard mask serving as an etching barrier layer; depositing an inorganic oxide; spin-coating photoresist to form a composite patterned top layer, and then forming a mesa pattern through a photoetching process; taking the mesa pattern as a mask, and transferring the mesa pattern to the hard mask through reactive ion etching; etching the stress buffer layer by adopting plasma until the surface of the superlattice epitaxial layer is exposed; the three layers of masks are used as blocking, deep etching is carried out through inductively coupled plasma, and the etching depth is 5.6-6 microns; a post-processing step; according to the process provided by the invention, high-quality and high-aspect-ratio mesa etching can be realized on the premise of not introducing extra pollution and remarkably increasing the cost, and the process is suitable for preparing a deep-mesa and high-aspect-ratio device.

The invention discloses a surface coating for prolonging the fatigue life of metal and a preparation method of the surface coating. According to the coating, face-centered cubic structure layers and hexagonal system structure layers are alternately stacked to form a superlattice structure, the total thickness ranges from 1.0 micrometer to 1.5 micrometers, and a base material is titanium alloy. The thickness of the face-centered cubic structure layer is 4-6 nm, the thickness of the hexagonal system structure layer is 1-3 nm, the Mohs hardness difference between the two layers is not larger than 2, and the average grain size is 1-2 nm. According to the coating, a stable high-toughness interface phase is obtained through a specific crystal structure and thickness regulation and control, and dislocation slippage and crack propagation are effectively prevented. A magnetron sputtering method is adopted for preparation, and the process comprises the steps of substrate surface pretreatment, bias cleaning and alternate deposition. The coating shows excellent anti-fatigue performance under the cyclic load condition, and the service life of the titanium alloy component can be remarkably prolonged.

The invention provides a single-mode 660nm semiconductor laser device with a superlattice structure and a preparation method of the single-mode 660nm semiconductor laser device, and belongs to the technical field of photoelectrons. The multi-quantum-well multi-quantum-well light-emitting diode sequentially comprises a GaAs substrate, a buffer layer, a sectional lower limiting layer, a lower waveguide layer, a multi-quantum-well active region, an AlInP / GaP superlattice, an upper waveguide layer, a sectional upper limiting layer, a band gap transition layer and a GaAs cap layer from bottom to top. The preparation method comprises the processes of substrate processing, buffer layer growth, V-group source switching, limiting layer and waveguide layer epitaxy, multi-quantum well and superlattice structure growth, cap layer deposition and the like. Through the segmented design of the superlattice structure and the limiting layer, the hole injection efficiency and the carrier limiting capability are improved, and the high-temperature working characteristic of the device is effectively improved. Stable output of single-mode laser in the 660nm wave band is achieved, reliable power output of 120mW can be kept in a high-temperature environment of 60 DEG C, and meanwhile, low loss, high conversion efficiency and excellent photoelectric performance are achieved.

The invention provides a superlattice material and a growth method thereof, and the growth method comprises the following steps: S1, growing an AlSb / AlAsSb superlattice, and growing an AlSb layer; s2, infiltrating the grown AlSb / AlAsSb for a design time under the protection of an Sb beam, keeping an As shutter closed in the process, and opening an As valve to a proper opening degree at the same time, so that an As beam is gradually dispersed into a cavity; s3, adjusting the opening degree of an As valve step by step, introducing the As source into the growth cavity in a gradually increasing manner at the rate, and correspondingly reducing the Sb source flow step by step; s4, switching the background protection beam current into an As protection beam current; and S5, growing an InAs / InAsSb superlattice. According to the method, after the AlSb / AlAsSb superlattice is grown and before the InAs / InAsSb superlattice is initially grown, an Sb protection stage and a controlled As protection beam gradient conversion step are introduced, the interface between the AlSb / AlAsSb and the InAs / InAsSb can be close to an ideal atomic-scale steep interface through cooperative control over Sb and As, and accurate control over the multicomponent compound superlattice components is achieved.

The invention relates to the technical field of micro-nano processing of semiconductor devices, in particular to an InAs / GaSb class-II superlattice mesa wet etching solution and a using method thereof, the etching solution is an aqueous solution comprising citric acid, phosphoric acid and hydrogen peroxide, the citric acid is citric acid monohydrate, the mass concentration of the phosphoric acid is 85%, and the mass concentration of the hydrogen peroxide is 30%. By optimizing the proportion of the components of the corrosive liquid and introducing an adjustable corrosion time sequence and a post-treatment technique, high repeatability and high uniformity of the corrosion process can be realized on the premise of keeping the intrinsic electrical properties of the material, the morphology quality of the mesa structure can be remarkably improved, and the smooth and low-damage mesa side wall and surface can be obtained. The method lays a reliable process foundation for preparing a high-performance InAs / GaSb class-II super-crystal-based infrared detector, is particularly beneficial to suppressing electric leakage of the side wall of a device, reduces dark current, and finally improves the quantum efficiency and imaging performance of the device.

The invention provides a mesa side wall passivation method for a class-II superlattice infrared detector and the infrared detector, and belongs to the field of semiconductor manufacturing. The problems of high interface state density and large dark current caused by a natural oxide layer rich in Sb2O5 formed by exposing the side wall of the aluminum antimonide or arsenic aluminum antimonide barrier layer to the atmosphere are solved; the method comprises the following steps of: cleaning and drying a second-class superlattice infrared detector chip subjected to mesa etching, and then loading the second-class superlattice infrared detector chip into a sample cavity of ALD (Atomic Layer Deposition) equipment; vacuumizing and heating; introducing high-purity hydrogen into a remote plasma source, starting the remote plasma source, selectively reducing the unstable natural oxide layer on the surface of the side wall of the barrier layer of the chip into volatile gas through hydrogen plasma, and pumping away the volatile gas through a vacuum system; after hydrogen plasma treatment is finished, a gas path is switched to an ALD precursor to form a passive film on the side wall of the barrier layer; cooling and taking the sheet; the invention is applied to the infrared detector.

The invention relates to the technical field of semiconductor devices, in particular to a blue-green dual-waveband LED epitaxial wafer which comprises a substrate, a buffer layer, an N-type semiconductor layer, a low-temperature stress release layer, a multi-quantum well light-emitting layer, an electron blocking layer and a P-type semiconductor layer which are sequentially arranged in the epitaxial direction. The multi-quantum well light-emitting layer comprises a non-light-emitting region superlattice layer, a non-light-emitting region quantum well layer, a green light quantum well layer and a blue light quantum well layer which are sequentially, periodically and alternately grown in the epitaxial direction. The backlight source is low in cost, the use of fluorescent powder can be reduced, and the display effect is good.

The invention discloses a space customization three-dimensional column vector light beam array generation method based on a metasurface, and belongs to the field of micro-nano optics, diffraction optics and structured light field regulation and control. The implementation method comprises the following steps of: independently regulating and controlling left-hand circular polarization and right-hand circular polarization components of incident light based on geometric and propagation phase joint modulation of the metasurface; a metasurface, a phase distribution coding lens factor of a polarization channel, a Dammann vortex grating with opposite basic topological charges and a spiral Dammann zone plate are independently optimized, and left-handed and right-handed circular polarization components generate a three-dimensional vortex beam array with opposite spatial topological charges in a near-field Fresnel domain; the left-handed circular polarization vortex array and the right-handed circular polarization vortex array with opposite topological charges are coherently superposed to form a spatially customized three-dimensional column vector light beam array, and the vector characteristic of each light beam in the array depends on the amplitude ratio, the phase difference and the topological charges of the left-handed circular polarization component and the right-handed circular polarization component on each diffraction order. According to the invention, the regulation dimension of the column vector light beam can be expanded.

The application discloses a high-power AB3 type AB2-AB5 dual-phase La-Mg-Ni-based hydrogen storage alloy and a preparation method thereof, and has a dual-phase structure of an AB5 type LaNi5 phase and an AB2 type LaMgNi4 phase. Unlike the AB3 type La-Mg-Ni-based hydrogen storage alloy in the past, which is mainly of a superlattice alloy phase formed by stacking [A2B4] and [AB5] sublattices, the AB3 type alloy in the application is composed of independent AB2 and AB5 alloy phases, which can not only avoid the service life problem caused by the structural mismatch of two sublattices in the same alloy phase in the hydrogen absorption and release process, but also avoid the adverse effect of mutual restriction on the rapid charge and discharge. Meanwhile, the grain boundary between the AB2 and AB5 alloy phases can further provide sufficient channels for the rapid hydrogen absorption and release of the alloy, which is beneficial to the high-rate discharge performance.

The invention discloses a long-wave infrared detector based on electric field intensity distribution regulation and control and a preparation method, and relates to the technical field of semiconductors, the long-wave infrared detector comprises a substrate, a bottom contact layer, a hole barrier layer, an absorption layer, an electron barrier layer and a top contact layer which are sequentially arranged from bottom to top; wherein the bottom contact layer and the hole barrier layer adopt an InAs / GaSb / AlSb / GaSb superlattice structure; the absorption layer, the electron barrier layer and the top contact adopt an InAs / GaSb superlattice structure; the doping concentration of the absorption layer is greater than the doping concentration of the hole barrier layer and the electron barrier layer. The doping concentration of the absorption layer is set to be greater than that of the barrier layer, so that the width of a depletion region of the absorption layer is reduced, the depletion region deviates towards the barrier layer, the probability of SRH recombination is reduced, G-R current can be effectively inhibited, and the overall dark current level is reduced.

This invention discloses a light-emitting diode (LED) epitaxial wafer and its fabrication method. The LED epitaxial wafer includes a substrate and a buffer layer, an N-type GaN layer, a stress relief layer, a multiple quantum well layer, an electron blocking layer, and a P-type GaN layer sequentially stacked on the substrate. The stress relief layer includes a Si-doped GaN layer, a Si-doped porous GaN layer, a GaN leveling layer, and an InGaN / GaN superlattice layer sequentially stacked on the N-type GaN layer. The LED fabricated by this invention can reduce the stress and defect density of the epitaxial layer material, improve the quality of the multiple quantum well layer, and enhance the radiative recombination efficiency in the multiple quantum well layer, thereby improving the luminous efficiency of the LED.

The application discloses a method for preparing a ferroelectric crystal optical superlattice by using a pyroelectric effect, a superlattice and application, and belongs to the field of electronic and optical devices. The method comprises the following steps: preparing a ferroelectric crystal material carrying an electrode pattern; heating the ferroelectric crystal material carrying the electrode pattern, and the heating temperature is 50-200 DEG C; in the temperature range, the ferroelectric crystal material carrying the electrode pattern is excited in the reverse direction of polarization by using the pyroelectric property of the ferroelectric crystal material itself; then, an annealing step is performed, and the annealing rate is 50-150 DEG C / h; after 1-10 times of heating and annealing cycles, the superlattice is obtained. The application breaks through the limitation of the external electric field polarization method for different electrode structures by creating a new polarization process, realizes the preparation of different superlattice crystals based on various structure electrodes, and further expands the application scenarios and application fields of the ferroelectric crystal material.

The utility model discloses a gas sensor detection device which comprises a base, an electrode, a solid electrolysis ring and a ceramic filter, the solid electrolysis ring is arranged in the base; the electrode is arranged in the solid electrolysis ring and is connected with the solid electrolysis ring in a hard pressure contact manner; the electrodes comprise an induction electrode, a counter electrode and a reference electrode; the sensing electrode, the counter electrode and the reference electrode are separated through ribs in the base, and graphene layers and superlattice silver coatings are sequentially attached to the surfaces of the sensing electrode, the counter electrode and the reference electrode; the two ends of the ceramic filter are connected with ribs in the base to form an air inlet channel, and the outer side face of the ceramic filter abuts against the induction electrode. Through type gas detection is adopted, the whole gas flow channel is stable, detection data are more accurate, the graphene layer and the superlattice silver plating layer are sequentially attached to the surface of the electrode, the graphene layer has excellent conductivity and high temperature resistance, the superlattice silver plating layer increases the contact area with gas, and the detection precision is further improved.

A semiconductor light-emitting structure includes a semiconductor substrate layer, a first limiting layer, a first waveguide layer, an active layer, a second waveguide layer, and a second limiting layer stacked in sequence. The active layer comprises a first superlattice active layer and a second superlattice active layer stacked in sequence, and the second superlattice active layer is located on a side of the first superlattice active layer away from the first waveguide layer. The semiconductor light-emitting structure further includes an insertion layer disposed between the second superlattice active layer and the first superlattice active layer. A refractive index of the insertion layer is less than an effective refractive index of the first superlattice active layer and less than an effective refractive index of the second superlattice active layer.

This invention relates to the fields of semiconductor information storage and artificial synaptic devices, specifically to a biological synaptic intrinsically self-assembled topological phase-change memristor and its fabrication method. The fabrication method includes: providing a substrate; depositing a bottom electrode; and depositing SrFeO on the bottom electrode. x The thin film serves as the storage medium layer; the storage medium layer undergoes heat treatment, including in-situ annealing and post-annealing. By controlling the oxygen pressure difference between in-situ and post-annealing, the single-component SrFeO is made more efficient. x An intrinsically self-assembled superlattice structure, characterized by alternating vertical and horizontal orientation regions of oxygen vacancy channels, spontaneously forms within the thin film. This structure restricts the formation sites of conductive filaments, significantly improving the consistency and stability of the device's resistive switching cycle. The process of this invention is simple, requiring no introduction of a second-phase material. The resulting memristor requires no electrical formation, exhibits a high on / off ratio, multi-level storage, and short-term synaptic plasticity, making it applicable to neuromorphic computing chips and artificial intelligence devices.

The application provides an epitaxial method for improving dislocation defects and an epitaxial wafer. The epitaxial method comprises the following steps: providing a substrate; forming a first modulation superlattice buffer layer on the surface of the substrate, which is used for adjusting thermal mismatch; continuously forming a second modulation superlattice buffer layer, which is used for blocking dislocations; and continuously forming an epitaxial layer. By arranging the superlattice buffer layers for adjusting thermal mismatch and blocking dislocations on the substrate in sequence, the thermal expansion coefficient is modulated and the dislocations are blocked, so that a high-quality epitaxial layer can be formed on the substrate.

The application discloses a preparation method of a superlattice film. The method takes aramid nanofiber phase separation scraped film precursors as a starting point, and prepares a dense layered superlattice film through segmented carbonization and high-temperature graphitization. The method is simple in process and low in cost. The prepared superlattice film is few in defects and good in in-plane / out-of-plane thermal conductivity and other performances, and can be widely applied in the fields of heat dissipation materials and the like.

The polarization diffraction spectrometer comprises a substrate and a plurality of rectangular nano-columns arranged on the substrate, the rectangular nano-columns are periodically stacked or arranged in the height direction to form a periodic superlattice unit, and the substrate layer is made of a nanoscale transparent medium material; according to a grating equation, the optimal diffraction series, the period length and the incident light wavelength of the super grating are selected through experimental simulation, and optimal structural parameters are determined by combining an electromagnetic simulation tool and an optimization algorithm; the heights, the widths and the intervals of the rectangular nanocolumns serve as parameters of a particle swarm optimization algorithm, a fitness function with target diffraction order energy concentration ratio and target order overall diffraction efficiency optimization serving as core indexes is constructed, full-wave optical simulation software is combined, and geometric distribution in periodic units of the rectangular nanocolumns is optimized and adjusted. According to the invention, under the incident condition of 45-degree linearly polarized light, the S polarization component and the P polarization component are respectively concentrated at the preset target diffraction order, and an efficient diffraction light splitting effect is achieved.

The invention relates to the field of semiconductor material manufacturing, in particular to a molecular beam epitaxy heterogeneous base HgCdTe material and a preparation method thereof. In order to overcome the double defects of high dislocation density and out-of-control Se atom diffusion in the existing heterogeneous-base HgCdTe molecular beam epitaxy technology, a dislocation reaction is triggered by designing an HgSe superlattice structure, and an As-doped HgTe diffusion blocking layer is further constructed; finally, the molecular beam epitaxy heterogeneous base HgCdTe material can meet the core requirements of low dislocation density, zero Se diffusion and high stability of a high working temperature (greater than or equal to 150K) infrared detector. The problems that due to the fact that the dislocation density of a molecular beam epitaxy heterogeneous base HgCdTe is high, the dark current of a device is sharply increased, the blind pixel rate is increased, and Se diffusion of an epitaxial structure containing Se is out of control are solved.

The present disclosure provides a fabricating method of a high electron mobility transistor device, including a substrate, a nucleation layer, a buffer layer, an active layer and a gate electrode. The nucleation layer is disposed on the substrate, and the buffer layer is disposed on the nucleation layer, wherein the buffer layer includes a first superlattice layer having at least two heteromaterials alternately arranged in a horizontal direction, and a second superlattice layer having at least two heteromaterials vertically stacked along a vertical direction. The at least two heteromaterials stack at least once within the second superlattice layer. The active layer is disposed on the buffer layer, and the gate electrode is disposed on the active layer.

This invention discloses a superlattice multiplication layer avalanche diode and its fabrication method. The single-photon avalanche diode includes a graphene transparent electrode and, from bottom to top, an InP substrate, an n-type buffer layer, a superlattice absorption region, a p-type charge layer, a superlattice gradient region, a superlattice multiplication region, a p-type contact layer with a p-type contact window, and a passivation layer. The graphene transparent electrode is grown on the passivation layer and the p-type contact window, forming an ohmic contact with the p-type contact region. Magnetic metal nanoparticles that generate a local magnetic field are embedded in the superlattice multiplication region. The magnetic metal nanoparticles are uniformly distributed in-plane within a depth range of 5-400 nm from the interface in the light-gathering direction of the superlattice multiplication region. This invention combines the internal bandgap optimization of the superlattice with the external limiting pump capability of graphene to produce a synergistic effect, providing a single-photon avalanche diode with low dark count rate, weak afterpulse effect, high detection efficiency, and the ability to operate at relatively high temperatures.